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/kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/
Dk3-am62a.dtsi54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-am62p.dtsi53 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
57 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
58 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
62 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-am64.dtsi53 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
57 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
58 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
59 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
60 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
62 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-footbridge/include/mach/
Dhardware.h13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc000000 0x79000000 1MB PCI IACK/special space
18 * 0xfb000000 0x7a000000 16MB PCI Config type 1
19 * 0xfa000000 0x7b000000 16MB PCI Config type 0
20 * 0xf9000000 0x50000000 1MB Cache flush
21 * 0xf0000000 0x80000000 16MB ISA memory
30 #define XBUS_SIZE 0x00100000
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dmicrochip,pcie-host.yaml49 0-3
53 pattern: '^fic[0-3]$'
84 const: 0
116 reg = <0x0 0x70000000 0x0 0x08000000>,
117 <0x0 0x43000000 0x0 0x00010000>;
124 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
125 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
126 <0 0 0 2 &pcie_intc0 1>,
127 <0 0 0 3 &pcie_intc0 2>,
128 <0 0 0 4 &pcie_intc0 3>;
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-sa1100/
Dpci-nanoengine.c22 if (bus->number != 0 || (devfn >> 3) != 0) in nanoengine_pci_map_bus()
42 DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
62 pci 0000:00:00.0: [8086:1209] type 0 class 0x000200
63 pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff]
64 pci 0000:00:00.0: reg 14: [io 0x0000-0x003f]
65 pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff]
66 pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref]
71 pci 0000:00:00.0: BAR 6: can't assign mem pref (size 0x100000)
72 pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff]
73 pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff])
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a77961-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x78000000>;
25 reg = <0x4 0x80000000 0x0 0x80000000>;
30 reg = <0x6 0x00000000 0x1 0x00000000>;
Dr8a779a0-falcon-cpu.dtsi17 reg = <0x0 0x48000000 0x0 0x78000000>;
22 reg = <0x5 0x00000000 0x0 0x80000000>;
27 reg = <0x6 0x00000000 0x0 0x80000000>;
32 reg = <0x7 0x00000000 0x0 0x80000000>;
Dr8a77965-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x78000000>;
31 clock-names = "du.0", "du.1", "du.3",
32 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a774a1-hihope-rzg2m-rev2.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774e1-hihope-rzg2h.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x5 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a774a1-hihope-rzg2m.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774b1-hihope-rzg2n-rev2.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
/kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/
Dr8a77965-salvator-xs.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
30 clock-names = "du.0", "du.1", "du.3",
31 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77965-salvator-x.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
30 clock-names = "du.0", "du.1", "du.3",
31 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77965-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x78000000>;
31 clock-names = "du.0", "du.1", "du.3",
32 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a774e1-hihope-rzg2h.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x5 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77960-salvator-xs.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774a1-hihope-rzg2m-rev2.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774a1-hihope-rzg2m.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a77960-salvator-x.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a779m5-salvator-xs.dts23 reg = <0x0 0x48000000 0x0 0x78000000>;
34 clock-names = "du.0", "du.1", "du.3",
35 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77961-ulcb.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
29 reg = <0x6 0x00000000 0x1 0x00000000>;
40 clock-names = "du.0", "du.1", "du.2",
41 "dclkin.0", "dclkin.1", "dclkin.2";
/kernel/linux/linux-5.10/drivers/net/ethernet/dec/tulip/
Dpnic.c23 u32 phy_reg = ioread32(ioaddr + 0xB8); in pnic_do_nway()
24 u32 new_csr6 = tp->csr6 & ~0x40C40200; in pnic_do_nway()
26 if (phy_reg & 0x78000000) { /* Ignore baseT4 */ in pnic_do_nway()
27 if (phy_reg & 0x20000000) dev->if_port = 5; in pnic_do_nway()
28 else if (phy_reg & 0x40000000) dev->if_port = 3; in pnic_do_nway()
29 else if (phy_reg & 0x10000000) dev->if_port = 4; in pnic_do_nway()
30 else if (phy_reg & 0x08000000) dev->if_port = 0; in pnic_do_nway()
32 new_csr6 = (dev->if_port & 1) ? 0x01860000 : 0x00420000; in pnic_do_nway()
33 iowrite32(0x32 | (dev->if_port & 1), ioaddr + CSR12); in pnic_do_nway()
35 iowrite32(0x1F868, ioaddr + 0xB8); in pnic_do_nway()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/dec/tulip/
Dpnic.c23 u32 phy_reg = ioread32(ioaddr + 0xB8); in pnic_do_nway()
26 if (phy_reg & 0x78000000) { /* Ignore baseT4 */ in pnic_do_nway()
27 if (phy_reg & 0x20000000) dev->if_port = 5; in pnic_do_nway()
28 else if (phy_reg & 0x40000000) dev->if_port = 3; in pnic_do_nway()
29 else if (phy_reg & 0x10000000) dev->if_port = 4; in pnic_do_nway()
30 else if (phy_reg & 0x08000000) dev->if_port = 0; in pnic_do_nway()
32 new_csr6 = (dev->if_port & 1) ? 0x01860000 : 0x00420000; in pnic_do_nway()
33 iowrite32(0x32 | (dev->if_port & 1), ioaddr + CSR12); in pnic_do_nway()
35 iowrite32(0x1F868, ioaddr + 0xB8); in pnic_do_nway()
36 if (phy_reg & 0x30000000) { in pnic_do_nway()
[all …]

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