Searched +full:0 +full:x81000000 (Results 1 – 25 of 202) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | mvebu-pci.txt | 23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
32 registers area. This range entry translates the '0x82000000 0 r' PCI
33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
34 of the internal register window (as identified by MBUS_ID(0xf0,
35 0x01)).
39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0
79 value is 0.
93 bus-range = <0x00 0xff>;
97 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
98 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | armada-xp-mv78260.dtsi | 27 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
34 clocks = <&cpuclk 0>;
49 * MV78260 has 3 PCIe units Gen2.0: Two units can be
62 bus-range = <0x00 0xff>;
65 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
66 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
67 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
[all …]
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| D | armada-xp-mv78460.dtsi | 28 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
35 clocks = <&cpuclk 0>;
66 * MV78460 has 4 PCIe units Gen2.0: Two units can be
79 bus-range = <0x00 0xff>;
82 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
83 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
84 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
85 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
[all …]
|
| D | armada-xp-mv78230.dtsi | 26 #size-cells = <0>;
29 cpu@0 {
32 reg = <0>;
33 clocks = <&cpuclk 0>;
48 * MV78230 has 2 PCIe units Gen2.0: One unit can be
61 bus-range = <0x00 0xff>;
64 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
65 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
66 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
67 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
[all …]
|
| D | armada-385.dtsi | 20 #size-cells = <0>;
23 cpu@0 {
26 reg = <0>;
45 bus-range = <0x00 0xff>;
48 <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
49 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
50 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
51 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
52 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
53 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
[all …]
|
| D | armada-380.dtsi | 20 #size-cells = <0>;
23 cpu@0 {
26 reg = <0>;
46 bus-range = <0x00 0xff>;
49 <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
50 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
51 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
52 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
53 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
54 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
[all …]
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| D | kirkwood-6282.dtsi | 12 bus-range = <0x00 0xff>;
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
17 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
18 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
19 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
20 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
21 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
23 pcie0: pcie@1,0 {
25 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
[all …]
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| D | armada-39x.dtsi | 32 #size-cells = <0>;
35 cpu@0 {
38 reg = <0>;
59 pcie-mem-aperture = <0xe0000000 0x8000000>;
60 pcie-io-aperture = <0xe8000000 0x100000>;
64 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
71 ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
75 reg = <0x8000 0x1000>;
78 arm,double-linefill-incr = <0>;
79 arm,double-linefill-wrap = <0>;
[all …]
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| D | kirkwood-98dx4122.dtsi | 12 bus-range = <0x00 0xff>;
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
19 pcie0: pcie@1,0 {
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
[all …]
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| D | kirkwood-6281.dtsi | 12 bus-range = <0x00 0xff>;
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
19 pcie0: pcie@1,0 {
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
[all …]
|
| D | kirkwood-6192.dtsi | 12 bus-range = <0x00 0xff>;
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
19 pcie0: pcie@1,0 {
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | mvebu-pci.txt | 23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
32 registers area. This range entry translates the '0x82000000 0 r' PCI
33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
34 of the internal register window (as identified by MBUS_ID(0xf0,
35 0x01)).
39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0
79 value is 0.
99 bus-range = <0x00 0xff>;
103 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
104 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | armada-xp-mv78460.dtsi | 28 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
35 clocks = <&cpuclk 0>;
66 * MV78460 has 4 PCIe units Gen2.0: Two units can be
79 bus-range = <0x00 0xff>;
82 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
83 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
84 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
85 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
[all …]
|
| D | armada-xp-mv78260.dtsi | 27 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
34 clocks = <&cpuclk 0>;
49 * MV78260 has 3 PCIe units Gen2.0: Two units can be
62 bus-range = <0x00 0xff>;
65 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
66 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
67 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
[all …]
|
| D | armada-385.dtsi | 20 #size-cells = <0>;
23 cpu@0 {
26 reg = <0>;
45 bus-range = <0x00 0xff>;
48 <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
49 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
50 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
51 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
52 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
53 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
[all …]
|
| D | armada-xp-mv78230.dtsi | 26 #size-cells = <0>;
29 cpu@0 {
32 reg = <0>;
33 clocks = <&cpuclk 0>;
48 * MV78230 has 2 PCIe units Gen2.0: One unit can be
61 bus-range = <0x00 0xff>;
64 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
65 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
66 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
67 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
[all …]
|
| D | armada-380.dtsi | 20 #size-cells = <0>;
23 cpu@0 {
26 reg = <0>;
46 bus-range = <0x00 0xff>;
49 <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
50 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
51 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
52 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
53 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
54 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
[all …]
|
| D | kirkwood-6282.dtsi | 12 bus-range = <0x00 0xff>;
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
17 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
18 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
19 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
20 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
21 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
23 pcie0: pcie@1,0 {
25 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
[all …]
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| D | armada-39x.dtsi | 32 #size-cells = <0>;
35 cpu@0 {
38 reg = <0>;
59 pcie-mem-aperture = <0xe0000000 0x8000000>;
60 pcie-io-aperture = <0xe8000000 0x100000>;
64 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
71 ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
75 reg = <0x8000 0x1000>;
78 arm,double-linefill-incr = <0>;
79 arm,double-linefill-wrap = <0>;
[all …]
|
| D | kirkwood-98dx4122.dtsi | 12 bus-range = <0x00 0xff>;
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
19 pcie0: pcie@1,0 {
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
[all …]
|
| D | kirkwood-6281.dtsi | 12 bus-range = <0x00 0xff>;
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
19 pcie0: pcie@1,0 {
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls2088a.dtsi | 15 cpu0: cpu@0 {
18 reg = <0x0>;
19 clocks = <&clockgen 1 0>;
28 reg = <0x1>;
29 clocks = <&clockgen 1 0>;
38 reg = <0x100>;
48 reg = <0x101>;
58 reg = <0x200>;
68 reg = <0x201>;
78 reg = <0x300>;
[all …]
|
| D | fsl-ls2080a.dtsi | 15 cpu0: cpu@0 {
18 reg = <0x0>;
19 clocks = <&clockgen 1 0>;
28 reg = <0x1>;
29 clocks = <&clockgen 1 0>;
38 reg = <0x100>;
48 reg = <0x101>;
58 reg = <0x200>;
68 reg = <0x201>;
78 reg = <0x300>;
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls2080a.dtsi | 16 cpu0: cpu@0 {
19 reg = <0x0>;
20 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
29 reg = <0x1>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
39 reg = <0x100>;
49 reg = <0x101>;
59 reg = <0x200>;
69 reg = <0x201>;
79 reg = <0x300>;
[all …]
|
| D | fsl-ls2088a.dtsi | 16 cpu0: cpu@0 {
19 reg = <0x0>;
20 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
29 reg = <0x1>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
39 reg = <0x100>;
49 reg = <0x101>;
59 reg = <0x200>;
69 reg = <0x201>;
79 reg = <0x300>;
[all …]
|
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