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/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-pcie.dtsi8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */
23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-pcie.dtsi8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */
23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dmobiveil-pcie.txt49 reg = <0xa0000000 0x00001000>,
50 <0xb0000000 0x00010000>,
51 <0xff000000 0x00200000>,
52 <0xb0010000 0x00001000>;
60 bus-range = <0x00000000 0x000000ff>;
64 interrupts = < 0 89 4 >;
65 interrupt-map-mask = <0 0 0 7>;
66 interrupt-map = <0 0 0 0 &pci_express 0>,
67 <0 0 0 1 &pci_express 1>,
68 <0 0 0 2 &pci_express 2>,
[all …]
Drockchip-pcie-host.txt38 - pinctrl-0: The "default" pinctrl state
51 where N ranges from 0 to 3.
75 address. The value must be 0.
89 bus-range = <0x0 0x1>;
90 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
91 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
92 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
98 ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
99 0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
101 msi-map = <0x0 &its 0x0 0x1000>;
[all …]
Dmediatek-pcie.txt31 where N starting from 0 to one less than the number of root ports.
76 reg = <0 0x1a000000 0 0x1000>;
84 reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */
85 <0 0x1a142000 0 0x1000>, /* Port0 registers */
86 <0 0x1a143000 0 0x1000>, /* Port1 registers */
87 <0 0x1a144000 0 0x1000>; /* Port2 registers */
92 interrupt-map-mask = <0xf800 0 0 0>;
93 interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
94 <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
95 <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dmobiveil-pcie.txt49 reg = <0xa0000000 0x00001000>,
50 <0xb0000000 0x00010000>,
51 <0xff000000 0x00200000>,
52 <0xb0010000 0x00001000>;
60 bus-range = <0x00000000 0x000000ff>;
64 interrupts = < 0 89 4 >;
65 interrupt-map-mask = <0 0 0 7>;
66 interrupt-map = <0 0 0 0 &pci_express 0>,
67 <0 0 0 1 &pci_express 1>,
68 <0 0 0 2 &pci_express 2>,
[all …]
Drockchip,rk3399-pcie.yaml61 const: 0
98 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
99 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
100 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
103 ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
104 0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
106 msi-map = <0x0 &its 0x0 0x1000>;
107 reg = <0x0 0xf8000000 0x0 0x2000000>, <0x0 0xfd000000 0x0 0x1000000>;
118 pinctrl-0 = <&pcie_clkreq>;
120 interrupt-map-mask = <0 0 0 7>;
[all …]
Dapple,pcie.yaml114 reg = <0x6 0x90000000 0x0 0x1000000>,
115 <0x6 0x80000000 0x0 0x100000>,
116 <0x6 0x81000000 0x0 0x4000>,
117 <0x6 0x82000000 0x0 0x4000>,
118 <0x6 0x83000000 0x0 0x4000>;
130 iommu-map = <0x100 &dart0 1 1>,
131 <0x200 &dart1 1 1>,
132 <0x300 &dart2 1 1>;
133 iommu-map-mask = <0xff00>;
135 bus-range = <0 3>;
[all …]
Drockchip-dw-pcie.yaml102 const: 0
174 reg = <0x3 0xc0800000 0x0 0x390000>,
175 <0x0 0xfe280000 0x0 0x10000>,
176 <0x3 0x80000000 0x0 0x100000>;
178 bus-range = <0x20 0x2f>;
194 msi-map = <0x2000 &its 0x2000 0x1000>;
199 ranges = <0x81000000 0x0 0x80800000 0x3 0x80800000 0x0 0x100000>,
200 <0x83000000 0x0 0x80900000 0x3 0x80900000 0x0 0x3f700000>;
208 #address-cells = <0>;
Dmediatek-pcie.txt32 where N starting from 0 to one less than the number of root ports.
80 reg = <0 0x1a000000 0 0x1000>;
88 reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */
89 <0 0x1a142000 0 0x1000>, /* Port0 registers */
90 <0 0x1a143000 0 0x1000>, /* Port1 registers */
91 <0 0x1a144000 0 0x1000>; /* Port2 registers */
96 interrupt-map-mask = <0xf800 0 0 0>;
97 interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
98 <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
99 <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi33 /memreserve/ 0x81000000 0x00200000;
46 #size-cells = <0>;
48 A57_0: cpu@0 {
51 reg = <0 0>;
59 reg = <0 1>;
67 reg = <0 2>;
75 reg = <0 3>;
80 CLUSTER0_L2: l2-cache@0 {
94 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xff) |
96 <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xff) |
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi33 /memreserve/ 0x81000000 0x00200000;
46 #size-cells = <0>;
48 A57_0: cpu@0 {
51 reg = <0 0>;
59 reg = <0 1>;
67 reg = <0 2>;
75 reg = <0 3>;
80 CLUSTER0_L2: l2-cache@0 {
92 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xff) |
94 <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xff) |
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dmsm8956-sony-xperia-loire.dtsi16 qcom,msm-id = <266 0x10001>; /* MSM8956 v1.1 */
17 qcom,board-id = <8 0>;
32 reg = <0x0 0x83000000 0x0 0x2800000>;
37 reg = <0 0x57f00000 0 0x100000>;
38 record-size = <0x20000>;
39 console-size = <0x40000>;
40 ftrace-size = <0x20000>;
41 pmsg-size = <0x20000>;
111 /* Cluster 0 supply */
274 gpio-reserved-ranges = <0 4>;
/kernel/linux/linux-6.6/arch/arm64/boot/dts/apple/
Dt600x-die0.dtsi3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
12 reg = <0x2 0x8e03c000 0x0 0x14000>;
21 reg = <0x2 0x8e100000 0x0 0xc000>,
22 <0x2 0x8e10c000 0x0 0x4>;
29 reg = <0x2 0x90820000 0x0 0x4000>;
33 gpio-ranges = <&pinctrl_smc 0 0 30>;
39 interrupts = <AIC_IRQ 0 743 IRQ_TYPE_LEVEL_HIGH>,
40 <AIC_IRQ 0 744 IRQ_TYPE_LEVEL_HIGH>,
41 <AIC_IRQ 0 745 IRQ_TYPE_LEVEL_HIGH>,
42 <AIC_IRQ 0 746 IRQ_TYPE_LEVEL_HIGH>,
[all …]
Dt8103.dtsi23 #size-cells = <0>;
57 cpu_e0: cpu@0 {
60 reg = <0x0 0x0>;
62 cpu-release-addr = <0 0>; /* To be filled by loader */
67 i-cache-size = <0x20000>;
68 d-cache-size = <0x10000>;
74 reg = <0x0 0x1>;
76 cpu-release-addr = <0 0>; /* To be filled by loader */
81 i-cache-size = <0x20000>;
82 d-cache-size = <0x10000>;
[all …]
Dt8112.dtsi24 #size-cells = <0>;
58 cpu_e0: cpu@0 {
61 reg = <0x0 0x0>;
63 cpu-release-addr = <0 0>; /* To be filled by loader */
68 i-cache-size = <0x20000>;
69 d-cache-size = <0x10000>;
75 reg = <0x0 0x1>;
77 cpu-release-addr = <0 0>; /* To be filled by loader */
82 i-cache-size = <0x20000>;
83 d-cache-size = <0x10000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-cns3xxx/
Dcns3xxx.h12 #define CNS3XXX_FLASH_BASE 0x10000000 /* Flash/SRAM Memory Bank 0 */
15 #define CNS3XXX_DDR2SDRAM_BASE 0x20000000 /* DDR2 SDRAM Memory */
17 #define CNS3XXX_SPI_FLASH_BASE 0x60000000 /* SPI Serial Flash Memory */
19 #define CNS3XXX_SWITCH_BASE 0x70000000 /* Switch and HNAT Control */
21 #define CNS3XXX_PPE_BASE 0x70001000 /* HANT */
23 #define CNS3XXX_EMBEDDED_SRAM_BASE 0x70002000 /* HANT Embedded SRAM */
25 #define CNS3XXX_SSP_BASE 0x71000000 /* Synchronous Serial Port - SPI/PCM/I2C */
27 #define CNS3XXX_DMC_BASE 0x72000000 /* DMC Control (DDR2 SDRAM) */
29 #define CNS3XXX_SMC_BASE 0x73000000 /* SMC Control */
31 #define SMC_MEMC_STATUS_OFFSET 0x000
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt7996/
Dregs.h42 #define MT_MCU_INT_EVENT 0x2108
43 #define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0)
48 #define MT_PLE_BASE 0x820c0000
51 #define MT_FL_Q_EMPTY MT_PLE(0x360)
52 #define MT_FL_Q0_CTRL MT_PLE(0x3e0)
53 #define MT_FL_Q2_CTRL MT_PLE(0x3e8)
54 #define MT_FL_Q3_CTRL MT_PLE(0x3ec)
56 #define MT_PLE_FREEPG_CNT MT_PLE(0x380)
57 #define MT_PLE_FREEPG_HEAD_TAIL MT_PLE(0x384)
58 #define MT_PLE_PG_HIF_GROUP MT_PLE(0x00c)
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi104 pwms = <&pwm1 0 3337 0>;
106 pwm-dutycycle-range = <100 0>;
133 pwms = <&pwm2 0 3337 0>;
135 pwm-dutycycle-range = <100 0>;
162 pwms = <&pwm0 0 3337 0>;
164 pwm-dutycycle-range = <100 0>;
227 pinctrl-0 = <&sd_slot_pwr_en>;
245 pinctrl-0 = <&sd_io_pwr_en &sd_pwr_1800_sel>;
250 states = <1800000 0x1>,
251 <3000000 0x0>;
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/amd/
Dlance.c67 static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
77 .id_offset14 = 0x57,
78 .id_offset15 = 0x57,
81 .id_offset14 = 0x52,
82 .id_offset15 = 0x44,
85 .id_offset14 = 0x52,
86 .id_offset15 = 0x49,
118 {0x300, 0x320, 0x340, 0x360}.
205 #define LANCE_DATA 0x10
206 #define LANCE_ADDR 0x12
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/amd/
Dlance.c66 static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
76 .id_offset14 = 0x57,
77 .id_offset15 = 0x57,
80 .id_offset14 = 0x52,
81 .id_offset15 = 0x44,
84 .id_offset14 = 0x52,
85 .id_offset15 = 0x49,
117 {0x300, 0x320, 0x340, 0x360}.
204 #define LANCE_DATA 0x10
205 #define LANCE_ADDR 0x12
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw88/
Drtw8822b_table.c10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822b_table.c10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
[all …]
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/sound/
Dasound.h31 #define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff)
32 #define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff)
33 #define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff)
48 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
50 SNDRV_HWDEP_IFACE_OPL2 = 0,
102 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int)
103 #define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info)
104 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
105 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
106 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15)
[all …]
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/sound/
Dasound.h31 #define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff)
32 #define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff)
33 #define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff)
48 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
50 SNDRV_HWDEP_IFACE_OPL2 = 0,
102 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int)
103 #define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info)
104 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
105 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
106 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15)
[all …]

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