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/kernel/linux/linux-5.10/drivers/clk/qcom/
Dvideocc-sm8150.c31 { 249600000, 2000000000, 0 },
35 .l = 0x14,
36 .alpha = 0xD555,
37 .config_ctl_val = 0x20485699,
38 .config_ctl_hi_val = 0x00002267,
39 .config_ctl_hi1_val = 0x00000024,
40 .test_ctl_hi1_val = 0x00000020,
41 .user_ctl_val = 0x00000000,
42 .user_ctl_hi_val = 0x00000805,
43 .user_ctl_hi1_val = 0x000000D0,
[all …]
Dvideocc-sdm845.c30 { P_BI_TCXO, 0 },
46 .l = 0x10,
47 .alpha = 0xaaab,
51 .offset = 0x42c,
64 F(100000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
65 F(200000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
66 F(330000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
67 F(404000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
68 F(444000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
69 F(533000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
[all …]
Dvideocc-sc7180.c30 { 249600000, 2000000000, 0 },
34 .offset = 0x42c,
51 { P_BI_TCXO, 0 },
61 F(19200000, P_BI_TCXO, 1, 0, 0),
62 F(150000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
63 F(270000000, P_VIDEO_PLL0_OUT_MAIN, 2.5, 0, 0),
64 F(340000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
65 F(434000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
66 F(500000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
71 .cmd_rcgr = 0x7f0,
[all …]
/kernel/linux/linux-6.6/drivers/clk/qcom/
Dvideocc-sm8150.c27 { 249600000, 2000000000, 0 },
31 .l = 0x14,
32 .alpha = 0xD555,
33 .config_ctl_val = 0x20485699,
34 .config_ctl_hi_val = 0x00002267,
35 .config_ctl_hi1_val = 0x00000024,
36 .test_ctl_hi1_val = 0x00000020,
37 .user_ctl_val = 0x00000000,
38 .user_ctl_hi_val = 0x00000805,
39 .user_ctl_hi1_val = 0x000000D0,
[all …]
Dvideocc-sdm845.c29 .l = 0x10,
30 .alpha = 0xaaab,
34 .offset = 0x42c,
49 { P_BI_TCXO, 0 },
63 F(100000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
64 F(200000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
65 F(330000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
66 F(404000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
67 F(444000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
68 F(533000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
[all …]
Dvideocc-sc7180.c26 { 249600000, 2000000000, 0 },
30 .offset = 0x42c,
47 { P_BI_TCXO, 0 },
57 F(19200000, P_BI_TCXO, 1, 0, 0),
58 F(150000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
59 F(270000000, P_VIDEO_PLL0_OUT_MAIN, 2.5, 0, 0),
60 F(340000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
61 F(434000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
62 F(500000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
67 .cmd_rcgr = 0x7f0,
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/
Dhi3798cv200-perictrl.yaml48 reg = <0x8a20000 0x1000>;
51 ranges = <0x0 0x8a20000 0x1000>;
55 reg = <0x850 0x8>;
58 resets = <&crg 0x188 4>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/hisilicon/controller/
Dhi3798cv200-perictrl.yaml48 reg = <0x8a20000 0x1000>;
51 ranges = <0x0 0x8a20000 0x1000>;
55 reg = <0x850 0x8>;
58 resets = <&crg 0x188 4>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dphy-hi3798cv200-combphy.txt37 reg = <0x8a20000 0x1000>;
40 ranges = <0x0 0x8a20000 0x1000>;
44 reg = <0x850 0x8>;
47 resets = <&crg 0x188 4>;
53 reg = <0x858 0x8>;
56 resets = <&crg 0x188 12>;
57 hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dphy-hi3798cv200-combphy.txt37 reg = <0x8a20000 0x1000>;
40 ranges = <0x0 0x8a20000 0x1000>;
44 reg = <0x850 0x8>;
47 resets = <&crg 0x188 4>;
53 reg = <0x858 0x8>;
56 resets = <&crg 0x188 12>;
57 hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>;
/kernel/linux/linux-5.10/include/dt-bindings/pinctrl/
Dam33xx.h18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
/kernel/linux/linux-6.6/include/dt-bindings/pinctrl/
Dam33xx.h18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ddra76x-mmc-iodelay.dtsi32 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
33 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
34 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
35 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
36 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
37 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
43 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
44 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
45 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
46 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
[all …]
Ddra74x-mmc-iodelay.dtsi43 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
44 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
45 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
46 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
47 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
48 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
54 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
55 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
56 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
57 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Ddra76x-mmc-iodelay.dtsi32 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
33 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
34 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
35 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
36 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
37 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
43 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
44 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
45 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
46 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
[all …]
Ddra74x-mmc-iodelay.dtsi35 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
36 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
37 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
38 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
39 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
40 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
46 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
47 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
48 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
49 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw88/
Drtw8822b.h13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822b.h13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
Drtw8821c.h13 u8 mac_addr[ETH_ALEN]; /* 0xd0 */
21 u8 ltr_cap; /* 0xe3 */
26 u8 res0:2; /* 0xf4 */
50 u8 res0[0x0e];
55 u8 channel_plan; /* 0xb8 */
59 u8 pa_type; /* 0xbc */
60 u8 lna_type_2g[2]; /* 0xbd */
70 u8 rf_antenna_option; /* 0xc9 */
82 /* 0xC00-0xCFF and 0xE00-0xEFF have the same layout */ in _rtw_write32s_mask()
84 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
[all …]
/kernel/linux/linux-6.6/drivers/infiniband/hw/hns/
Dhns_roce_common.h53 } while (0)
108 #define ROCEE_VENDOR_ID_REG 0x0
109 #define ROCEE_VENDOR_PART_ID_REG 0x4
111 #define ROCEE_SYS_IMAGE_GUID_L_REG 0xC
112 #define ROCEE_SYS_IMAGE_GUID_H_REG 0x10
114 #define ROCEE_PORT_GID_L_0_REG 0x50
115 #define ROCEE_PORT_GID_ML_0_REG 0x54
116 #define ROCEE_PORT_GID_MH_0_REG 0x58
117 #define ROCEE_PORT_GID_H_0_REG 0x5C
119 #define ROCEE_BT_CMD_H_REG 0x204
[all …]
/kernel/linux/linux-6.6/Documentation/dev-tools/
Dkmsan.rst32 BUG: KMSAN: uninit-value in test_uninit_kmsan_check_memory+0x1be/0x380 [kmsan_test]
33 test_uninit_kmsan_check_memory+0x1be/0x380 mm/kmsan/kmsan_test.c:273
35 kunit_try_run_case+0x206/0x420 lib/kunit/test.c:374
36 kunit_generic_run_threadfn_adapter+0x6d/0xc0 lib/kunit/try-catch.c:28
37 kthread+0x721/0x850 kernel/kthread.c:327
38 ret_from_fork+0x1f/0x30 ??:?
41 do_uninit_local_array+0xfa/0x110 mm/kmsan/kmsan_test.c:260
42 test_uninit_kmsan_check_memory+0x1a2/0x380 mm/kmsan/kmsan_test.c:271
44 kunit_try_run_case+0x206/0x420 lib/kunit/test.c:374
45 kunit_generic_run_threadfn_adapter+0x6d/0xc0 lib/kunit/try-catch.c:28
[all …]
/kernel/linux/linux-6.6/sound/soc/sh/rcar/
Dgen.c52 RSND_REG_SET(id, offset, 0, #id)
68 return 0; in rsnd_is_accessible_reg()
90 return 0; in rsnd_mod_read()
173 memset(&regc, 0, sizeof(regc)); in _rsnd_gen_regmap_init()
198 for (i = 0; i < conf_size; i++) { in _rsnd_gen_regmap_init()
202 regf.lsb = 0; in _rsnd_gen_regmap_init()
215 return 0; in _rsnd_gen_regmap_init()
224 RSND_GEN_S_REG(SSI_SYS_INT_ENABLE0, 0x850), in rsnd_gen4_probe()
225 RSND_GEN_S_REG(SSI_SYS_INT_ENABLE2, 0x858), in rsnd_gen4_probe()
226 RSND_GEN_S_REG(SSI_SYS_INT_ENABLE4, 0x890), in rsnd_gen4_probe()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_backend.h20 #define SUN4I_BACKEND_MODCTL_REG 0x800
24 #define SUN4I_BACKEND_MODCTL_OUT_LCD0 (0 << 20)
34 #define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0)
36 #define SUN4I_BACKEND_BACKCOLOR_REG 0x804
39 #define SUN4I_BACKEND_DISSIZE_REG 0x808
40 #define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \
41 (((w) - 1) & 0xffff))
43 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l)))
44 #define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \
45 (((w) - 1) & 0x1fff))
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/sun4i/
Dsun4i_backend.h20 #define SUN4I_BACKEND_MODCTL_REG 0x800
24 #define SUN4I_BACKEND_MODCTL_OUT_LCD0 (0 << 20)
34 #define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0)
36 #define SUN4I_BACKEND_BACKCOLOR_REG 0x804
39 #define SUN4I_BACKEND_DISSIZE_REG 0x808
40 #define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \
41 (((w) - 1) & 0xffff))
43 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l)))
44 #define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \
45 (((w) - 1) & 0x1fff))
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/hw/hns/
Dhns_roce_common.h51 } while (0)
69 #define ROCEE_DMAE_USER_CFG1_ROCEE_STREAM_ID_TB_CFG_S 0
77 #define ROCEE_DMAE_USER_CFG2_ROCEE_STREAM_ID_PKT_CFG_S 0
85 #define ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_S 0
93 #define ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_S 0
101 #define ROCEE_RAQ_WL_ROCEE_RAQ_WL_S 0
105 #define ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_POL_TIME_INTERVAL_S 0
119 #define ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_SHIFT_S 0
127 #define ROCEE_EXT_DB_OTH_H_EXT_DB_OTH_SHIFT_S 0
135 #define ROCEE_EXT_RAQ_H_EXT_RAQ_SHIFT_S 0
[all …]

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