Searched +full:0 +full:x8c8 (Results 1 – 25 of 90) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | usb-xhci.yaml | 38 reg = <0xf0930000 0x8c8>;
39 interrupts = <0x0 0x4e 0x0>;
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| D | generic-xhci.yaml | 63 reg = <0xf0931000 0x8c8>;
64 interrupts = <0x0 0x4e 0x0>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | usb-xhci.txt | 39 reg = <0xf0931000 0x8c8>;
40 interrupts = <0x0 0x4e 0x0>;
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| /kernel/linux/linux-5.10/drivers/crypto/qat/qat_common/ |
| D | icp_qat_hal.h | 8 MISC_CONTROL = 0x04,
9 ICP_RESET = 0x0c,
10 ICP_GLOBAL_CLK_ENABLE = 0x50
14 USTORE_ADDRESS = 0x000,
15 USTORE_DATA_LOWER = 0x004,
16 USTORE_DATA_UPPER = 0x008,
17 ALU_OUT = 0x010,
18 CTX_ARB_CNTL = 0x014,
19 CTX_ENABLES = 0x018,
20 CC_ENABLE = 0x01c,
[all …]
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| /kernel/linux/linux-5.10/include/dt-bindings/pinctrl/ |
| D | am33xx.h | 18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
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| /kernel/linux/linux-6.6/include/dt-bindings/pinctrl/ |
| D | am33xx.h | 18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
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| /kernel/linux/linux-6.6/drivers/crypto/intel/qat/qat_common/ |
| D | icp_qat_hal.h | 8 MISC_CONTROL = 0xA04,
9 ICP_RESET = 0xA0c,
10 ICP_GLOBAL_CLK_ENABLE = 0xA50
14 MISC_CONTROL_C4XXX = 0xAA0,
15 ICP_RESET_CPP0 = 0x938,
16 ICP_RESET_CPP1 = 0x93c,
17 ICP_GLOBAL_CLK_ENABLE_CPP0 = 0x964,
18 ICP_GLOBAL_CLK_ENABLE_CPP1 = 0x968
22 USTORE_ADDRESS = 0x000,
23 USTORE_DATA_LOWER = 0x004,
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | am335x-guardian.dts | 22 cpu@0 {
29 reg = <0x80000000 0x10000000>; /* 256 MB */
35 #size-cells = <0>;
37 pinctrl-0 = <&gpio_keys_pins>;
42 gpios = <&gpio2 21 0>;
50 pinctrl-0 = <&leds_pins>;
70 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
84 hsync-active = <0>;
85 vsync-active = <0>;
90 ac-bias-intrpt = <0>;
[all …]
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| D | am437x-sbc-t43.dts | 21 AM4372_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
22 AM4372_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
23 AM4372_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
24 AM4372_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
25 AM4372_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
26 AM4372_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
27 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
28 AM4372_IOPAD(0x964, PIN_INPUT | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
34 AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam0 hd -> DSS DATA 23 */
35 AM4372_IOPAD(0x9b4, PIN_OUTPUT_PULLUP | MUX_MODE2)
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw88/ |
| D | rtw8822b.h | 13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
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| D | rtw8821c.h | 13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| D | btcd.h | 29 #define GENERAL_PWRMGT 0x63c
30 # define GLOBAL_PWRMGT_EN (1 << 0)
47 #define TARGET_AND_CURRENT_PROFILE_INDEX 0x66c
48 # define CURRENT_PROFILE_INDEX_MASK (0xf << 4)
51 #define CG_BIF_REQ_AND_RSP 0x7f4
52 #define CG_CLIENT_REQ(x) ((x) << 0)
53 #define CG_CLIENT_REQ_MASK (0xff << 0)
54 #define CG_CLIENT_REQ_SHIFT 0
56 #define CG_CLIENT_RESP_MASK (0xff << 8)
59 #define CLIENT_CG_REQ_MASK (0xff << 16)
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | btcd.h | 29 #define GENERAL_PWRMGT 0x63c
30 # define GLOBAL_PWRMGT_EN (1 << 0)
47 #define TARGET_AND_CURRENT_PROFILE_INDEX 0x66c
48 # define CURRENT_PROFILE_INDEX_MASK (0xf << 4)
51 #define CG_BIF_REQ_AND_RSP 0x7f4
52 #define CG_CLIENT_REQ(x) ((x) << 0)
53 #define CG_CLIENT_REQ_MASK (0xff << 0)
54 #define CG_CLIENT_REQ_SHIFT 0
56 #define CG_CLIENT_RESP_MASK (0xff << 8)
59 #define CLIENT_CG_REQ_MASK (0xff << 16)
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/ |
| D | rtw8822b.h | 13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
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| D | rtw8821c.h | 13 u8 mac_addr[ETH_ALEN]; /* 0xd0 */
21 u8 ltr_cap; /* 0xe3 */
26 u8 res0:2; /* 0xf4 */
50 u8 res0[0x0e];
55 u8 channel_plan; /* 0xb8 */
59 u8 pa_type; /* 0xbc */
60 u8 lna_type_2g[2]; /* 0xbd */
70 u8 rf_antenna_option; /* 0xc9 */
82 /* 0xC00-0xCFF and 0xE00-0xEFF have the same layout */ in _rtw_write32s_mask()
84 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | am437x-sbc-t43.dts | 21 AM4372_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
22 AM4372_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
23 AM4372_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
24 AM4372_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
25 AM4372_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
26 AM4372_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
27 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
28 AM4372_IOPAD(0x964, PIN_INPUT | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
34 AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam0 hd -> DSS DATA 23 */
35 AM4372_IOPAD(0x9b4, PIN_OUTPUT_PULLUP | MUX_MODE2)
[all …]
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| D | am335x-guardian.dts | 22 cpu@0 {
29 reg = <0x80000000 0x10000000>; /* 256 MB */
34 pinctrl-0 = <&guardian_button_pins>;
54 pinctrl-0 = <&guardian_led_pins>;
73 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
87 hsync-active = <0>;
88 vsync-active = <0>;
93 ac-bias-intrpt = <0>;
97 fdd = <0x80>;
98 sync-edge = <0>;
[all …]
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| /kernel/linux/linux-6.6/drivers/net/dsa/ |
| D | rzn1_a5psw.h | 18 #define A5PSW_REVISION 0x0
19 #define A5PSW_PORT_OFFSET(port) (0x400 * (port))
21 #define A5PSW_PORT_ENA 0x8
26 #define A5PSW_UCAST_DEF_MASK 0xC
28 #define A5PSW_VLAN_VERIFY 0x10
29 #define A5PSW_VLAN_VERI_SHIFT 0
32 #define A5PSW_BCAST_DEF_MASK 0x14
33 #define A5PSW_MCAST_DEF_MASK 0x18
35 #define A5PSW_INPUT_LEARN 0x1C
39 #define A5PSW_MGMT_CFG 0x20
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
| D | sleep-tegra20.S | 23 #define EMC_CFG 0xc
24 #define EMC_ADR_CFG 0x10
25 #define EMC_NOP 0xdc
26 #define EMC_SELF_REF 0xe0
27 #define EMC_REQ_CTRL 0x2b0
28 #define EMC_EMC_STATUS 0x2b4
30 #define CLK_RESET_CCLK_BURST 0x20
31 #define CLK_RESET_CCLK_DIVIDER 0x24
32 #define CLK_RESET_SCLK_BURST 0x28
33 #define CLK_RESET_SCLK_DIVIDER 0x2c
[all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-tegra/ |
| D | sleep-tegra20.S | 23 #define EMC_CFG 0xc
24 #define EMC_ADR_CFG 0x10
25 #define EMC_NOP 0xdc
26 #define EMC_SELF_REF 0xe0
27 #define EMC_REQ_CTRL 0x2b0
28 #define EMC_EMC_STATUS 0x2b4
30 #define CLK_RESET_CCLK_BURST 0x20
31 #define CLK_RESET_CCLK_DIVIDER 0x24
32 #define CLK_RESET_SCLK_BURST 0x28
33 #define CLK_RESET_SCLK_DIVIDER 0x2c
[all …]
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| /kernel/linux/linux-6.6/drivers/pci/controller/dwc/ |
| D | pcie-fu740.c | 41 #define SIFIVE_DEVICESRESETREG 0x28
43 #define PCIEX8MGMT_PERST_N 0x0
44 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10
45 #define PCIEX8MGMT_APP_HOLD_PHY_RST 0x18
46 #define PCIEX8MGMT_DEVICE_TYPE 0x708
47 #define PCIEX8MGMT_PHY0_CR_PARA_ADDR 0x860
48 #define PCIEX8MGMT_PHY0_CR_PARA_RD_EN 0x870
49 #define PCIEX8MGMT_PHY0_CR_PARA_RD_DATA 0x878
50 #define PCIEX8MGMT_PHY0_CR_PARA_SEL 0x880
51 #define PCIEX8MGMT_PHY0_CR_PARA_WR_DATA 0x888
[all …]
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| /kernel/linux/linux-6.6/drivers/media/pci/cx18/ |
| D | cx18-av-core.h | 32 CX18_AV_SVIDEO_LUMA1 = 0x10,
33 CX18_AV_SVIDEO_LUMA2 = 0x20,
34 CX18_AV_SVIDEO_LUMA3 = 0x30,
35 CX18_AV_SVIDEO_LUMA4 = 0x40,
36 CX18_AV_SVIDEO_LUMA5 = 0x50,
37 CX18_AV_SVIDEO_LUMA6 = 0x60,
38 CX18_AV_SVIDEO_LUMA7 = 0x70,
39 CX18_AV_SVIDEO_LUMA8 = 0x80,
40 CX18_AV_SVIDEO_CHROMA4 = 0x400,
41 CX18_AV_SVIDEO_CHROMA5 = 0x500,
[all …]
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| /kernel/linux/linux-5.10/drivers/media/pci/cx18/ |
| D | cx18-av-core.h | 32 CX18_AV_SVIDEO_LUMA1 = 0x10,
33 CX18_AV_SVIDEO_LUMA2 = 0x20,
34 CX18_AV_SVIDEO_LUMA3 = 0x30,
35 CX18_AV_SVIDEO_LUMA4 = 0x40,
36 CX18_AV_SVIDEO_LUMA5 = 0x50,
37 CX18_AV_SVIDEO_LUMA6 = 0x60,
38 CX18_AV_SVIDEO_LUMA7 = 0x70,
39 CX18_AV_SVIDEO_LUMA8 = 0x80,
40 CX18_AV_SVIDEO_CHROMA4 = 0x400,
41 CX18_AV_SVIDEO_CHROMA5 = 0x500,
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/renesas/ |
| D | rcar-gen4-cpg.c | 31 #define CPG_PLLECR 0x0820 /* PLL Enable Control Register */
36 #define CPG_PLL1CR0 0x830 /* PLLn Control Registers */
37 #define CPG_PLL1CR1 0x8b0
38 #define CPG_PLL2CR0 0x834
39 #define CPG_PLL2CR1 0x8b8
40 #define CPG_PLL3CR0 0x83c
41 #define CPG_PLL3CR1 0x8c0
42 #define CPG_PLL4CR0 0x844
43 #define CPG_PLL4CR1 0x8c8
44 #define CPG_PLL6CR0 0x84c
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/bcmbca/ |
| D | bcm4908.dtsi | 26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0x0>;
33 cpu-release-addr = <0x0 0xfff8>;
40 reg = <0x1>;
42 cpu-release-addr = <0x0 0xfff8>;
49 reg = <0x2>;
51 cpu-release-addr = <0x0 0xfff8>;
58 reg = <0x3>;
60 cpu-release-addr = <0x0 0xfff8>;
[all …]
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