Searched +full:0 +full:xc41 (Results 1 – 18 of 18) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ |
| D | qcom,sm8250-camss.yaml | 113 port@0: 308 reg = <0 0xac6a000 0 0x2000>, 309 <0 0xac6c000 0 0x2000>, 310 <0 0xac6e000 0 0x1000>, 311 <0 0xac70000 0 0x1000>, 312 <0 0xac72000 0 0x1000>, 313 <0 0xac74000 0 0x1000>, 314 <0 0xacb4000 0 0xd000>, 315 <0 0xacc3000 0 0xd000>, 316 <0 0xacd9000 0 0x2200>, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_2_4_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 28 #define mmIH_VMID_1_LUT 0xe01 29 #define mmIH_VMID_2_LUT 0xe02 30 #define mmIH_VMID_3_LUT 0xe03 31 #define mmIH_VMID_4_LUT 0xe04 32 #define mmIH_VMID_5_LUT 0xe05 33 #define mmIH_VMID_6_LUT 0xe06 34 #define mmIH_VMID_7_LUT 0xe07 35 #define mmIH_VMID_8_LUT 0xe08 36 #define mmIH_VMID_9_LUT 0xe09 [all …]
|
| D | oss_3_0_1_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 28 #define mmIH_VMID_1_LUT 0xe01 29 #define mmIH_VMID_2_LUT 0xe02 30 #define mmIH_VMID_3_LUT 0xe03 31 #define mmIH_VMID_4_LUT 0xe04 32 #define mmIH_VMID_5_LUT 0xe05 33 #define mmIH_VMID_6_LUT 0xe06 34 #define mmIH_VMID_7_LUT 0xe07 35 #define mmIH_VMID_8_LUT 0xe08 36 #define mmIH_VMID_9_LUT 0xe09 [all …]
|
| D | oss_2_0_d.h | 27 #define mmIH_VMID_0_LUT 0xf50 28 #define mmIH_VMID_1_LUT 0xf51 29 #define mmIH_VMID_2_LUT 0xf52 30 #define mmIH_VMID_3_LUT 0xf53 31 #define mmIH_VMID_4_LUT 0xf54 32 #define mmIH_VMID_5_LUT 0xf55 33 #define mmIH_VMID_6_LUT 0xf56 34 #define mmIH_VMID_7_LUT 0xf57 35 #define mmIH_VMID_8_LUT 0xf58 36 #define mmIH_VMID_9_LUT 0xf59 [all …]
|
| D | oss_3_0_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 28 #define mmIH_VMID_1_LUT 0xe01 29 #define mmIH_VMID_2_LUT 0xe02 30 #define mmIH_VMID_3_LUT 0xe03 31 #define mmIH_VMID_4_LUT 0xe04 32 #define mmIH_VMID_5_LUT 0xe05 33 #define mmIH_VMID_6_LUT 0xe06 34 #define mmIH_VMID_7_LUT 0xe07 35 #define mmIH_VMID_8_LUT 0xe08 36 #define mmIH_VMID_9_LUT 0xe09 [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_2_4_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 28 #define mmIH_VMID_1_LUT 0xe01 29 #define mmIH_VMID_2_LUT 0xe02 30 #define mmIH_VMID_3_LUT 0xe03 31 #define mmIH_VMID_4_LUT 0xe04 32 #define mmIH_VMID_5_LUT 0xe05 33 #define mmIH_VMID_6_LUT 0xe06 34 #define mmIH_VMID_7_LUT 0xe07 35 #define mmIH_VMID_8_LUT 0xe08 36 #define mmIH_VMID_9_LUT 0xe09 [all …]
|
| D | oss_3_0_1_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 28 #define mmIH_VMID_1_LUT 0xe01 29 #define mmIH_VMID_2_LUT 0xe02 30 #define mmIH_VMID_3_LUT 0xe03 31 #define mmIH_VMID_4_LUT 0xe04 32 #define mmIH_VMID_5_LUT 0xe05 33 #define mmIH_VMID_6_LUT 0xe06 34 #define mmIH_VMID_7_LUT 0xe07 35 #define mmIH_VMID_8_LUT 0xe08 36 #define mmIH_VMID_9_LUT 0xe09 [all …]
|
| D | oss_2_0_d.h | 27 #define mmIH_VMID_0_LUT 0xf50 28 #define mmIH_VMID_1_LUT 0xf51 29 #define mmIH_VMID_2_LUT 0xf52 30 #define mmIH_VMID_3_LUT 0xf53 31 #define mmIH_VMID_4_LUT 0xf54 32 #define mmIH_VMID_5_LUT 0xf55 33 #define mmIH_VMID_6_LUT 0xf56 34 #define mmIH_VMID_7_LUT 0xf57 35 #define mmIH_VMID_8_LUT 0xf58 36 #define mmIH_VMID_9_LUT 0xf59 [all …]
|
| D | oss_3_0_d.h | 27 #define mmIH_VMID_0_LUT 0xe00 28 #define mmIH_VMID_1_LUT 0xe01 29 #define mmIH_VMID_2_LUT 0xe02 30 #define mmIH_VMID_3_LUT 0xe03 31 #define mmIH_VMID_4_LUT 0xe04 32 #define mmIH_VMID_5_LUT 0xe05 33 #define mmIH_VMID_6_LUT 0xe06 34 #define mmIH_VMID_7_LUT 0xe07 35 #define mmIH_VMID_8_LUT 0xe08 36 #define mmIH_VMID_9_LUT 0xe09 [all …]
|
| /kernel/linux/linux-5.10/drivers/clk/renesas/ |
| D | r9a06g032-clocks.c | 37 uint32_t source : 8; /* source index + 1 (0 == none) */ 90 enum { K_GATE = 0, K_FFC, K_DIV, K_BITSEL, K_DUALGATE }; 93 #define R9A06G032_CLKOUT 0 138 D_DIV(CLKOUT_D1OR2, "clkout_d1or2", CLKOUT, 0, 1, 2), 159 D_GATE(CLK_25_PG4, "clk_25_pg4", CLKOUT_D40, 0x749, 0x74a, 0x74b, 0, 0xae3, 0, 0), 160 D_GATE(CLK_25_PG5, "clk_25_pg5", CLKOUT_D40, 0x74c, 0x74d, 0x74e, 0, 0xae4, 0, 0), 161 D_GATE(CLK_25_PG6, "clk_25_pg6", CLKOUT_D40, 0x74f, 0x750, 0x751, 0, 0xae5, 0, 0), 162 D_GATE(CLK_25_PG7, "clk_25_pg7", CLKOUT_D40, 0x752, 0x753, 0x754, 0, 0xae6, 0, 0), 163 D_GATE(CLK_25_PG8, "clk_25_pg8", CLKOUT_D40, 0x755, 0x756, 0x757, 0, 0xae7, 0, 0), 164 D_GATE(CLK_ADC, "clk_adc", DIV_ADC, 0x1ea, 0x1eb, 0, 0, 0, 0, 0), [all …]
|
| /kernel/linux/linux-6.6/include/linux/mfd/madera/ |
| D | registers.h | 14 #define MADERA_SOFTWARE_RESET 0x00 15 #define MADERA_HARDWARE_REVISION 0x01 16 #define MADERA_CTRL_IF_CFG_1 0x08 17 #define MADERA_CTRL_IF_CFG_2 0x09 18 #define MADERA_CTRL_IF_CFG_3 0x0A 19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16 20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17 21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18 22 #define MADERA_TONE_GENERATOR_1 0x20 23 #define MADERA_TONE_GENERATOR_2 0x21 [all …]
|
| /kernel/linux/linux-5.10/include/linux/mfd/madera/ |
| D | registers.h | 14 #define MADERA_SOFTWARE_RESET 0x00 15 #define MADERA_HARDWARE_REVISION 0x01 16 #define MADERA_CTRL_IF_CFG_1 0x08 17 #define MADERA_CTRL_IF_CFG_2 0x09 18 #define MADERA_CTRL_IF_CFG_3 0x0A 19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16 20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17 21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18 22 #define MADERA_TONE_GENERATOR_1 0x20 23 #define MADERA_TONE_GENERATOR_2 0x21 [all …]
|
| /kernel/linux/linux-5.10/drivers/mfd/ |
| D | cs47l90-tables.c | 18 { 0x8A, 0x5555 }, 19 { 0x8A, 0xAAAA }, 20 { 0x4CF, 0x0700 }, 21 { 0x171, 0x0003 }, 22 { 0x101, 0x0444 }, 23 { 0x159, 0x0002 }, 24 { 0x120, 0x0444 }, 25 { 0x1D1, 0x0004 }, 26 { 0x1E0, 0xC084 }, 27 { 0x159, 0x0000 }, [all …]
|
| D | cs47l85-tables.c | 18 { 0x80, 0x0003 }, 19 { 0x213, 0x03E4 }, 20 { 0x177, 0x0281 }, 21 { 0x197, 0x0281 }, 22 { 0x1B7, 0x0281 }, 23 { 0x4B1, 0x010A }, 24 { 0x4CF, 0x0933 }, 25 { 0x36C, 0x011B }, 26 { 0x4B8, 0x1120 }, 27 { 0x4A0, 0x3280 }, [all …]
|
| /kernel/linux/linux-6.6/drivers/mfd/ |
| D | cs47l90-tables.c | 18 { 0x8A, 0x5555 }, 19 { 0x8A, 0xAAAA }, 20 { 0x4CF, 0x0700 }, 21 { 0x171, 0x0003 }, 22 { 0x101, 0x0444 }, 23 { 0x159, 0x0002 }, 24 { 0x120, 0x0444 }, 25 { 0x1D1, 0x0004 }, 26 { 0x1E0, 0xC084 }, 27 { 0x159, 0x0000 }, [all …]
|
| D | cs47l85-tables.c | 18 { 0x80, 0x0003 }, 19 { 0x213, 0x03E4 }, 20 { 0x177, 0x0281 }, 21 { 0x197, 0x0281 }, 22 { 0x1B7, 0x0281 }, 23 { 0x4B1, 0x010A }, 24 { 0x4CF, 0x0933 }, 25 { 0x36C, 0x011B }, 26 { 0x4B8, 0x1120 }, 27 { 0x4A0, 0x3280 }, [all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/ |
| D | sm8250.dtsi | 81 #clock-cells = <0>; 89 #clock-cells = <0>; 95 #size-cells = <0>; 97 CPU0: cpu@0 { 100 reg = <0x0 0x0>; 101 clocks = <&cpufreq_hw 0>; 108 qcom,freq-domain = <&cpufreq_hw 0>; 110 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 116 cache-size = <0x20000>; 122 cache-size = <0x400000>; [all …]
|
| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0020_linux_drivers_gpu.patch | 127 @@ -0,0 +1,868 @@ 175 + if ((native == true) && ((msg->size == 0) || (msg->buffer == NULL))) { 190 + for (i = 0; i < msg->size; ++i) { 207 + if (ret < 0) 217 + u8 i2c_status = 0u; 218 + u16 respSize = 0u; 225 + if (ret < 0) { 232 + if (ret < 0) { 240 + case 0u: 259 + u8 i2c_status = 0u; [all …]
|