| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/ |
| D | brcm,sata-brcm.txt | 30 reg = <0xf045a000 0xa9c>, <0xf0458040 0x24>; 32 interrupts = <0 30 0>; 34 #size-cells = <0>; 36 sata0: sata-port@0 { 37 reg = <0>; 38 phys = <&sata_phy 0>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/ata/ |
| D | brcm,sata-brcm.yaml | 72 reg = <0xf045a000 0xa9c>, <0xf0458040 0x24>; 74 interrupts = <0 30 0>; 76 #size-cells = <0>; 78 sata0: sata-port@0 { 79 reg = <0>; 80 phys = <&sata_phy 0>;
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/ |
| D | bcm7445.dtsi | 17 #size-cells = <0>; 19 cpu@0 { 23 reg = <0>; 50 reg = <0x00 0xffd01000 0x00 0x1000>, 51 <0x00 0xffd02000 0x00 0x2000>, 52 <0x00 0xffd04000 0x00 0x2000>, 53 <0x00 0xffd06000 0x00 0x2000>; 70 ranges = <0 0x00 0xf0000000 0x1000000>; 74 reg = <0x40ab00 0x20>; 84 reg = <0x404000 0x51c>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | bcm7445.dtsi | 17 #size-cells = <0>; 19 cpu@0 { 23 reg = <0>; 50 reg = <0x00 0xffd01000 0x00 0x1000>, 51 <0x00 0xffd02000 0x00 0x2000>, 52 <0x00 0xffd04000 0x00 0x2000>, 53 <0x00 0xffd06000 0x00 0x2000>; 70 ranges = <0 0x00 0xf0000000 0x1000000>; 74 reg = <0x40ab00 0x20>; 84 reg = <0x404000 0x51c>; [all …]
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| /kernel/linux/linux-5.10/arch/mips/boot/dts/brcm/ |
| D | bcm7362.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 31 #address-cells = <0>; 41 #clock-cells = <0>; 47 #clock-cells = <0>; 57 ranges = <0 0x10000000 0x01000000>; 61 reg = <0x411400 0x30>, <0x411600 0x30>; 72 reg = <0x403000 0x30>; 81 reg = <0x400000 0xdc>; [all …]
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| D | bcm7360.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 25 #address-cells = <0>; 35 #clock-cells = <0>; 41 #clock-cells = <0>; 51 ranges = <0 0x10000000 0x01000000>; 55 reg = <0x411400 0x30>; 66 reg = <0x403000 0x30>; 75 reg = <0x400000 0xdc>; [all …]
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| D | bcm7346.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 31 #address-cells = <0>; 41 #clock-cells = <0>; 47 #clock-cells = <0>; 57 ranges = <0 0x10000000 0x01000000>; 61 reg = <0x411400 0x30>, <0x411600 0x30>; 72 reg = <0x403000 0x30>; 81 reg = <0x400000 0xdc>; [all …]
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| D | bcm7435.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 43 #address-cells = <0>; 53 #clock-cells = <0>; 59 #clock-cells = <0>; 69 ranges = <0 0x10000000 0x01000000>; 73 reg = <0x41b500 0x40>, <0x41b600 0x40>, 74 <0x41b700 0x40>, <0x41b800 0x40>; 85 reg = <0x403000 0x30>; [all …]
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| D | bcm7425.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 31 #address-cells = <0>; 41 #clock-cells = <0>; 47 #clock-cells = <0>; 57 ranges = <0 0x10000000 0x01000000>; 61 reg = <0x41a400 0x30>, <0x41a600 0x30>; 72 reg = <0x403000 0x30>; 81 reg = <0x400000 0xdc>; [all …]
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/brcm/ |
| D | bcm7360.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 25 #address-cells = <0>; 35 #clock-cells = <0>; 41 #clock-cells = <0>; 51 ranges = <0 0x10000000 0x01000000>; 55 reg = <0x411400 0x30>; 66 reg = <0x403000 0x30>; 75 reg = <0x400000 0xdc>; [all …]
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| D | bcm7362.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 31 #address-cells = <0>; 41 #clock-cells = <0>; 47 #clock-cells = <0>; 57 ranges = <0 0x10000000 0x01000000>; 61 reg = <0x411400 0x30>, <0x411600 0x30>; 72 reg = <0x403000 0x30>; 81 reg = <0x400000 0xdc>; [all …]
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| D | bcm7346.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 31 #address-cells = <0>; 41 #clock-cells = <0>; 47 #clock-cells = <0>; 57 ranges = <0 0x10000000 0x01000000>; 61 reg = <0x411400 0x30>, <0x411600 0x30>; 72 reg = <0x403000 0x30>; 81 reg = <0x400000 0xdc>; [all …]
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| D | bcm7435.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 43 #address-cells = <0>; 53 #clock-cells = <0>; 59 #clock-cells = <0>; 69 ranges = <0 0x10000000 0x01000000>; 73 reg = <0x41b500 0x40>, <0x41b600 0x40>, 74 <0x41b700 0x40>, <0x41b800 0x40>; 85 reg = <0x403000 0x30>; [all …]
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| D | bcm7425.dtsi | 9 #size-cells = <0>; 13 cpu@0 { 16 reg = <0>; 31 #address-cells = <0>; 41 #clock-cells = <0>; 47 #clock-cells = <0>; 57 ranges = <0 0x10000000 0x01000000>; 61 reg = <0x41a400 0x30>, <0x41a600 0x30>; 72 reg = <0x403000 0x30>; 81 reg = <0x400000 0xdc>; [all …]
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| /kernel/linux/linux-6.6/drivers/clk/sunxi-ng/ |
| D | ccu-sun50i-a100.c | 31 #define SUN50I_A100_PLL_PERIPH1_PATTERN0 0xd1303333 41 * testing", so it's not modelled and then force to 0. 43 #define SUN50I_A100_PLL_CPUX_REG 0x000 49 .reg = 0x000, 57 #define SUN50I_A100_PLL_DDR0_REG 0x010 63 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ 65 .reg = 0x010, 73 #define SUN50I_A100_PLL_PERIPH0_REG 0x020 79 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ 82 .reg = 0x020, [all …]
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| D | ccu-sun50i-h616.c | 35 * testing", so it's not modelled and then force to 0. 37 #define SUN50I_H616_PLL_CPUX_REG 0x000 43 .reg = 0x000, 51 #define SUN50I_H616_PLL_DDR0_REG 0x010 57 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ 59 .reg = 0x010, 66 #define SUN50I_H616_PLL_DDR1_REG 0x018 72 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ 74 .reg = 0x018, 81 #define SUN50I_H616_PLL_PERIPH0_REG 0x020 [all …]
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| D | ccu-sun20i-d1.c | 34 * in the user manual. So it's not modelled and forced to 0. 36 #define SUN20I_D1_PLL_CPUX_REG 0x000 42 .reg = 0x000, 50 #define SUN20I_D1_PLL_DDR0_REG 0x010 56 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ 58 .reg = 0x010, 65 #define SUN20I_D1_PLL_PERIPH0_REG 0x020 72 .reg = 0x020, 83 pll_periph0_4x_hws, 0x020, 16, 3, 0); 85 pll_periph0_4x_hws, 0x020, 20, 3, 0); [all …]
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| /kernel/linux/linux-5.10/drivers/clk/sunxi-ng/ |
| D | ccu-sun50i-a100.c | 32 #define SUN50I_A100_PLL_PERIPH1_PATTERN0 0xd1303333 42 * testing", so it's not modelled and then force to 0. 44 #define SUN50I_A100_PLL_CPUX_REG 0x000 50 .reg = 0x000, 58 #define SUN50I_A100_PLL_DDR0_REG 0x010 64 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ 66 .reg = 0x010, 74 #define SUN50I_A100_PLL_PERIPH0_REG 0x020 80 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ 83 .reg = 0x020, [all …]
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| /kernel/linux/linux-5.10/drivers/memory/tegra/ |
| D | tegra124.c | 15 .id = 0x00, 19 .id = 0x01, 23 .reg = 0x228, 27 .reg = 0x2e8, 28 .shift = 0, 29 .mask = 0xff, 30 .def = 0xc2, 33 .id = 0x02, 37 .reg = 0x228, 41 .reg = 0x2f4, [all …]
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| D | tegra210.c | 12 .id = 0x00, 16 .id = 0x01, 20 .reg = 0x228, 24 .reg = 0x2e8, 25 .shift = 0, 26 .mask = 0xff, 27 .def = 0xc2, 30 .id = 0x02, 34 .reg = 0x228, 38 .reg = 0x2f4, [all …]
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| /kernel/linux/linux-6.6/drivers/memory/tegra/ |
| D | tegra210.c | 12 .id = 0x00, 16 .id = 0x01, 21 .reg = 0x228, 25 .reg = 0x2e8, 26 .shift = 0, 27 .mask = 0xff, 28 .def = 0x1e, 32 .id = 0x02, 37 .reg = 0x228, 41 .reg = 0x2f4, [all …]
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| D | tegra124.c | 16 .id = 0x00, 21 .reg = 0x34c, 22 .shift = 0, 23 .mask = 0xff, 24 .def = 0x0, 28 .id = 0x01, 33 .reg = 0x228, 37 .reg = 0x2e8, 38 .shift = 0, 39 .mask = 0xff, [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| D | gmc_7_1_d.h | 27 #define mmMC_CONFIG 0x800 28 #define mmMC_ARB_AGE_CNTL 0x9bf 29 #define mmMC_ARB_RET_CREDITS2 0x9c0 30 #define mmMC_ARB_FED_CNTL 0x9c1 31 #define mmMC_ARB_GECC2_STATUS 0x9c2 32 #define mmMC_ARB_GECC2_MISC 0x9c3 33 #define mmMC_ARB_GECC2_DEBUG 0x9c4 34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5 35 #define mmMC_ARB_PERF_CID 0x9c6 36 #define mmMC_ARB_GECC2 0x9c9 [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| D | gmc_7_1_d.h | 27 #define mmMC_CONFIG 0x800 28 #define mmMC_ARB_AGE_CNTL 0x9bf 29 #define mmMC_ARB_RET_CREDITS2 0x9c0 30 #define mmMC_ARB_FED_CNTL 0x9c1 31 #define mmMC_ARB_GECC2_STATUS 0x9c2 32 #define mmMC_ARB_GECC2_MISC 0x9c3 33 #define mmMC_ARB_GECC2_DEBUG 0x9c4 34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5 35 #define mmMC_ARB_PERF_CID 0x9c6 36 #define mmMC_ARB_GECC2 0x9c9 [all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtl8xxxu/ |
| D | rtl8xxxu_8710b.c | 34 {0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00}, 35 {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, 36 {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, {0x43C, 0x04}, 37 {0x43D, 0x05}, {0x43E, 0x07}, {0x43F, 0x08}, {0x440, 0x5D}, 38 {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, 39 {0x446, 0x00}, {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xF0}, 40 {0x44A, 0x0F}, {0x44B, 0x3E}, {0x44C, 0x10}, {0x44D, 0x00}, 41 {0x44E, 0x00}, {0x44F, 0x00}, {0x450, 0x00}, {0x451, 0xF0}, 42 {0x452, 0x0F}, {0x453, 0x00}, {0x456, 0x5E}, {0x460, 0x66}, 43 {0x461, 0x66}, {0x4C8, 0xFF}, {0x4C9, 0x08}, {0x4CC, 0xFF}, [all …]
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