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/kernel/linux/linux-5.10/arch/powerpc/include/asm/book3s/32/
Dkup.h12 addi \gpr1, \gpr1, 0x111 /* next VSID */
13 rlwinm \gpr1, \gpr1, 0, 0xf0ffffff /* clear VSID overflow */
14 addis \gpr2, \gpr2, 0x1000 /* address of next segment */
22 li \gpr2, 0
33 li \gpr2, 0
36 rlwinm \gpr1, \gpr1, 0, ~SR_NX /* Clear Nx */
45 addi \gpr1, \gpr1, 0x111 /* next VSID */
46 rlwinm \gpr1, \gpr1, 0, 0xf0ffffff /* clear VSID overflow */
47 addis \gpr2, \gpr2, 0x1000 /* address of next segment */
55 rlwinm. \gpr3, \gpr2, 28, 0xf0000000
[all …]
/kernel/linux/linux-5.10/arch/parisc/kernel/
Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]
/kernel/linux/linux-6.6/arch/parisc/kernel/
Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/
Dcwsr_trap_handler.h24 0xbf820001, 0xbf820121,
25 0xb8f4f802, 0x89748674,
26 0xb8f5f803, 0x8675ff75,
27 0x00000400, 0xbf850017,
28 0xc00a1e37, 0x00000000,
29 0xbf8c007f, 0x87777978,
30 0xbf840005, 0x8f728374,
31 0xb972e0c2, 0xbf800002,
32 0xb9740002, 0xbe801d78,
33 0xb8f5f803, 0x8675ff75,
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-shmobile/
Dsetup-r8a7779.c19 /* 2M identity mapping for 0xf0000000 (MPCORE) */
21 .virtual = 0xf0000000,
22 .pfn = __phys_to_pfn(0xf0000000),
26 /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
28 .virtual = 0xfe000000,
29 .pfn = __phys_to_pfn(0xfe000000),
42 #define INT2SMSKCR0 IOMEM(0xfe7822a0)
43 #define INT2SMSKCR1 IOMEM(0xfe7822a4)
44 #define INT2SMSKCR2 IOMEM(0xfe7822a8)
45 #define INT2SMSKCR3 IOMEM(0xfe7822ac)
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-ep93xx/
Dsoc.h20 * the synchronous boot mode is selected. When ASDO is "0" (i.e
24 * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
25 * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
26 * decoded at 0xf0000000.
35 #define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
36 #define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
37 #define EP93XX_CS1_PHYS_BASE 0x10000000
38 #define EP93XX_CS2_PHYS_BASE 0x20000000
39 #define EP93XX_CS3_PHYS_BASE 0x30000000
40 #define EP93XX_PCMCIA_PHYS_BASE 0x40000000
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-ep93xx/
Dsoc.h19 * the synchronous boot mode is selected. When ASDO is "0" (i.e
23 * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
24 * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
25 * decoded at 0xf0000000.
34 #define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
35 #define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
36 #define EP93XX_CS1_PHYS_BASE 0x10000000
37 #define EP93XX_CS2_PHYS_BASE 0x20000000
38 #define EP93XX_CS3_PHYS_BASE 0x30000000
39 #define EP93XX_PCMCIA_PHYS_BASE 0x40000000
[all …]
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
Din.h13 IPPROTO_IP = 0,
98 #define IP_PMTUDISC_DONT 0
123 #define MCAST_EXCLUDE 0
192 #define IN_CLASSA(a) ((((long int) (a)) & 0x80000000) == 0)
193 #define IN_CLASSA_NET 0xff000000
195 #define IN_CLASSA_HOST (0xffffffff & ~IN_CLASSA_NET)
197 #define IN_CLASSB(a) ((((long int) (a)) & 0xc0000000) == 0x80000000)
198 #define IN_CLASSB_NET 0xffff0000
200 #define IN_CLASSB_HOST (0xffffffff & ~IN_CLASSB_NET)
202 #define IN_CLASSC(a) ((((long int) (a)) & 0xe0000000) == 0xc0000000)
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/
Dcwsr_trap_handler.h24 0xbf820001, 0xbf820121,
25 0xb8f4f802, 0x89748674,
26 0xb8f5f803, 0x8675ff75,
27 0x00000400, 0xbf850017,
28 0xc00a1e37, 0x00000000,
29 0xbf8c007f, 0x87777978,
30 0xbf840005, 0x8f728374,
31 0xb972e0c2, 0xbf800002,
32 0xb9740002, 0xbe801d78,
33 0xb8f5f803, 0x8675ff75,
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Dmicrosoft,vmbus.yaml51 ranges = <0x0f 0xf0000000 0x0f 0xf0000000 0x10000000>;
/kernel/linux/linux-6.6/arch/arc/boot/dts/
Dnsim_700.dts17 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signal…
33 #clock-cells = <0>;
46 reg = <0xf0000000 0x2000>;
Dhaps_hs_idu.dts18 reg = <0x80000000 0x20000000>; /* 512 */
22 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-…
38 #clock-cells = <0>;
58 reg = <0xf0000000 0x2000>;
60 interrupts = <0>;
Dnsimosci.dts18 /* bootargs = "console=tty0 consoleblank=0"; */
20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
36 #clock-cells = <0>;
49 reg = <0xf0000000 0x2000>;
59 #clock-cells = <0>;
66 reg = <0xf9000000 0x400>;
73 reg = <0xf9000400 0x14>;
80 reg = <0xf0003000 0x44>;
Dnsimosci_hs.dts18 /* bootargs = "console=tty0 consoleblank=0"; */
20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
36 #clock-cells = <0>;
49 reg = <0xf0000000 0x2000>;
59 #clock-cells = <0>;
66 reg = <0xf9000000 0x400>;
73 reg = <0xf9000400 0x14>;
80 reg = <0xf0003000 0x44>;
/kernel/linux/linux-5.10/arch/arc/boot/dts/
Dnsim_700.dts17 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signal…
33 #clock-cells = <0>;
46 reg = <0xf0000000 0x2000>;
Dhaps_hs_idu.dts18 reg = <0x80000000 0x20000000>; /* 512 */
22 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-…
38 #clock-cells = <0>;
58 reg = <0xf0000000 0x2000>;
60 interrupts = <0>;
Dnsimosci.dts18 /* bootargs = "console=tty0 consoleblank=0"; */
20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
36 #clock-cells = <0>;
49 reg = <0xf0000000 0x2000>;
59 #clock-cells = <0>;
66 reg = <0xf9000000 0x400>;
73 reg = <0xf9000400 0x14>;
80 reg = <0xf0003000 0x44>;
Dnsimosci_hs.dts18 /* bootargs = "console=tty0 consoleblank=0"; */
20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
36 #clock-cells = <0>;
49 reg = <0xf0000000 0x2000>;
59 #clock-cells = <0>;
66 reg = <0xf9000000 0x400>;
73 reg = <0xf9000400 0x14>;
80 reg = <0xf0003000 0x44>;
/kernel/linux/linux-6.6/drivers/net/wireless/broadcom/b43/
Ddma.h19 #define B43_DMA32_TXCTL 0x00
20 #define B43_DMA32_TXENABLE 0x00000001
21 #define B43_DMA32_TXSUSPEND 0x00000002
22 #define B43_DMA32_TXLOOPBACK 0x00000004
23 #define B43_DMA32_TXFLUSH 0x00000010
24 #define B43_DMA32_TXPARITYDISABLE 0x00000800
25 #define B43_DMA32_TXADDREXT_MASK 0x00030000
27 #define B43_DMA32_TXRING 0x04
28 #define B43_DMA32_TXINDEX 0x08
29 #define B43_DMA32_TXSTATUS 0x0C
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/
Ddma.h19 #define B43_DMA32_TXCTL 0x00
20 #define B43_DMA32_TXENABLE 0x00000001
21 #define B43_DMA32_TXSUSPEND 0x00000002
22 #define B43_DMA32_TXLOOPBACK 0x00000004
23 #define B43_DMA32_TXFLUSH 0x00000010
24 #define B43_DMA32_TXPARITYDISABLE 0x00000800
25 #define B43_DMA32_TXADDREXT_MASK 0x00030000
27 #define B43_DMA32_TXRING 0x04
28 #define B43_DMA32_TXINDEX 0x08
29 #define B43_DMA32_TXSTATUS 0x0C
[all …]
/kernel/linux/linux-5.10/arch/xtensa/include/asm/
Dkmem_layout.h23 #define XCHAL_PAGE_TABLE_VADDR __XTENSA_UL_CONST(0x80000000)
24 #define XCHAL_PAGE_TABLE_SIZE __XTENSA_UL_CONST(0x00400000)
28 #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
29 #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
30 #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
31 #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x08000000)
37 #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xb0000000)
38 #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xc0000000)
39 #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x10000000)
40 #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x10000000)
[all …]
/kernel/linux/linux-6.6/arch/xtensa/include/asm/
Dkmem_layout.h23 #define XCHAL_PAGE_TABLE_VADDR __XTENSA_UL_CONST(0x80000000)
24 #define XCHAL_PAGE_TABLE_SIZE __XTENSA_UL_CONST(0x00400000)
28 #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
29 #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
30 #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
31 #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x08000000)
37 #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xb0000000)
38 #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xc0000000)
39 #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x10000000)
40 #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x10000000)
[all …]
/kernel/linux/linux-6.6/arch/sparc/lib/
Dfls.S16 mov 0, %o1
17 sethi %hi(0xffff0000), %g3
22 sethi %hi(0xff000000), %g3
25 sethi %hi(0xf0000000), %g3
29 sra %o0, 0, %o0
32 sethi %hi(0xf0000000), %g3
36 sethi %hi(0xc0000000), %g3
39 sra %o0, 0, %o0
51 sra %o1, 0, %o0
55 sra %o0, 0, %o0
[all …]
/kernel/linux/linux-5.10/arch/sparc/lib/
Dfls.S16 mov 0, %o1
17 sethi %hi(0xffff0000), %g3
22 sethi %hi(0xff000000), %g3
25 sethi %hi(0xf0000000), %g3
29 sra %o0, 0, %o0
32 sethi %hi(0xf0000000), %g3
36 sethi %hi(0xc0000000), %g3
39 sra %o0, 0, %o0
51 sra %o1, 0, %o0
55 sra %o0, 0, %o0
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-footbridge/include/mach/
Dhardware.h13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc000000 0x79000000 1MB PCI IACK/special space
18 * 0xfb000000 0x7a000000 16MB PCI Config type 1
19 * 0xfa000000 0x7b000000 16MB PCI Config type 0
20 * 0xf9000000 0x50000000 1MB Cache flush
21 * 0xf0000000 0x80000000 16MB ISA memory
24 #define XBUS_SIZE 0x00100000
[all …]

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