Searched +full:0 +full:xfd00 (Results 1 – 25 of 40) sorted by relevance
12
17 # define _PATCHKEY(id) (0xfd00|id)19 # define _PATCHKEY(id) ((id<<8)|0x00fd)
20 # define _PATCHKEY(id) (0xfd00|id)22 # define _PATCHKEY(id) ((id<<8)|0x00fd)
29 # define _PATCHKEY(id) (0xfd00|id)31 # define _PATCHKEY(id) ((id<<8)|0x00fd)
13 polling-delay = <0>;20 hysteresis = <0>;26 hysteresis = <0>;38 reg = <0x7 SPMI_USID>;40 #size-cells = <0>;44 reg = <0xa00>;45 interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;46 #thermal-sensor-cells = <0>;51 reg = <0x8800>;53 gpio-ranges = <&pm8550b_gpios 0 0 12>;[all …]
13 polling-delay = <0>;20 hysteresis = <0>;26 hysteresis = <0>;32 hysteresis = <0>;45 #size-cells = <0>;49 reg = <0xa00>;50 interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;51 #thermal-sensor-cells = <0>;56 reg = <0x8800>;58 gpio-ranges = <&pm7550ba_gpios 0 0 8>;[all …]
29 const: 038 minimum: 040 default: 045 minimum: 052 minimum: 068 reg = <0x7 SPMI_USID>;70 #size-cells = <0>;74 reg = <0xfd00>;75 #phy-cells = <0>;
11 #define VDEC_ASSIST_AMR1_INT8 0x00b413 #define ASSIST_MBOX1_CLR_REG 0x01d414 #define ASSIST_MBOX1_MASK 0x01d816 #define MPSR 0x0c0417 #define MCPU_INTR_MSK 0x0c1018 #define CPSR 0x0c8420 #define IMEM_DMA_CTRL 0x0d0021 #define IMEM_DMA_ADR 0x0d0422 #define IMEM_DMA_COUNT 0x0d0823 #define LMEM_DMA_CTRL 0x0d40[all …]
27 #define _PATCHKEY(id) (0xfd00 | id)29 #define _PATCHKEY(id) ((id << 8) | 0x00fd)
10 #define SNDRV_OSS_PATCHKEY(id) (0xfd00|id)12 #define SNDRV_OSS_PATCHKEY(id) ((id<<8)|0xfd)16 #define SNDRV_OSS_SOUNDFONT_PATCH SNDRV_OSS_PATCHKEY(0x07)22 #define SNDRV_SFNT_LOAD_INFO 038 #define SNDRV_SFNT_PAT_TYPE_MISC 041 #define SNDRV_SFNT_PAT_LOCKED 0x10042 #define SNDRV_SFNT_PAT_SHARED 0x20076 #define SNDRV_SFNT_MODE_ROMSOUND 0x800099 #define SNDRV_SFNT_WR_APPEND 0126 #define SNDRV_EMUX_VERSION ((1 << 16) | (0 << 8) | 0)[all …]
7 #define HERMES_RID_CNFPORTTYPE 0xFC008 #define HERMES_RID_CNFOWNMACADDR 0xFC019 #define HERMES_RID_CNFDESIREDSSID 0xFC0210 #define HERMES_RID_CNFOWNCHANNEL 0xFC0311 #define HERMES_RID_CNFOWNSSID 0xFC0412 #define HERMES_RID_CNFOWNATIMWINDOW 0xFC0513 #define HERMES_RID_CNFSYSTEMSCALE 0xFC0614 #define HERMES_RID_CNFMAXDATALEN 0xFC0715 #define HERMES_RID_CNFWDSADDRESS 0xFC0816 #define HERMES_RID_CNFPMENABLED 0xFC09[all …]
23 #define SNDRV_OSS_PATCHKEY(id) (0xfd00 | id)25 #define SNDRV_OSS_PATCHKEY(id) ((id << 8) | 0xfd)29 #define SNDRV_OSS_SOUNDFONT_PATCH SNDRV_OSS_PATCHKEY(0x07)35 #define SNDRV_SFNT_LOAD_INFO 048 #define SNDRV_SFNT_PAT_TYPE_MISC 051 #define SNDRV_SFNT_PAT_LOCKED 0x10052 #define SNDRV_SFNT_PAT_SHARED 0x20086 #define SNDRV_SFNT_MODE_ROMSOUND 0x8000109 #define SNDRV_SFNT_WR_APPEND 0136 #define SNDRV_EMUX_VERSION ((1 << 16) | (0 << 8) | 0)[all …]
18 #define SNDRV_OSS_PATCHKEY(id) (0xfd00|id)20 #define SNDRV_OSS_PATCHKEY(id) ((id<<8)|0xfd)26 #define SNDRV_OSS_SOUNDFONT_PATCH SNDRV_OSS_PATCHKEY(0x07)34 #define SNDRV_SFNT_LOAD_INFO 0 /* awe_voice_rec */59 #define SNDRV_SFNT_PAT_TYPE_MISC 062 #define SNDRV_SFNT_PAT_LOCKED 0x100 /* lock the samples */63 #define SNDRV_SFNT_PAT_SHARED 0x200 /* sample is shared */76 unsigned short moddelay; /* modulation delay (0x8000) */77 unsigned short modatkhld; /* modulation attack & hold time (0x7f7f) */78 unsigned short moddcysus; /* modulation decay & sustain (0x7f7f) */[all …]
33 #define SNDRV_OSS_PATCHKEY(id) (0xfd00|id)35 #define SNDRV_OSS_PATCHKEY(id) ((id<<8)|0xfd)41 #define SNDRV_OSS_SOUNDFONT_PATCH SNDRV_OSS_PATCHKEY(0x07)49 #define SNDRV_SFNT_LOAD_INFO 0 /* awe_voice_rec */74 #define SNDRV_SFNT_PAT_TYPE_MISC 077 #define SNDRV_SFNT_PAT_LOCKED 0x100 /* lock the samples */78 #define SNDRV_SFNT_PAT_SHARED 0x200 /* sample is shared */91 unsigned short moddelay; /* modulation delay (0x8000) */92 unsigned short modatkhld; /* modulation attack & hold time (0x7f7f) */93 unsigned short moddcysus; /* modulation decay & sustain (0x7f7f) */[all …]
11 #define ENE_STATUS 0 /* hardware status - unused */18 #define ENE_FW_SAMPLE_BUFFER 0xF8F0 /* sample buffer */19 #define ENE_FW_SAMPLE_SPACE 0x80 /* sample is space */23 #define ENE_FW1 0xF8F8 /* flagr */24 #define ENE_FW1_ENABLE 0x01 /* enable fw processing */25 #define ENE_FW1_TXIRQ 0x02 /* TX interrupt pending */26 #define ENE_FW1_HAS_EXTRA_BUF 0x04 /* fw uses extra buffer*/27 #define ENE_FW1_EXTRA_BUF_HND 0x08 /* extra buffer handshake bit*/28 #define ENE_FW1_LED_ON 0x10 /* turn on a led */30 #define ENE_FW1_WPATTERN 0x20 /* enable wake pattern */[all …]
40 #define DEMOD 0x000041 #define USB 0x010042 #define SYS 0x020043 #define I2C 0x030044 #define I2C_DA 0x060046 #define CMD_WR_FLAG 0x001047 #define CMD_DEMOD_RD 0x000048 #define CMD_DEMOD_WR 0x001049 #define CMD_USB_RD 0x010050 #define CMD_USB_WR 0x0110[all …]
18 #define SERVICE_PROG_ID 0x000219 #define SERVICE_PROG_VERSION 0x000121 #define HIER_NONE 0x0022 #define HIER_LOW_PRIORITY 0x0131 #define CFG_MODE_ODSP_RESUME 035 #define DUMP_BLOCK_SIZE_MAX 0x2041 CONTROL_PROC_TURNON = 0x0001,42 CONTROL_PROC_TURNON_RSP = 0x0100,43 CONTROL_PROC_SET_REGISTER = 0x0002,44 CONTROL_PROC_SET_REGISTER_RSP = 0x0200,[all …]