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/kernel/linux/linux-6.6/arch/m68k/sun3/
Ddvma.c35 if(ptelist[(vaddr & 0xff000) >> PAGE_SHIFT] != pte) { in dvma_page()
37 ptelist[(vaddr & 0xff000) >> PAGE_SHIFT] = pte; in dvma_page()
61 return 0; in dvma_map_iommu()
67 memset(ptelist, 0, sizeof(ptelist)); in sun3_dvma_init()
/kernel/linux/linux-5.10/arch/m68k/sun3/
Ddvma.c35 if(ptelist[(vaddr & 0xff000) >> PAGE_SHIFT] != pte) { in dvma_page()
37 ptelist[(vaddr & 0xff000) >> PAGE_SHIFT] = pte; in dvma_page()
61 return 0; in dvma_map_iommu()
67 memset(ptelist, 0, sizeof(ptelist)); in sun3_dvma_init()
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dsleep-s3c24xx.S34 .word 0x2bedf00d
48 mov r2, #S3C24XX_PA_UART & 0xff000000
49 orr r2, r2, #S3C24XX_PA_UART & 0xff000
51 #if 0
54 ldr r12, [ r14, #0x54 ]
57 str r12, [ r14, #0x54 ]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Dqcom,msm8916-venus.yaml77 reg = <0x01d00000 0xff000>;
Dqcom,sc7180-venus.yaml103 reg = <0x0aa00000 0xff000>;
115 iommus = <&apps_smmu 0x0c00 0x60>;
Dqcom,sdm845-venus-v2.yaml95 reg = <0x0aa00000 0xff000>;
111 iommus = <&apps_smmu 0x10a0 0x8>,
112 <&apps_smmu 0x10b0 0x0>;
Dqcom,sdm845-venus.yaml105 reg = <0x0aa00000 0xff000>;
112 iommus = <&apps_smmu 0x10a0 0x8>,
113 <&apps_smmu 0x10b0 0x0>;
Dqcom,msm8996-venus.yaml112 reg = <0x00c00000 0xff000>;
120 iommus = <&venus_smmu 0x00>,
121 <&venus_smmu 0x01>,
122 <&venus_smmu 0x0a>,
123 <&venus_smmu 0x07>,
124 <&venus_smmu 0x0e>,
125 <&venus_smmu 0x0f>,
126 <&venus_smmu 0x08>,
127 <&venus_smmu 0x09>,
128 <&venus_smmu 0x0b>,
[all …]
Dqcom,sm8250-venus.yaml113 reg = <0x0aa00000 0xff000>;
129 iommus = <&apps_smmu 0x2100 0x0400>;
Dqcom,sdm660-venus.yaml113 reg = <0x0cc00000 0xff000>;
119 interconnects = <&gnoc 0 &mnoc 13>,
123 iommus = <&mmss_smmu 0x400>,
124 <&mmss_smmu 0x401>,
125 <&mmss_smmu 0x40a>,
126 <&mmss_smmu 0x407>,
127 <&mmss_smmu 0x40e>,
128 <&mmss_smmu 0x40f>,
129 <&mmss_smmu 0x408>,
130 <&mmss_smmu 0x409>,
[all …]
/kernel/linux/linux-6.6/arch/s390/kernel/
Dmachine_kexec_reloc.c15 *(u16 *)loc &= 0xf000; in arch_kexec_do_relocs()
16 *(u16 *)loc |= val & 0xfff; in arch_kexec_do_relocs()
22 *(u32 *)loc &= 0xf00000ff; in arch_kexec_do_relocs()
23 *(u32 *)loc |= (val & 0xfff) << 16; /* DL */ in arch_kexec_do_relocs()
24 *(u32 *)loc |= (val & 0xff000) >> 4; /* DH */ in arch_kexec_do_relocs()
55 return 0; in arch_kexec_do_relocs()
/kernel/linux/linux-5.10/arch/s390/kernel/
Dmachine_kexec_reloc.c15 *(u16 *)loc &= 0xf000; in arch_kexec_do_relocs()
16 *(u16 *)loc |= val & 0xfff; in arch_kexec_do_relocs()
22 *(u32 *)loc &= 0xf00000ff; in arch_kexec_do_relocs()
23 *(u32 *)loc |= (val & 0xfff) << 16; /* DL */ in arch_kexec_do_relocs()
24 *(u32 *)loc |= (val & 0xff000) >> 4; /* DH */ in arch_kexec_do_relocs()
55 return 0; in arch_kexec_do_relocs()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dqcom,msm8916-venus.yaml104 reg = <0x01d00000 0xff000>;
Dqcom,sdm845-venus-v2.yaml119 reg = <0x0aa00000 0xff000>;
135 iommus = <&apps_smmu 0x10a0 0x8>,
136 <&apps_smmu 0x10b0 0x0>;
Dqcom,sdm845-venus.yaml132 reg = <0x0aa00000 0xff000>;
139 iommus = <&apps_smmu 0x10a0 0x8>,
140 <&apps_smmu 0x10b0 0x0>;
Dqcom,sc7180-venus.yaml124 reg = <0x0aa00000 0xff000>;
136 iommus = <&apps_smmu 0x0c00 0x60>;
Dqcom,msm8996-venus.yaml131 reg = <0x00c00000 0xff000>;
139 iommus = <&venus_smmu 0x00>,
140 <&venus_smmu 0x01>,
141 <&venus_smmu 0x0a>,
142 <&venus_smmu 0x07>,
143 <&venus_smmu 0x0e>,
144 <&venus_smmu 0x0f>,
145 <&venus_smmu 0x08>,
146 <&venus_smmu 0x09>,
147 <&venus_smmu 0x0b>,
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_cpt.c16 #define PCI_DEVID_OTX2_CPT_PF 0xA0FD
17 #define PCI_DEVID_OTX2_CPT10K_PF 0xA0F2
24 u64 free_sts = 0, busy_sts = 0; \
28 for (e = (e_min), i = 0; e < (e_max); e++, i++) { \
30 if (reg & 0x1) \
33 if (reg & 0x2) \
50 dev_err_ratelimited(rvu->dev, "Received CPTAF FLT%d irq : 0x%llx", vec, reg); in cpt_af_flt_intr_handler()
55 case 0: in cpt_af_flt_intr_handler()
65 grp = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng)) & 0xFF; in cpt_af_flt_intr_handler()
67 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), 0x0); in cpt_af_flt_intr_handler()
[all …]
/kernel/linux/linux-5.10/drivers/crypto/bcm/
Dspu2.h14 SPU2_CIPHER_TYPE_NONE = 0x0,
15 SPU2_CIPHER_TYPE_AES128 = 0x1,
16 SPU2_CIPHER_TYPE_AES192 = 0x2,
17 SPU2_CIPHER_TYPE_AES256 = 0x3,
18 SPU2_CIPHER_TYPE_DES = 0x4,
19 SPU2_CIPHER_TYPE_3DES = 0x5,
24 SPU2_CIPHER_MODE_ECB = 0x0,
25 SPU2_CIPHER_MODE_CBC = 0x1,
26 SPU2_CIPHER_MODE_CTR = 0x2,
27 SPU2_CIPHER_MODE_CFB = 0x3,
[all …]
/kernel/linux/linux-6.6/drivers/crypto/bcm/
Dspu2.h14 SPU2_CIPHER_TYPE_NONE = 0x0,
15 SPU2_CIPHER_TYPE_AES128 = 0x1,
16 SPU2_CIPHER_TYPE_AES192 = 0x2,
17 SPU2_CIPHER_TYPE_AES256 = 0x3,
18 SPU2_CIPHER_TYPE_DES = 0x4,
19 SPU2_CIPHER_TYPE_3DES = 0x5,
24 SPU2_CIPHER_MODE_ECB = 0x0,
25 SPU2_CIPHER_MODE_CBC = 0x1,
26 SPU2_CIPHER_MODE_CTR = 0x2,
27 SPU2_CIPHER_MODE_CFB = 0x3,
[all …]
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dleon_amba.h24 #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
25 #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
26 #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
27 #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
28 #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
29 #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
30 #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
31 #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
37 #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
38 #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
[all …]
/kernel/linux/linux-6.6/arch/sparc/include/asm/
Dleon_amba.h24 #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
25 #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
26 #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
27 #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
28 #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
29 #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
30 #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
31 #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
37 #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
38 #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
[all …]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi2/asic_reg/
Ddcore0_tpc0_cfg_masks.h24 #define DCORE0_TPC0_CFG_TPC_COUNT_V_SHIFT 0
25 #define DCORE0_TPC0_CFG_TPC_COUNT_V_MASK 0xFFFFFFFF
28 #define DCORE0_TPC0_CFG_TPC_ID_V_SHIFT 0
29 #define DCORE0_TPC0_CFG_TPC_ID_V_MASK 0xFFFFFFFF
32 #define DCORE0_TPC0_CFG_STALL_ON_ERR_V_SHIFT 0
33 #define DCORE0_TPC0_CFG_STALL_ON_ERR_V_MASK 0x1
36 #define DCORE0_TPC0_CFG_CLK_EN_LBW_CFG_DIS_SHIFT 0
37 #define DCORE0_TPC0_CFG_CLK_EN_LBW_CFG_DIS_MASK 0x1
39 #define DCORE0_TPC0_CFG_CLK_EN_DBG_CFG_DIS_MASK 0x10
42 #define DCORE0_TPC0_CFG_IQ_RL_EN_V_SHIFT 0
[all …]
/kernel/linux/linux-5.10/arch/riscv/kernel/
Dmodule.c37 return 0; in apply_r_riscv_32_rela()
43 return 0; in apply_r_riscv_64_rela()
50 u32 imm12 = (offset & 0x1000) << (31 - 12); in apply_r_riscv_branch_rela()
51 u32 imm11 = (offset & 0x800) >> (11 - 7); in apply_r_riscv_branch_rela()
52 u32 imm10_5 = (offset & 0x7e0) << (30 - 10); in apply_r_riscv_branch_rela()
53 u32 imm4_1 = (offset & 0x1e) << (11 - 4); in apply_r_riscv_branch_rela()
55 *location = (*location & 0x1fff07f) | imm12 | imm11 | imm10_5 | imm4_1; in apply_r_riscv_branch_rela()
56 return 0; in apply_r_riscv_branch_rela()
63 u32 imm20 = (offset & 0x100000) << (31 - 20); in apply_r_riscv_jal_rela()
64 u32 imm19_12 = (offset & 0xff000); in apply_r_riscv_jal_rela()
[all …]
/kernel/linux/linux-6.6/arch/riscv/kernel/
Dmodule.c38 return 0; in apply_r_riscv_32_rela()
44 return 0; in apply_r_riscv_64_rela()
51 u32 imm12 = (offset & 0x1000) << (31 - 12); in apply_r_riscv_branch_rela()
52 u32 imm11 = (offset & 0x800) >> (11 - 7); in apply_r_riscv_branch_rela()
53 u32 imm10_5 = (offset & 0x7e0) << (30 - 10); in apply_r_riscv_branch_rela()
54 u32 imm4_1 = (offset & 0x1e) << (11 - 4); in apply_r_riscv_branch_rela()
56 *location = (*location & 0x1fff07f) | imm12 | imm11 | imm10_5 | imm4_1; in apply_r_riscv_branch_rela()
57 return 0; in apply_r_riscv_branch_rela()
64 u32 imm20 = (offset & 0x100000) << (31 - 20); in apply_r_riscv_jal_rela()
65 u32 imm19_12 = (offset & 0xff000); in apply_r_riscv_jal_rela()
[all …]

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