Searched +full:0 +full:xfffffd10 (Results 1 – 12 of 12) sorted by relevance
35 description: counter on wake-up 037 minimum: 078 reg = <0xfffffd10 0x10>;
39 reg = <0xfffffd00 0x10>;55 reg = <0xffffe800 0x200>;69 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).85 reg = <0xfffffd10 0x10>;114 Tree. Note also that input 0 is linked to the wake-up pin and is frequently118 - reg: should contain the wake-up input index [0 - 15].130 reg = <0xf8048010 0x10>;133 #size-cells = <0>;141 input@0 {142 reg = <0>;[all …]
37 #size-cells = <0>;39 cpu@0 {42 reg = <0>;48 reg = <0x20000000 0x08000000>;54 #clock-cells = <0>;55 clock-frequency = <0>;60 #clock-cells = <0>;61 clock-frequency = <0>;67 reg = <0x00300000 0x28000>;70 ranges = <0 0x00300000 0x28000>;[all …]
42 #size-cells = <0>;44 cpu@0 {47 reg = <0>;53 reg = <0x20000000 0x04000000>;59 #clock-cells = <0>;60 clock-frequency = <0>;65 #clock-cells = <0>;66 clock-frequency = <0>;71 #clock-cells = <0>;78 reg = <0x00300000 0x10000>;[all …]
39 #size-cells = <0>;41 cpu@0 {44 reg = <0>;50 reg = <0x20000000 0x08000000>;56 #clock-cells = <0>;57 clock-frequency = <0>;62 #clock-cells = <0>;63 clock-frequency = <0>;69 reg = <0x00300000 0x14000>;72 ranges = <0 0x00300000 0x14000>;[all …]
40 #size-cells = <0>;42 cpu@0 {45 reg = <0>;51 reg = <0x20000000 0x04000000>;57 #clock-cells = <0>;58 clock-frequency = <0>;63 #clock-cells = <0>;64 clock-frequency = <0>;69 #clock-cells = <0>;76 reg = <0x002ff000 0x2000>;[all …]
45 #size-cells = <0>;47 cpu@0 {50 reg = <0>;56 reg = <0x70000000 0x10000000>;62 #clock-cells = <0>;63 clock-frequency = <0>;68 #clock-cells = <0>;69 clock-frequency = <0>;74 #clock-cells = <0>;81 reg = <0x00300000 0x10000>;[all …]
38 #size-cells = <0>;40 cpu@0 {43 reg = <0>;49 reg = <0x20000000 0x08000000>;55 #clock-cells = <0>;56 clock-frequency = <0>;61 #clock-cells = <0>;62 clock-frequency = <0>;68 reg = <0x00300000 0x28000>;71 ranges = <0 0x00300000 0x28000>;[all …]
43 #size-cells = <0>;45 cpu@0 {48 reg = <0>;54 reg = <0x20000000 0x04000000>;60 #clock-cells = <0>;61 clock-frequency = <0>;66 #clock-cells = <0>;67 clock-frequency = <0>;72 #clock-cells = <0>;79 reg = <0x00300000 0x10000>;[all …]
41 #size-cells = <0>;43 cpu@0 {46 reg = <0>;52 reg = <0x20000000 0x04000000>;58 #clock-cells = <0>;59 clock-frequency = <0>;64 #clock-cells = <0>;65 clock-frequency = <0>;70 #clock-cells = <0>;77 reg = <0x002ff000 0x2000>;[all …]
40 #size-cells = <0>;42 cpu@0 {45 reg = <0>;51 reg = <0x20000000 0x08000000>;57 #clock-cells = <0>;58 clock-frequency = <0>;63 #clock-cells = <0>;64 clock-frequency = <0>;70 reg = <0x00300000 0x14000>;73 ranges = <0 0x00300000 0x14000>;[all …]
46 #size-cells = <0>;48 cpu@0 {51 reg = <0>;57 reg = <0x70000000 0x10000000>;63 #clock-cells = <0>;64 clock-frequency = <0>;69 #clock-cells = <0>;70 clock-frequency = <0>;75 #clock-cells = <0>;82 reg = <0x00300000 0x10000>;[all …]