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/kernel/linux/linux-5.10/arch/parisc/kernel/
Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]
/kernel/linux/linux-6.6/arch/parisc/kernel/
Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Ds3c6410.dtsi27 valid-mask = <0xffffff7f>;
28 valid-wakeup-mask = <0x00200004>;
32 valid-mask = <0xffffffff>;
33 valid-wakeup-mask = <0x53020000>;
39 reg = <0x7e00f000 0x1000>;
45 reg = <0x7f00f000 0x1000>;
52 #size-cells = <0>;
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ds3c6410.dtsi27 valid-mask = <0xffffff7f>;
28 valid-wakeup-mask = <0x00200004>;
32 valid-mask = <0xffffffff>;
33 valid-wakeup-mask = <0x53020000>;
39 reg = <0x7e00f000 0x1000>;
45 reg = <0x7f00f000 0x1000>;
52 #size-cells = <0>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Darm,vic.txt22 represents single interrupt source, starting from source 0 at LSb and ending
37 reg = <0x60000 0x1000>;
39 valid-mask = <0xffffff7f>;
40 valid-wakeup-mask = <0x0000ff7f>;
/kernel/linux/linux-5.10/drivers/net/ethernet/dec/tulip/
Dpnic2.c23 * CSR 6 (mask = 0xfe3bd1fd of bits not to change)
29 * Bit 13 - Start - 1, Stop - 0 Transmissions
32 * Bit 1 - Start - 1, Stop - 0 Receive
35 * CSR 14 (mask = 0xfff0ee39 of bits not to change)
55 * Bit 15 - LPN is 1 if all above bits are valid other wise 0
58 * Bit 2 - LS10B - link state of 10baseT 0 - good, 1 - failed
59 * Bit 1 - LS100B - link state of 100baseT 0 - good, 1 - failed
66 * 1 0 0 (X) 0 (X) 1 NWAY
67 * 0 0 1 0 (X) 0 10baseT
68 * 0 1 0 1 1 (X) 100baseT
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/dec/tulip/
Dpnic2.c23 * CSR 6 (mask = 0xfe3bd1fd of bits not to change)
29 * Bit 13 - Start - 1, Stop - 0 Transmissions
32 * Bit 1 - Start - 1, Stop - 0 Receive
35 * CSR 14 (mask = 0xfff0ee39 of bits not to change)
55 * Bit 15 - LPN is 1 if all above bits are valid other wise 0
58 * Bit 2 - LS10B - link state of 10baseT 0 - good, 1 - failed
59 * Bit 1 - LS100B - link state of 100baseT 0 - good, 1 - failed
66 * 1 0 0 (X) 0 (X) 1 NWAY
67 * 0 0 1 0 (X) 0 10baseT
68 * 0 1 0 1 1 (X) 100baseT
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Darm,vic.yaml45 represents single interrupt source, starting from source 0 at
75 reg = <0x60000 0x1000>;
77 valid-mask = <0xffffff7f>;
78 valid-wakeup-mask = <0x0000ff7f>;
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
Dr100d.h31 #define CP_PACKET0 0x00000000
32 #define PACKET0_BASE_INDEX_SHIFT 0
33 #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0)
35 #define PACKET0_COUNT_MASK (0x3fff << 16)
36 #define CP_PACKET1 0x40000000
37 #define CP_PACKET2 0x80000000
38 #define PACKET2_PAD_SHIFT 0
39 #define PACKET2_PAD_MASK (0x3fffffff << 0)
40 #define CP_PACKET3 0xC0000000
42 #define PACKET3_IT_OPCODE_MASK (0xff << 8)
[all …]
Drv250d.h31 #define R_00000D_SCLK_CNTL_M6 0x00000D
32 #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0)
33 #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7)
34 #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8
35 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3)
36 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1)
37 #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7
38 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4)
39 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1)
40 #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF
[all …]
Dr300d.h31 #define CP_PACKET0 0x00000000
32 #define PACKET0_BASE_INDEX_SHIFT 0
33 #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0)
35 #define PACKET0_COUNT_MASK (0x3fff << 16)
36 #define CP_PACKET1 0x40000000
37 #define CP_PACKET2 0x80000000
38 #define PACKET2_PAD_SHIFT 0
39 #define PACKET2_PAD_MASK (0x3fffffff << 0)
40 #define CP_PACKET3 0xC0000000
42 #define PACKET3_IT_OPCODE_MASK (0xff << 8)
[all …]
Drv515d.h34 #define PCIE_INDEX 0x0030
35 #define PCIE_DATA 0x0034
36 #define MC_IND_INDEX 0x0070
38 #define MC_IND_DATA 0x0074
39 #define RBBM_SOFT_RESET 0x00F0
40 #define CONFIG_MEMSIZE 0x00F8
41 #define HDP_FB_LOCATION 0x0134
42 #define CP_CSQ_CNTL 0x0740
43 #define CP_CSQ_MODE 0x0744
44 #define CP_CSQ_ADDR 0x07F0
[all …]
Dr420d.h31 #define R_0001F8_MC_IND_INDEX 0x0001F8
32 #define S_0001F8_MC_IND_ADDR(x) (((x) & 0x7F) << 0)
33 #define G_0001F8_MC_IND_ADDR(x) (((x) >> 0) & 0x7F)
34 #define C_0001F8_MC_IND_ADDR 0xFFFFFF80
35 #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8)
36 #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1)
37 #define C_0001F8_MC_IND_WR_EN 0xFFFFFEFF
38 #define R_0001FC_MC_IND_DATA 0x0001FC
39 #define S_0001FC_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0)
40 #define G_0001FC_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dr100d.h31 #define CP_PACKET0 0x00000000
32 #define PACKET0_BASE_INDEX_SHIFT 0
33 #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0)
35 #define PACKET0_COUNT_MASK (0x3fff << 16)
36 #define CP_PACKET1 0x40000000
37 #define CP_PACKET2 0x80000000
38 #define PACKET2_PAD_SHIFT 0
39 #define PACKET2_PAD_MASK (0x3fffffff << 0)
40 #define CP_PACKET3 0xC0000000
42 #define PACKET3_IT_OPCODE_MASK (0xff << 8)
[all …]
Drv250d.h31 #define R_00000D_SCLK_CNTL_M6 0x00000D
32 #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0)
33 #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7)
34 #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8
35 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3)
36 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1)
37 #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7
38 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4)
39 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1)
40 #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF
[all …]
Dr300d.h31 #define CP_PACKET0 0x00000000
32 #define PACKET0_BASE_INDEX_SHIFT 0
33 #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0)
35 #define PACKET0_COUNT_MASK (0x3fff << 16)
36 #define CP_PACKET1 0x40000000
37 #define CP_PACKET2 0x80000000
38 #define PACKET2_PAD_SHIFT 0
39 #define PACKET2_PAD_MASK (0x3fffffff << 0)
40 #define CP_PACKET3 0xC0000000
42 #define PACKET3_IT_OPCODE_MASK (0xff << 8)
[all …]
Drv515d.h34 #define PCIE_INDEX 0x0030
35 #define PCIE_DATA 0x0034
36 #define MC_IND_INDEX 0x0070
38 #define MC_IND_DATA 0x0074
39 #define RBBM_SOFT_RESET 0x00F0
40 #define CONFIG_MEMSIZE 0x00F8
41 #define HDP_FB_LOCATION 0x0134
42 #define CP_CSQ_CNTL 0x0740
43 #define CP_CSQ_MODE 0x0744
44 #define CP_CSQ_ADDR 0x07F0
[all …]
Dr420d.h31 #define R_0001F8_MC_IND_INDEX 0x0001F8
32 #define S_0001F8_MC_IND_ADDR(x) (((x) & 0x7F) << 0)
33 #define G_0001F8_MC_IND_ADDR(x) (((x) >> 0) & 0x7F)
34 #define C_0001F8_MC_IND_ADDR 0xFFFFFF80
35 #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8)
36 #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1)
37 #define C_0001F8_MC_IND_WR_EN 0xFFFFFEFF
38 #define R_0001FC_MC_IND_DATA 0x0001FC
39 #define S_0001FC_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0)
40 #define G_0001FC_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF)
[all …]
/kernel/linux/linux-5.10/drivers/char/agp/
Dali-agp.c13 #define ALI_AGPCTRL 0xb8
14 #define ALI_ATTBASE 0xbc
15 #define ALI_TLBCTRL 0xc0
16 #define ALI_TAGCTRL 0xc4
17 #define ALI_CACHE_FLUSH_CTRL 0xD0
18 #define ALI_CACHE_FLUSH_ADDR_MASK 0xFFFFF000
19 #define ALI_CACHE_FLUSH_EN 0x100
28 temp &= ~(0xfffffff0); in ali_fetch_size()
31 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { in ali_fetch_size()
40 return 0; in ali_fetch_size()
[all …]
/kernel/linux/linux-6.6/drivers/char/agp/
Dali-agp.c13 #define ALI_AGPCTRL 0xb8
14 #define ALI_ATTBASE 0xbc
15 #define ALI_TLBCTRL 0xc0
16 #define ALI_TAGCTRL 0xc4
17 #define ALI_CACHE_FLUSH_CTRL 0xD0
18 #define ALI_CACHE_FLUSH_ADDR_MASK 0xFFFFF000
19 #define ALI_CACHE_FLUSH_EN 0x100
28 temp &= ~(0xfffffff0); in ali_fetch_size()
31 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { in ali_fetch_size()
40 return 0; in ali_fetch_size()
[all …]
/kernel/linux/linux-6.6/drivers/media/pci/cx25821/
Dcx25821-medusa-video.c24 u32 value = 0; in medusa_enable_bluefield_output()
25 u32 tmp = 0; in medusa_enable_bluefield_output()
63 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl, &tmp); in medusa_enable_bluefield_output()
64 value &= 0xFFFFFF7F; /* clear BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
66 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
67 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl, value); in medusa_enable_bluefield_output()
69 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl_ns, &tmp); in medusa_enable_bluefield_output()
70 value &= 0xFFFFFF7F; in medusa_enable_bluefield_output()
72 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
73 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl_ns, value); in medusa_enable_bluefield_output()
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/cx25821/
Dcx25821-medusa-video.c24 u32 value = 0; in medusa_enable_bluefield_output()
25 u32 tmp = 0; in medusa_enable_bluefield_output()
63 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl, &tmp); in medusa_enable_bluefield_output()
64 value &= 0xFFFFFF7F; /* clear BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
66 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
67 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl, value); in medusa_enable_bluefield_output()
69 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl_ns, &tmp); in medusa_enable_bluefield_output()
70 value &= 0xFFFFFF7F; in medusa_enable_bluefield_output()
72 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
73 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl_ns, value); in medusa_enable_bluefield_output()
[all …]
/kernel/linux/linux-6.6/Documentation/core-api/
Dprintk-formats.rst113 %pS versatile_init+0x0/0x110
115 %pSR versatile_init+0x9/0x110
117 %pB prev_fn_of_versatile_init+0x88/0x88
135 %pS versatile_init+0x0/0x110 [module_name]
136 %pSb versatile_init+0x0/0x110 [module_name ed5019fdf5e53be37cb1ba7899292d7e143b259e]
137 %pSRb versatile_init+0x9/0x110 [module_name ed5019fdf5e53be37cb1ba7899292d7e143b259e]
139 %pBb prev_fn_of_versatile_init+0x88/0x88 [module_name ed5019fdf5e53be37cb1ba7899292d7e143b259e]
211 %pr [mem 0x60000000-0x6fffffff flags 0x2200] or
212 [mem 0x0000000060000000-0x000000006fffffff flags 0x2200]
213 %pR [mem 0x60000000-0x6fffffff pref] or
[all …]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7786.c35 DEFINE_RES_MEM(0xffea0000, 0x100),
36 DEFINE_RES_IRQ(evt2irq(0x700)),
37 DEFINE_RES_IRQ(evt2irq(0x720)),
38 DEFINE_RES_IRQ(evt2irq(0x760)),
39 DEFINE_RES_IRQ(evt2irq(0x740)),
44 .id = 0,
62 DEFINE_RES_MEM(0xffeb0000, 0x100),
63 DEFINE_RES_IRQ(evt2irq(0x780)),
67 DEFINE_RES_MEM(0xffeb0000, 0x100),
69 DEFINE_RES_IRQ(0),
[all …]
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7786.c35 DEFINE_RES_MEM(0xffea0000, 0x100),
36 DEFINE_RES_IRQ(evt2irq(0x700)),
37 DEFINE_RES_IRQ(evt2irq(0x720)),
38 DEFINE_RES_IRQ(evt2irq(0x760)),
39 DEFINE_RES_IRQ(evt2irq(0x740)),
44 .id = 0,
62 DEFINE_RES_MEM(0xffeb0000, 0x100),
63 DEFINE_RES_IRQ(evt2irq(0x780)),
67 DEFINE_RES_MEM(0xffeb0000, 0x100),
69 DEFINE_RES_IRQ(0),
[all …]

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