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/kernel/linux/linux-6.6/drivers/pinctrl/tegra/
Dpinctrl-tegra234.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
1290 .drvup_bit = -1, \
1291 .slwr_bit = -1, \
[all …]
Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
23 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
27 #define TEGRA_PIN_SATA_LED_ACTIVE_PA5 _GPIO(5)
177 /* All non-GPIO pins follow */
178 #define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
181 /* Non-GPIO pins */
183 #define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
187 #define TEGRA_PIN_BATT_BCL _PIN(5)
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
[all …]
/kernel/linux/linux-5.10/Documentation/i2c/
Di2c_bus.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 inkscape:version="0.92.3 (2405546, 2018-03-11)"
30 inkscape:connector-curvature="0"
32 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
33 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
47 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
48 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
[all …]
/kernel/linux/linux-6.6/Documentation/i2c/
Di2c_bus.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 inkscape:version="0.92.3 (2405546, 2018-03-11)"
30 inkscape:connector-curvature="0"
32 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
33 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
47 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
48 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
[all …]
/kernel/linux/linux-5.10/arch/m68k/lib/
Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
20 * (%1). Thanks to Roman Hodek for pointing this out.
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
48 "subql #2,%1\n\t" /* buff%4==2: treat first word */ in csum_partial()
49 "jgt 1f\n\t" in csum_partial()
50 "addql #2,%1\n\t" /* len was == 2, treat only rest */ in csum_partial()
[all …]
/kernel/linux/linux-6.6/arch/m68k/lib/
Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
20 * (%1). Thanks to Roman Hodek for pointing this out.
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
48 "subql #2,%1\n\t" /* buff%4==2: treat first word */ in csum_partial()
49 "jgt 1f\n\t" in csum_partial()
50 "addql #2,%1\n\t" /* len was == 2, treat only rest */ in csum_partial()
[all …]
/kernel/linux/linux-5.10/fs/exfat/
Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
/kernel/linux/linux-6.6/arch/powerpc/lib/
Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
19 or 1,1,1
26 or 1,1,1
31 or 1,1,1
36 or 1,1,1
43 or 1,1,1
51 or 1,1,1
[all …]
/kernel/linux/linux-5.10/arch/powerpc/lib/
Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
19 or 1,1,1
26 or 1,1,1
31 or 1,1,1
36 or 1,1,1
43 or 1,1,1
51 or 1,1,1
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/tegra/
Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
23 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
27 #define TEGRA_PIN_SATA_LED_ACTIVE_PA5 _GPIO(5)
177 /* All non-GPIO pins follow */
178 #define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
181 /* Non-GPIO pins */
183 #define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
187 #define TEGRA_PIN_BATT_BCL _PIN(5)
1270 #define PINGROUP_REG_A 0x3000 /* bank 1 */
[all …]
/kernel/linux/linux-6.6/fs/exfat/
Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
/kernel/linux/linux-5.10/arch/alpha/lib/
Dmemmove.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 * This is hand-massaged output from the original memcpy.c. We defer to
22 .prologue 1
25 addq $17,$18,$5
26 cmpule $4,$17,$1 /* dest + n <= src */
27 cmpule $5,$16,$2 /* dest >= src + n */
29 bis $1,$2,$1
32 bne $1,memcpy !samegp
34 and $2,7,$2 /* Test for src/dest co-alignment. */
35 and $16,7,$1
[all …]
Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
[all …]
/kernel/linux/linux-6.6/arch/alpha/lib/
Dmemmove.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 * This is hand-massaged output from the original memcpy.c. We defer to
22 .prologue 1
25 addq $17,$18,$5
26 cmpule $4,$17,$1 /* dest + n <= src */
27 cmpule $5,$16,$2 /* dest >= src + n */
29 bis $1,$2,$1
32 bne $1,memcpy !samegp
34 and $2,7,$2 /* Test for src/dest co-alignment. */
35 and $16,7,$1
[all …]
Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/icelake/
Dpipeline.json4 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
10 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event"
351)' and generate another PMI (if enabled) after which the reset value gets clocked into the counte…
45-on-Store blocking code preventing store forwarding. This includes cases when: a. preceding store …
47 "Counter": "0,1,2,3",
49 "PEBScounters": "0,1,2,3",
58 "Counter": "0,1,2,3",
60 "PEBScounters": "0,1,2,3",
69 "Counter": "0,1,2,3",
71 "PEBScounters": "0,1,2,3",
[all …]
/kernel/linux/linux-5.10/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
6 Extra information for hardware version 1 found and
15 1. Introduction
18 4. Hardware version 1
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
31 6.2.1 One/Three finger touch
36 7.2.1 Status packet
42 8.2.1 Status Packet
50 hardware versions unimaginatively called version 1,version 2, version 3
[all …]
/kernel/linux/linux-6.6/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
6 Extra information for hardware version 1 found and
15 1. Introduction
18 4. Hardware version 1
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
31 6.2.1 One/Three finger touch
36 7.2.1 Status packet
42 8.2.1 Status Packet
50 hardware versions unimaginatively called version 1,version 2, version 3
[all …]
/kernel/linux/linux-6.6/arch/powerpc/crypto/
Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
29 # vs [r^1, r^3, r^2, r^4]
35 # vs5 = [r1*5,...]
36 # vs6 = [r2*5,...]
[all …]
/kernel/linux/linux-5.10/drivers/edac/
Dpnd2_edac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 u32 lock : 1;
31 u32 lock : 1;
41 u32 enable : 1;
54 u64 slice_1_disabled : 1;
55 u64 hvm_mode : 1;
57 u64 slice_0_mem_disabled : 1;
58 u64 reserved_0 : 1;
61 u64 enable_pmi_dual_data_mode : 1;
62 u64 ch_1_disabled : 1;
[all …]
/kernel/linux/linux-6.6/drivers/edac/
Dpnd2_edac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 u32 lock : 1;
31 u32 lock : 1;
41 u32 enable : 1;
54 u64 slice_1_disabled : 1;
55 u64 hvm_mode : 1;
57 u64 slice_0_mem_disabled : 1;
58 u64 reserved_0 : 1;
61 u64 enable_pmi_dual_data_mode : 1;
62 u64 ch_1_disabled : 1;
[all …]
/kernel/linux/linux-6.6/include/dt-bindings/pinctrl/
Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #define IMX8DXL_PCIE_CTRL0_CLKREQ_B 1
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
158 … IMX8DXL_USB_SS3_TC0_CONN_USB_OTG1_PWR IMX8DXL_USB_SS3_TC0 1
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
163 … IMX8DXL_USB_SS3_TC1_CONN_USB_OTG2_PWR IMX8DXL_USB_SS3_TC1 1
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
[all …]
/kernel/linux/linux-5.10/include/dt-bindings/pinctrl/
Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #define IMX8DXL_PCIE_CTRL0_CLKREQ_B 1
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
158 … IMX8DXL_USB_SS3_TC0_CONN_USB_OTG1_PWR IMX8DXL_USB_SS3_TC0 1
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
163 … IMX8DXL_USB_SS3_TC1_CONN_USB_OTG2_PWR IMX8DXL_USB_SS3_TC1 1
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/sandybridge/
Dpipeline.json12 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
22 "Counter": "Fixed counter 1",
27 "CounterHTOff": "Fixed counter 1"
30 "Counter": "Fixed counter 1",
32 "AnyThread": "1",
36 "CounterHTOff": "Fixed counter 1"
40 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
48 … See the table of not supported store forwards in the Intel\u00ae 64 and IA-32 Architectures Opti…
50 "Counter": "0,1,2,3",
[all …]

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