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/kernel/linux/linux-5.10/include/uapi/linux/
Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
42 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
63 #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
[all …]
Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
57 /* Media-dependent registers. */
58 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
59 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
60 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
61 * Lanes B-D are numbered 134-136. */
[all …]
/kernel/linux/linux-6.6/include/uapi/linux/
Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
42 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
63 #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
[all …]
Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
58 /* Media-dependent registers. */
59 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
60 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
61 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
62 * Lanes B-D are numbered 134-136. */
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/atheros/atlx/
Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
26 #define SPEED_1000 1000
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/atheros/atlx/
Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
26 #define SPEED_1000 1000
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
[all …]
/kernel/linux/linux-6.6/drivers/watchdog/
Dmt7621_wdt.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Ralink MT7621/MT7628 built-in hardware watchdog timer
35 void __iomem *base; member
47 static inline void rt_wdt_w32(void __iomem *base, unsigned int reg, u32 val) in rt_wdt_w32() argument
49 iowrite32(val, base + reg); in rt_wdt_w32()
52 static inline u32 rt_wdt_r32(void __iomem *base, unsigned int reg) in rt_wdt_r32() argument
54 return ioread32(base + reg); in rt_wdt_r32()
61 rt_wdt_w32(drvdata->base, TIMER_REG_TMRSTAT, TMR1CTL_RESTART); in mt7621_wdt_ping()
66 static int mt7621_wdt_set_timeout(struct watchdog_device *w, unsigned int t) in mt7621_wdt_set_timeout() argument
70 w->timeout = t; in mt7621_wdt_set_timeout()
[all …]
/kernel/linux/linux-6.6/include/linux/
Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/mii.h: definitions for MII-compatible transceivers
53 return (struct mii_ioctl_data *) &rq->ifr_ifru; in if_mii()
66 * between 100T-full and 100T-half. If your phy does not support
90 * @duplex_lock: Non-zero if duplex is locked at full
196 * MII_CTRL1000 register when in 1000T mode.
216 * MII_CTRL1000 register when in 1000T mode.
237 * bits, when in 1000Base-T mode, to ethtool
257 * bits, when in 1000Base-T mode, to ethtool
275 * bits, when in 1000Base-T mode, to ethtool
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: ethernet-phy.yaml#
14 - Andrew Davis <afd@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb/
Dmv88e1xxx.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 #define MII_GBCR 9 /* 1000Base-T control register */
19 #define MII_GBSR 10 /* 1000Base-T status register */
21 /* 1000Base-T control register fields */
28 /* 1000Base-T status register fields */
/kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb/
Dmv88e1xxx.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 #define MII_GBCR 9 /* 1000Base-T control register */
19 #define MII_GBSR 10 /* 1000Base-T status register */
21 /* 1000Base-T control register fields */
28 /* 1000Base-T status register fields */
/kernel/linux/linux-5.10/include/linux/
Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/mii.h: definitions for MII-compatible transceivers
53 return (struct mii_ioctl_data *) &rq->ifr_ifru; in if_mii()
66 * between 100T-full and 100T-half. If your phy does not support
90 * @duplex_lock: Non-zero if duplex is locked at full
196 * MII_CTRL1000 register when in 1000T mode.
216 * MII_CTRL1000 register when in 1000T mode.
237 * bits, when in 1000Base-T mode, to ethtool
257 * bits, when in 1000Base-T mode, to ethtool
275 * bits, when in 1000Base-T mode, to ethtool
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_utils.h37 #define FDO_BUG_URL "https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs"
79 #define i915_inject_probe_failure(i915) i915_inject_probe_error((i915), -ENODEV)
86 #define add_overflows_t(T, A, B) \ argument
87 __builtin_add_overflow_p((A), (B), (T)0)
89 #define add_overflows_t(T, A, B) ({ \ argument
92 (T)(a + b) < a; \
105 start__ >= max__ || size__ > max__ - start__; \
117 start__ > max__ || size__ > max__ - start__; \
123 /* Note we don't consider signbits :| */
124 #define overflows_type(x, T) \ argument
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c50 /*we don't have clk folder yet*/
55 clk_mgr->clk_mgr_shift->field_name, clk_mgr->clk_mgr_mask->field_name
58 (clk_mgr->regs->reg)
62 #define BASE(seg) BASE_INNER(seg) macro
65 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
93 /* fine-grained, only min and max */ in dcn3_init_single_clock()
103 entry_i += sizeof(clk_mgr->base.bw_params->clk_table.entries[0]); in dcn3_init_single_clock()
110 double pstate_latency_us = clk_mgr->base.ctx->dc->dml.soc.dram_clock_change_latency_us; in dcn3_build_wm_range_table()
111 double sr_exit_time_us = clk_mgr->base.ctx->dc->dml.soc.sr_exit_time_us; in dcn3_build_wm_range_table()
112 double sr_enter_plus_exit_time_us = clk_mgr->base.ctx->dc->dml.soc.sr_enter_plus_exit_time_us; in dcn3_build_wm_range_table()
[all …]
/kernel/linux/linux-5.10/drivers/memory/
Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
30 #include <linux/omap-gpmc.h>
34 #include <linux/platform_data/mtd-nand-omap2.h>
36 #define DEVICE_NAME "omap-gpmc"
96 * facilitate bug detection; even if we didn't boot from ROM.
243 /* Define chip-selects as reserved by default until probe completes */
284 rate /= 1000; in gpmc_get_fclk_period()
291 * gpmc_get_clk_period - get period of selected clock domain in ps
[all …]
/kernel/linux/linux-6.6/drivers/memory/
Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
32 #include <linux/omap-gpmc.h>
36 #include <linux/platform_data/mtd-nand-omap2.h>
38 #define DEVICE_NAME "omap-gpmc"
98 * facilitate bug detection; even if we didn't boot from ROM.
257 /* Define chip-selects as reserved by default until probe completes */
298 rate /= 1000; in gpmc_get_fclk_period()
305 * gpmc_get_clk_period - get period of selected clock domain in ps
[all …]
/kernel/linux/linux-5.10/drivers/watchdog/
Drti_wdt.c1 // SPDX-License-Identifier: GPL-2.0
5 * (c) Copyright 2019-2020 Texas Instruments Inc.
25 #define MAX_HEARTBEAT 1000
59 * @base - base io address of WD device
60 * @freq - source clock frequency of WDT
61 * @wdd - hold watchdog device as is in WDT core
64 void __iomem *base; member
75 ret = pm_runtime_resume_and_get(wdd->parent); in rti_wdt_start()
80 timer_margin = (u64)wdd->timeout * wdt->freq; in rti_wdt_start()
84 writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD); in rti_wdt_start()
[all …]
/kernel/linux/linux-6.6/net/ethtool/
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
12 [NETIF_F_SG_BIT] = "tx-scatter-gather",
13 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4",
14 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic",
15 [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6",
17 [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist",
18 [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert",
20 [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse",
21 [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter",
22 [NETIF_F_HW_VLAN_STAG_TX_BIT] = "tx-vlan-stag-hw-insert",
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
Di915_utils.h43 #define FDO_BUG_URL "https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs"
70 #define i915_inject_probe_failure(i915) i915_inject_probe_error((i915), -ENODEV)
77 #define add_overflows_t(T, A, B) \ argument
78 __builtin_add_overflow_p((A), (B), (T)0)
80 #define add_overflows_t(T, A, B) ({ \ argument
83 (T)(a + b) < a; \
96 start__ >= max__ || size__ > max__ - start__; \
108 start__ > max__ || size__ > max__ - start__; \
116 (typeof(ptr))(__v & -BIT(n)); \
119 #define ptr_unmask_bits(ptr, n) ((unsigned long)(ptr) & (BIT(n) - 1))
[all …]
/kernel/linux/linux-6.6/arch/mips/alchemy/common/
Dusb.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * area. Au1550 has OHCI on different base address. No need to handle
20 #include <asm/mach-au1x00/au1000.h>
28 #define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */
32 #define USBHEN_BE (1 << 0) /* OHCI Big-Endian */
98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl() argument
102 r = __raw_readl(base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
103 s = __raw_readl(base + USB_DWC_CTRL3); in __au1300_usb_phyctl()
112 __raw_writel(r, base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
118 __raw_writel(r, base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
[all …]
/kernel/linux/linux-5.10/arch/mips/alchemy/common/
Dusb.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * area. Au1550 has OHCI on different base address. No need to handle
20 #include <asm/mach-au1x00/au1000.h>
28 #define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */
32 #define USBHEN_BE (1 << 0) /* OHCI Big-Endian */
98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl() argument
102 r = __raw_readl(base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
103 s = __raw_readl(base + USB_DWC_CTRL3); in __au1300_usb_phyctl()
112 __raw_writel(r, base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
118 __raw_writel(r, base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramgt215.c25 #define gt215_ram(p) container_of((p), struct gt215_ram, base)
39 struct ramfuc base; member
94 struct nvkm_ram base; member
120 hi--; in gt215_link_train_calc()
125 median[i] = ((hi - lo) >> 1) + lo; in gt215_link_train_calc()
138 train->r_100720 = 0; in gt215_link_train_calc()
143 train->r_100720 |= ((median[i] & 0x0f) << (i << 2)); in gt215_link_train_calc()
146 train->r_1111e0 = 0x02000000 | (bin * 0x101); in gt215_link_train_calc()
147 train->r_111400 = 0x0; in gt215_link_train_calc()
156 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramgt215.c25 #define gt215_ram(p) container_of((p), struct gt215_ram, base)
39 struct ramfuc base; member
94 struct nvkm_ram base; member
120 hi--; in gt215_link_train_calc()
125 median[i] = ((hi - lo) >> 1) + lo; in gt215_link_train_calc()
138 train->r_100720 = 0; in gt215_link_train_calc()
143 train->r_100720 |= ((median[i] & 0x0f) << (i << 2)); in gt215_link_train_calc()
146 train->r_1111e0 = 0x02000000 | (bin * 0x101); in gt215_link_train_calc()
147 train->r_111400 = 0x0; in gt215_link_train_calc()
156 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train()
[all …]
/kernel/linux/linux-5.10/net/ethtool/
Dlinkmodes.c1 // SPDX-License-Identifier: GPL-2.0-only
8 struct ethnl_req_info base; member
12 struct ethnl_reply_data base; member
19 container_of(__reply_base, struct linkmodes_reply_data, base)
31 struct net_device *dev = reply_base->dev; in linkmodes_prepare_data()
34 data->lsettings = &data->ksettings.base; in linkmodes_prepare_data()
40 ret = __ethtool_get_link_ksettings(dev, &data->ksettings); in linkmodes_prepare_data()
46 data->peer_empty = in linkmodes_prepare_data()
47 bitmap_empty(data->ksettings.link_modes.lp_advertising, in linkmodes_prepare_data()
59 const struct ethtool_link_ksettings *ksettings = &data->ksettings; in linkmodes_reply_size()
[all …]

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