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/kernel/linux/linux-5.10/arch/mips/include/asm/sibyte/
Dsb1250_dma.h54 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
57 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
100 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
104 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
154 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
156 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
161 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
169 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
190 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
193 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
[all …]
Dsb1250_mac.h119 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
121 #endif /* 1250 PASS2 || 112x PASS1 || 1480*/
123 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
125 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
167 #if (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
209 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
212 #endif /* up to 1250 PASS1 */
213 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
215 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
220 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
[all …]
Dsb1250_regs.h50 #if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
91 #endif /* 1250 & 112x */
97 #if SIBYTE_HDR_FEATURE_1250_112x /* This L2C only on 1250/112x */
101 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
103 #endif /* 1250 PASS3 || 112x PASS1 */
108 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
112 #endif /* 1250 PASS2 || 112x PASS1 */
126 #if SIBYTE_HDR_FEATURE_1250_112x /* This PCI/HT only on 1250/112x */
138 #if SIBYTE_HDR_FEATURE_CHIP(1250)
140 #endif /* 1250 */
[all …]
Dsb1250_int.h67 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
70 #endif /* 1250 PASS2 || 112x PASS1 */
100 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
104 #endif /* 1250 PASS2 || 112x PASS1 */
141 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
144 #endif /* 1250 PASS2 || 112x PASS1 */
174 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
178 #endif /* 1250 PASS2 || 112x PASS1 */
235 #endif /* 1250/112x */
Dsb1250_ldt.h58 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
60 #endif /* 1250 PASS2 || 112x PASS1 */
150 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
152 #endif /* 1250 PASS2 || 112x PASS1 */
273 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
275 #endif /* up to 1250 PASS1 */
276 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
279 #endif /* 1250 PASS2 || 112x PASS1 */
398 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
407 #endif /* 1250 PASS2 || 112x PASS1 */
Dsb1250_genbus.h40 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
43 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
50 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
54 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
99 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
102 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
109 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
115 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
137 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
140 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
[all …]
Dsb1250_scd.h8 * manipulating the System Control and Debug module on the 1250.
61 #if SIBYTE_HDR_FEATURE_CHIP(1250)
68 #endif /* 1250 */
127 #define K_SYS_SOC_TYPE_BCM1250_ALT 0x2 /* 1250pass2 w/ 1/4 L2. */
130 #define K_SYS_SOC_TYPE_BCM1250_ALT2 0x5 /* 1250pass2 w/ 1/2 L2. */
291 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
293 #endif /* 1250 PASS2 || 112x PASS1 */
339 /* This feature is present in 1250 C0 and later, but *not* in 112x A revs. */
340 #if SIBYTE_HDR_FEATURE(1250, PASS3)
501 #endif /* 1250/112x */
[all …]
Dsb1250_smbus.h36 #define K_SMB_FREQ_10KHZ 1250
66 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
71 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
141 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
189 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
Dbcm1480_scd.h36 * the 1250. (above, you can see that we include the 1250 symbols
57 * This register is field compatible with the 1250.
78 * Entire register is different from 1250, all new constants below
172 * The watchdogs are almost the same as the 1250, except
228 * SPC_CFG_SRC[0-3] is the same as the 1250.
230 * The clear/enable bits are in different locations on the 1250 and 1480.
/kernel/linux/linux-6.6/arch/mips/include/asm/sibyte/
Dsb1250_dma.h54 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
57 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
100 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
104 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
154 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
156 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
161 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
169 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
190 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
193 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
[all …]
Dsb1250_mac.h119 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
121 #endif /* 1250 PASS2 || 112x PASS1 || 1480*/
123 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
125 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
167 #if (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
209 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
212 #endif /* up to 1250 PASS1 */
213 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
215 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
220 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
[all …]
Dsb1250_regs.h50 #if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
91 #endif /* 1250 & 112x */
97 #if SIBYTE_HDR_FEATURE_1250_112x /* This L2C only on 1250/112x */
101 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
103 #endif /* 1250 PASS3 || 112x PASS1 */
108 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
112 #endif /* 1250 PASS2 || 112x PASS1 */
126 #if SIBYTE_HDR_FEATURE_1250_112x /* This PCI/HT only on 1250/112x */
138 #if SIBYTE_HDR_FEATURE_CHIP(1250)
140 #endif /* 1250 */
[all …]
Dsb1250_int.h67 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
70 #endif /* 1250 PASS2 || 112x PASS1 */
100 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
104 #endif /* 1250 PASS2 || 112x PASS1 */
141 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
144 #endif /* 1250 PASS2 || 112x PASS1 */
174 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
178 #endif /* 1250 PASS2 || 112x PASS1 */
235 #endif /* 1250/112x */
Dsb1250_ldt.h58 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
60 #endif /* 1250 PASS2 || 112x PASS1 */
150 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
152 #endif /* 1250 PASS2 || 112x PASS1 */
273 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
275 #endif /* up to 1250 PASS1 */
276 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
279 #endif /* 1250 PASS2 || 112x PASS1 */
398 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
407 #endif /* 1250 PASS2 || 112x PASS1 */
Dsb1250_genbus.h40 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
43 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
50 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
54 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
99 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
102 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
109 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
115 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
137 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
140 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
[all …]
Dsb1250_scd.h8 * manipulating the System Control and Debug module on the 1250.
61 #if SIBYTE_HDR_FEATURE_CHIP(1250)
68 #endif /* 1250 */
127 #define K_SYS_SOC_TYPE_BCM1250_ALT 0x2 /* 1250pass2 w/ 1/4 L2. */
130 #define K_SYS_SOC_TYPE_BCM1250_ALT2 0x5 /* 1250pass2 w/ 1/2 L2. */
291 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
293 #endif /* 1250 PASS2 || 112x PASS1 */
339 /* This feature is present in 1250 C0 and later, but *not* in 112x A revs. */
340 #if SIBYTE_HDR_FEATURE(1250, PASS3)
501 #endif /* 1250/112x */
[all …]
Dsb1250_smbus.h36 #define K_SMB_FREQ_10KHZ 1250
66 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
71 #endif /* 1250 PASS3 || 112x PASS1 || 1480 */
141 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
189 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
Dbcm1480_scd.h36 * the 1250. (above, you can see that we include the 1250 symbols
57 * This register is field compatible with the 1250.
78 * Entire register is different from 1250, all new constants below
172 * The watchdogs are almost the same as the 1250, except
228 * SPC_CFG_SRC[0-3] is the same as the 1250.
230 * The clear/enable bits are in different locations on the 1250 and 1480.
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra30-peripherals-opp.dtsi71 opp-12750000-1250 {
92 opp-25500000-1250 {
113 opp-27000000-1250 {
134 opp-51000000-1250 {
155 opp-54000000-1250 {
176 opp-102000000-1250 {
190 opp-108000000-1250 {
205 opp-204000000-1250 {
220 opp-266500000-1250 {
241 opp-333500000-1250 {
[all …]
/kernel/linux/linux-6.6/arch/mips/sibyte/
DKconfig55 bool "1250 An"
62 bool "1250 Bn"
69 bool "1250 Cn"
/kernel/linux/linux-5.10/arch/mips/sibyte/
DKconfig85 bool "1250 An"
92 bool "1250 Bn"
99 bool "1250 Cn"
/kernel/linux/linux-6.6/drivers/iio/dac/
Dad5380.c275 .int_vref = 1250,
285 .int_vref = 1250,
295 .int_vref = 1250,
305 .int_vref = 1250,
315 .int_vref = 1250,
325 .int_vref = 1250,
335 .int_vref = 1250,
/kernel/linux/linux-5.10/drivers/iio/dac/
Dad5380.c277 .int_vref = 1250,
287 .int_vref = 1250,
297 .int_vref = 1250,
307 .int_vref = 1250,
317 .int_vref = 1250,
327 .int_vref = 1250,
337 .int_vref = 1250,
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dcirrus,cs42l43.yaml135 enum: [ 0, 125, 250, 500, 750, 1000, 1250, 1500 ]
142 enum: [ 0, 125, 250, 500, 750, 1000, 1250, 1500 ]
165 enum: [ 0, 125, 250, 500, 750, 1000, 1250, 1500 ]
172 enum: [ 0, 125, 250, 500, 750, 1000, 1250, 1500 ]
/kernel/linux/linux-6.6/drivers/clocksource/
Dnumachip.c44 .min_delta_ns = 1250,
45 .min_delta_ticks = 1250,

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