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/kernel/linux/linux-6.6/arch/arm/mach-davinci/
Dda850.c47 MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false)
48 MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false)
49 MUX_CFG(DA850, UART0_RXD, 3, 16, 15, 2, false)
50 MUX_CFG(DA850, UART0_TXD, 3, 20, 15, 2, false)
52 MUX_CFG(DA850, UART1_RXD, 4, 24, 15, 2, false)
53 MUX_CFG(DA850, UART1_TXD, 4, 28, 15, 2, false)
55 MUX_CFG(DA850, UART2_RXD, 4, 16, 15, 2, false)
56 MUX_CFG(DA850, UART2_TXD, 4, 20, 15, 2, false)
58 MUX_CFG(DA850, I2C1_SCL, 4, 16, 15, 4, false)
59 MUX_CFG(DA850, I2C1_SDA, 4, 20, 15, 4, false)
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-davinci/
Dda850.c59 MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false)
60 MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false)
61 MUX_CFG(DA850, UART0_RXD, 3, 16, 15, 2, false)
62 MUX_CFG(DA850, UART0_TXD, 3, 20, 15, 2, false)
64 MUX_CFG(DA850, UART1_RXD, 4, 24, 15, 2, false)
65 MUX_CFG(DA850, UART1_TXD, 4, 28, 15, 2, false)
67 MUX_CFG(DA850, UART2_RXD, 4, 16, 15, 2, false)
68 MUX_CFG(DA850, UART2_TXD, 4, 20, 15, 2, false)
70 MUX_CFG(DA850, I2C1_SCL, 4, 16, 15, 4, false)
71 MUX_CFG(DA850, I2C1_SDA, 4, 20, 15, 4, false)
[all …]
/kernel/linux/linux-6.6/arch/powerpc/crypto/
Daes-gcm-p10.S57 vcipher 15, 15, 19
62 vcipher 15, 15, 20
67 vcipher 15, 15, 21
72 vcipher 15, 15, 22
82 vcipher 15, 15, 19
87 vcipher 15, 15, 20
92 vcipher 15, 15, 21
97 vcipher 15, 15, 22
103 vcipher 15, 15, 23
119 vcipher 15, 15, 23
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/wm831x/
Dotp.h19 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
20 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
21 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
26 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
27 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
28 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
33 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
34 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
35 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
40 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
[all …]
Dregulator.h18 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
43 #define WM831X_CS2_ENA_SHIFT 15 /* CS2_ENA */
256 #define WM831X_INTLDO_UV_STS_SHIFT 15 /* INTLDO_UV_STS */
302 #define WM831X_DC1_RATE_MASK 0xC000 /* DC1_RATE - [15:14] */
303 #define WM831X_DC1_RATE_SHIFT 14 /* DC1_RATE - [15:14] */
304 #define WM831X_DC1_RATE_WIDTH 2 /* DC1_RATE - [15:14] */
326 #define WM831X_DC1_ERR_ACT_MASK 0xC000 /* DC1_ERR_ACT - [15:14] */
327 #define WM831X_DC1_ERR_ACT_SHIFT 14 /* DC1_ERR_ACT - [15:14] */
328 #define WM831X_DC1_ERR_ACT_WIDTH 2 /* DC1_ERR_ACT - [15:14] */
350 #define WM831X_DC1_ON_SLOT_MASK 0xE000 /* DC1_ON_SLOT - [15:13] */
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/wm831x/
Dotp.h19 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
20 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
21 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
26 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
27 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
28 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
33 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
34 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
35 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
40 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
[all …]
Dregulator.h18 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
43 #define WM831X_CS2_ENA_SHIFT 15 /* CS2_ENA */
256 #define WM831X_INTLDO_UV_STS_SHIFT 15 /* INTLDO_UV_STS */
302 #define WM831X_DC1_RATE_MASK 0xC000 /* DC1_RATE - [15:14] */
303 #define WM831X_DC1_RATE_SHIFT 14 /* DC1_RATE - [15:14] */
304 #define WM831X_DC1_RATE_WIDTH 2 /* DC1_RATE - [15:14] */
326 #define WM831X_DC1_ERR_ACT_MASK 0xC000 /* DC1_ERR_ACT - [15:14] */
327 #define WM831X_DC1_ERR_ACT_SHIFT 14 /* DC1_ERR_ACT - [15:14] */
328 #define WM831X_DC1_ERR_ACT_WIDTH 2 /* DC1_ERR_ACT - [15:14] */
350 #define WM831X_DC1_ON_SLOT_MASK 0xE000 /* DC1_ON_SLOT - [15:13] */
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/hid/tests/
Dtest_multitouch.py43 "TOUCH_SIZE_SCALING": BIT(15),
65 self.tippressure = 15
492 …15 00 25 01 95 03 75 01 81 02 95 05 81 03 05 01 15 00 26 ff 0f 55 0e 65 11 75 10 95 01 35 00 46 c8…
913 t1 = Touch(1, 15, 20)
1112 …15 00 25 01 81 02 95 07 75 01 81 03 95 01 75 08 81 03 05 01 09 30 09 31 15 00 26 ff 7f 35 00 46 00…
1123 …15 00 25 01 81 02 95 07 75 01 81 03 95 01 75 08 81 03 05 01 09 30 09 31 15 00 26 ff 7f 35 00 46 00…
1134 …15 00 25 01 75 01 95 01 81 02 09 32 81 02 09 47 81 02 95 05 81 03 09 51 75 08 95 01 81 02 05 01 35…
1171 …rdesc="05 0d 09 04 a1 01 85 01 09 22 a1 02 09 42 15 00 25 01 95 01 75 01 81 02 09 32 81 02 09 47 8…
1181 …15 00 25 01 75 01 95 01 81 02 09 32 81 02 09 47 81 02 95 05 81 03 09 51 75 08 95 01 81 02 05 01 35…
1190 …rdesc="05 0d 09 04 a1 01 85 01 09 22 a1 00 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 09 37 8…
[all …]
Dtest_tablet.py145 self.tippressure = 15
703 …15 00 25 01 75 01 95 01 81 02 09 32 15 00 25 01 81 02 09 51 75 05 95 01 16 00 00 26 10 00 81 02 09…
711 …15 00 25 01 75 01 95 01 81 02 09 32 15 00 25 01 81 02 09 51 75 05 95 01 16 00 00 26 10 00 81 02 09…
719 …15 00 25 01 75 01 95 01 81 02 09 32 15 00 25 01 81 02 09 51 75 05 95 01 16 00 00 26 10 00 81 02 09…
727 …15 00 25 01 75 01 95 01 81 02 09 32 15 00 25 01 81 02 09 51 75 05 95 01 16 00 00 26 10 00 81 02 09…
735 …15 00 25 01 75 01 95 01 81 02 09 32 15 00 25 01 81 02 09 51 75 05 95 01 16 00 00 26 10 00 81 02 09…
743 …15 00 25 01 75 01 95 01 81 02 09 32 15 00 25 01 81 02 09 51 75 05 95 01 16 00 00 26 10 00 81 02 09…
751 …15 00 25 01 95 02 75 01 81 02 95 06 81 03 05 01 09 30 09 31 15 00 26 ff 7f 75 10 95 02 81 02 c0 c0…
759 …15 00 25 01 75 01 95 01 81 02 09 32 81 02 95 06 81 03 75 08 09 51 95 01 81 02 05 01 26 ff 3f 75 10…
768 …15 00 25 01 75 01 95 01 81 02 09 32 81 02 95 06 81 03 75 08 09 51 95 01 81 02 05 01 26 ff 3f 75 10…
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/display/
Ddrm_dsc_helper.c152 /* PPS 14, 15 */ in drm_dsc_pps_payload_pack()
242 * are as follows: Min_qp[15:11], max_qp[10:6], offset[5:0] in drm_dsc_pps_payload_pack()
358 { 683, 15, 6144, 3, 13, 11, 11, {
362 { 10, 13, -12 }, { 12, 14, -12 }, { 15, 15, -12 }
372 { 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
378 { 512, 12, 6144, 7, 16, 15, 15, {
385 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 },
394 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
396 { 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 },
407 { 5, 12, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
[all …]
/kernel/linux/linux-6.6/arch/arm64/include/asm/
Dapple_m1_pmu.h10 #define SYS_IMP_APL_PMC0_EL1 sys_reg(3, 2, 15, 0, 0)
11 #define SYS_IMP_APL_PMC1_EL1 sys_reg(3, 2, 15, 1, 0)
12 #define SYS_IMP_APL_PMC2_EL1 sys_reg(3, 2, 15, 2, 0)
13 #define SYS_IMP_APL_PMC3_EL1 sys_reg(3, 2, 15, 3, 0)
14 #define SYS_IMP_APL_PMC4_EL1 sys_reg(3, 2, 15, 4, 0)
15 #define SYS_IMP_APL_PMC5_EL1 sys_reg(3, 2, 15, 5, 0)
16 #define SYS_IMP_APL_PMC6_EL1 sys_reg(3, 2, 15, 6, 0)
17 #define SYS_IMP_APL_PMC7_EL1 sys_reg(3, 2, 15, 7, 0)
18 #define SYS_IMP_APL_PMC8_EL1 sys_reg(3, 2, 15, 9, 0)
19 #define SYS_IMP_APL_PMC9_EL1 sys_reg(3, 2, 15, 10, 0)
[all …]
/kernel/linux/linux-6.6/drivers/infiniband/hw/irdma/
Di40iw_hw.h38 #define I40E_GLPES_PFIP4RXDISCARD(_i) (0x00010600 + ((_i) * 4)) /* _i=0...15 */ /* Reset…
39 #define I40E_GLPES_PFIP4RXTRUNC(_i) (0x00010700 + ((_i) * 4)) /* _i=0...15 */ /* Reset…
40 #define I40E_GLPES_PFIP4TXNOROUTE(_i) (0x00012E00 + ((_i) * 4)) /* _i=0...15 */ /* Reset…
41 #define I40E_GLPES_PFIP6RXDISCARD(_i) (0x00011200 + ((_i) * 4)) /* _i=0...15 */ /* Reset…
42 #define I40E_GLPES_PFIP6RXTRUNC(_i) (0x00011300 + ((_i) * 4)) /* _i=0...15 */ /* Reset…
44 #define I40E_GLPES_PFRDMAVBNDLO(_i) (0x00014800 + ((_i) * 8)) /* _i=0...15 */ /* Reset…
45 #define I40E_GLPES_PFIP4TXMCOCTSLO(_i) (0x00012000 + ((_i) * 8)) /* _i=0...15 */ /* Reset…
46 #define I40E_GLPES_PFIP6RXMCOCTSLO(_i) (0x00011600 + ((_i) * 8)) /* _i=0...15 */ /* Reset…
47 #define I40E_GLPES_PFIP6TXMCOCTSLO(_i) (0x00012A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset…
48 #define I40E_GLPES_PFUDPRXPKTSLO(_i) (0x00013800 + ((_i) * 8)) /* _i=0...15 */ /* Reset…
[all …]
/kernel/linux/linux-6.6/arch/csky/abiv2/inc/abi/
Dckmmu.h11 return mfcr("cr<0, 15>"); in read_mmu_index()
16 mtcr("cr<0, 15>", value); in write_mmu_index()
21 return mfcr("cr<2, 15>"); in read_mmu_entrylo0()
26 return mfcr("cr<3, 15>"); in read_mmu_entrylo1()
31 mtcr("cr<6, 15>", value); in write_mmu_pagemask()
36 return mfcr("cr<4, 15>"); in read_mmu_entryhi()
41 mtcr("cr<4, 15>", value); in write_mmu_entryhi()
46 return mfcr("cr<30, 15>"); in read_mmu_msa0()
51 mtcr("cr<30, 15>", value); in write_mmu_msa0()
56 return mfcr("cr<31, 15>"); in read_mmu_msa1()
[all …]
/kernel/linux/linux-5.10/arch/csky/abiv2/inc/abi/
Dckmmu.h12 return mfcr("cr<0, 15>"); in read_mmu_index()
17 mtcr("cr<0, 15>", value); in write_mmu_index()
22 return mfcr("cr<2, 15>"); in read_mmu_entrylo0()
27 return mfcr("cr<3, 15>"); in read_mmu_entrylo1()
32 mtcr("cr<6, 15>", value); in write_mmu_pagemask()
37 return mfcr("cr<4, 15>"); in read_mmu_entryhi()
42 mtcr("cr<4, 15>", value); in write_mmu_entryhi()
47 return mfcr("cr<30, 15>"); in read_mmu_msa0()
52 mtcr("cr<30, 15>", value); in write_mmu_msa0()
57 return mfcr("cr<31, 15>"); in read_mmu_msa1()
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/hw/i40iw/
Di40iw_register.h62 #define I40E_VFINT_DYN_CTLN1(_INTVF) (0x00003800 + ((_INTVF) * 4)) /* _i=0...15 */ /*…
65 #define I40E_PFHMC_PDINV_PMSDPARTSEL_SHIFT 15
228 #define I40E_GLPE_PFAEQEDROPCNT(_i) (0x00131440 + ((_i) * 4)) /* _i=0...15 */ /* Rese…
229 #define I40E_GLPE_PFAEQEDROPCNT_MAX_INDEX 15
232 #define I40E_GLPE_PFCEQEDROPCNT(_i) (0x001313C0 + ((_i) * 4)) /* _i=0...15 */ /* Rese…
233 #define I40E_GLPE_PFCEQEDROPCNT_MAX_INDEX 15
236 #define I40E_GLPE_PFCQEDROPCNT(_i) (0x00131340 + ((_i) * 4)) /* _i=0...15 */ /* Reset:…
237 #define I40E_GLPE_PFCQEDROPCNT_MAX_INDEX 15
315 #define I40E_GLPES_PFIP4RXDISCARD(_i) (0x00010600 + ((_i) * 4)) /* _i=0...15 */ /* R…
316 #define I40E_GLPES_PFIP4RXDISCARD_MAX_INDEX 15
[all …]
/kernel/linux/linux-6.6/arch/s390/include/asm/
Dvx-insn-asm.h76 \opd = 15
140 \opd = 15
252 .word (0xE700 | ((v1&15) << 4))
268 .word 0xE700 | ((v1&15) << 4) | r3
289 .word 0xE700 | ((v1&15) << 4) | (v2&15)
299 .word 0xE700 | ((v1&15) << 4) | x2
309 .word 0xE700 | ((v1&15) << 4) | x2
329 .word 0xE700 | ((v1&15) << 4)
351 .word 0xE700 | (r1 << 4) | (v3&15)
373 .word 0xE700 | ((v1&15) << 4) | (v3&15)
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Dwm5100.h893 #define WM5100_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
894 #define WM5100_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
895 #define WM5100_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
1102 #define WM5100_ISRC1_INT1_ENA_SHIFT 15 /* ISRC1_INT1_ENA */
1159 #define WM5100_ISRC2_INT1_ENA_SHIFT 15 /* ISRC2_INT1_ENA */
1215 #define WM5100_FLL1_THETA_MASK 0xFFFF /* FLL1_THETA - [15:0] */
1216 #define WM5100_FLL1_THETA_SHIFT 0 /* FLL1_THETA - [15:0] */
1217 #define WM5100_FLL1_THETA_WIDTH 16 /* FLL1_THETA - [15:0] */
1239 #define WM5100_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */
1240 #define WM5100_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */
[all …]
Dwm9081.h90 #define WM9081_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
91 #define WM9081_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
92 #define WM9081_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
348 #define WM9081_FLL_K_MASK 0xFFFF /* FLL_K - [15:0] */
349 #define WM9081_FLL_K_SHIFT 0 /* FLL_K - [15:0] */
350 #define WM9081_FLL_K_WIDTH 16 /* FLL_K - [15:0] */
479 #define WM9081_IRQ_POL_SHIFT 15 /* IRQ_POL */
517 #define WM9081_DRC_ENA_SHIFT 15 /* DRC_ENA */
538 #define WM9081_DRC_ATK_MASK 0xF000 /* DRC_ATK - [15:12] */
539 #define WM9081_DRC_ATK_SHIFT 12 /* DRC_ATK - [15:12] */
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dwm5100.h893 #define WM5100_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
894 #define WM5100_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
895 #define WM5100_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
1102 #define WM5100_ISRC1_INT1_ENA_SHIFT 15 /* ISRC1_INT1_ENA */
1159 #define WM5100_ISRC2_INT1_ENA_SHIFT 15 /* ISRC2_INT1_ENA */
1215 #define WM5100_FLL1_THETA_MASK 0xFFFF /* FLL1_THETA - [15:0] */
1216 #define WM5100_FLL1_THETA_SHIFT 0 /* FLL1_THETA - [15:0] */
1217 #define WM5100_FLL1_THETA_WIDTH 16 /* FLL1_THETA - [15:0] */
1239 #define WM5100_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */
1240 #define WM5100_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */
[all …]
/kernel/linux/linux-5.10/arch/s390/include/asm/
Dvx-insn.h73 \opd = 15
137 \opd = 15
249 .word (0xE700 | ((v1&15) << 4))
265 .word 0xE700 | ((v1&15) << 4) | r3
286 .word 0xE700 | ((v1&15) << 4) | (v2&15)
296 .word 0xE700 | ((v1&15) << 4) | x2
306 .word 0xE700 | ((v1&15) << 4) | x2
326 .word 0xE700 | ((v1&15) << 4)
348 .word 0xE700 | (r1 << 4) | (v3&15)
370 .word 0xE700 | ((v1&15) << 4) | (v3&15)
[all …]
/kernel/linux/linux-6.6/drivers/net/can/dev/
Dlength.c30 15, 15, 15, 15, 15, 15, 15, 15, /* 49 - 56 */
31 15, 15, 15, 15, 15, 15, 15, 15 /* 57 - 64 */
/kernel/linux/linux-6.6/lib/zstd/compress/
Dclevels.h28 { 20, 15, 16, 1, 6, 0, ZSTD_fast }, /* level 2 */
41 { 22, 23, 23, 6, 5, 32, ZSTD_btlazy2 }, /* level 15 */
67 { 18, 18, 19, 6, 3,128, ZSTD_btopt }, /* level 15.*/
80 { 17, 13, 15, 1, 5, 0, ZSTD_fast }, /* level 2 */
81 { 17, 15, 16, 2, 5, 0, ZSTD_dfast }, /* level 3 */
93 { 17, 18, 17, 6, 3,256, ZSTD_btopt }, /* level 15.*/
105 { 14, 14, 15, 1, 5, 0, ZSTD_fast }, /* level 1 */
106 { 14, 14, 15, 1, 4, 0, ZSTD_fast }, /* level 2 */
107 { 14, 14, 15, 2, 4, 0, ZSTD_dfast }, /* level 3 */
113 { 14, 15, 14, 5, 4, 8, ZSTD_btlazy2 }, /* level 9.*/
[all …]
/kernel/linux/linux-6.6/tools/accounting/
Dgetdelays.c198 printf("\n\nCPU %15s%15s%15s%15s%15s\n" in print_delayacct()
199 " %15llu%15llu%15llu%15llu%15.3fms\n" in print_delayacct()
200 "IO %15s%15s%15s\n" in print_delayacct()
201 " %15llu%15llu%15.3fms\n" in print_delayacct()
202 "SWAP %15s%15s%15s\n" in print_delayacct()
203 " %15llu%15llu%15.3fms\n" in print_delayacct()
204 "RECLAIM %12s%15s%15s\n" in print_delayacct()
205 " %15llu%15llu%15.3fms\n" in print_delayacct()
206 "THRASHING%12s%15s%15s\n" in print_delayacct()
207 " %15llu%15llu%15.3fms\n" in print_delayacct()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Domap3-echo.dts111 max-cur = /bits/ 8 <15>;
115 max-cur = /bits/ 8 <15>;
119 max-cur = /bits/ 8 <15>;
123 max-cur = /bits/ 8 <15>;
127 max-cur = /bits/ 8 <15>;
131 max-cur = /bits/ 8 <15>;
135 max-cur = /bits/ 8 <15>;
139 max-cur = /bits/ 8 <15>;
143 max-cur = /bits/ 8 <15>;
155 max-cur = /bits/ 8 <15>;
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/mediatek/
Dmtk_dp_reg.h21 #define DA_XTP_GLB_CKDET_EN_FORCE_VAL BIT(15)
38 #define RG_XTP_LN0_TX_IMPSEL_PMOS GENMASK(15, 12)
41 #define RG_XTP_LN1_TX_IMPSEL_PMOS GENMASK(15, 12)
44 #define RG_XTP_LN2_TX_IMPSEL_PMOS GENMASK(15, 12)
47 #define RG_XTP_LN3_TX_IMPSEL_PMOS GENMASK(15, 12)
90 #define HTOTAL_SW_DP_ENC0_P0_MASK GENMASK(15, 0)
92 #define VTOTAL_SW_DP_ENC0_P0_MASK GENMASK(15, 0)
94 #define HSTART_SW_DP_ENC0_P0_MASK GENMASK(15, 0)
96 #define VSTART_SW_DP_ENC0_P0_MASK GENMASK(15, 0)
98 #define HWIDTH_SW_DP_ENC0_P0_MASK GENMASK(15, 0)
[all …]

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