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/kernel/linux/linux-6.6/Documentation/virt/hyperv/
Doverview.rst1 .. SPDX-License-Identifier: GPL-2.0
6 enlightened guest on Microsoft's Hyper-V hypervisor. Hyper-V
7 consists primarily of a bare-metal hypervisor plus a virtual machine
10 partitions. In this documentation, references to Hyper-V usually
15 Hyper-V runs on x86/x64 and arm64 architectures, and Linux guests
16 are supported on both. The functionality and behavior of Hyper-V is
19 Linux Guest Communication with Hyper-V
20 --------------------------------------
21 Linux guests communicate with Hyper-V in four different ways:
23 * Implicit traps: As defined by the x86/x64 or arm64 architecture,
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/kernel/linux/linux-6.6/drivers/staging/media/meson/vdec/
Dcodec_h264.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <media/v4l2-mem2mem.h>
8 #include <media/videobuf2-dma-contig.h>
26 #define CMD_SRC_CHANGE 1
32 #define SEI_DATA_READY BIT(15)
45 #define ERROR_FLAG BIT(9)
57 #define AR_PRESENT_FLAG BIT(0)
62 * This is a 16x16 encoded picture that will trigger drain firmware-side.
72 0x63, 0x6f, 0x64, 0x65, 0x63, 0x20, 0x2d, 0x20, 0x43, 0x6f, 0x70, 0x79,
75 0x77, 0x77, 0x77, 0x2e, 0x76, 0x69, 0x64, 0x65, 0x6f, 0x6c, 0x61, 0x6e,
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/kernel/linux/linux-5.10/drivers/staging/media/meson/vdec/
Dcodec_h264.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <media/v4l2-mem2mem.h>
8 #include <media/videobuf2-dma-contig.h>
26 #define CMD_SRC_CHANGE 1
32 #define SEI_DATA_READY BIT(15)
45 #define ERROR_FLAG BIT(9)
57 #define AR_PRESENT_FLAG BIT(0)
62 * This is a 16x16 encoded picture that will trigger drain firmware-side.
72 0x63, 0x6f, 0x64, 0x65, 0x63, 0x20, 0x2d, 0x20, 0x43, 0x6f, 0x70, 0x79,
75 0x77, 0x77, 0x77, 0x2e, 0x76, 0x69, 0x64, 0x65, 0x6f, 0x6c, 0x61, 0x6e,
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/kernel/linux/linux-6.6/include/linux/
Dcper.h1 /* SPDX-License-Identifier: GPL-2.0-only */
80 /* Non-Maskable Interrupt */
87 0xD4, 0x64, 0xB3, 0x8F)
130 /* If set, the component must be re-initialized or re-enabled prior to use */
181 /* PCI/PCI-X Bus */
191 0xDE, 0x3E, 0x2C, 0x64)
257 #define CPER_ARM_VALID_MPIDR BIT(0)
258 #define CPER_ARM_VALID_AFFINITY_LEVEL BIT(1)
259 #define CPER_ARM_VALID_RUNNING_STATE BIT(2)
260 #define CPER_ARM_VALID_VENDOR_INFO BIT(3)
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/kernel/linux/linux-5.10/include/linux/
Dcper.h1 /* SPDX-License-Identifier: GPL-2.0-only */
80 /* Non-Maskable Interrupt */
87 0xD4, 0x64, 0xB3, 0x8F)
130 /* If set, the component must be re-initialized or re-enabled prior to use */
181 /* PCI/PCI-X Bus */
191 0xDE, 0x3E, 0x2C, 0x64)
257 #define CPER_ARM_VALID_MPIDR BIT(0)
258 #define CPER_ARM_VALID_AFFINITY_LEVEL BIT(1)
259 #define CPER_ARM_VALID_RUNNING_STATE BIT(2)
260 #define CPER_ARM_VALID_VENDOR_INFO BIT(3)
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/kernel/linux/linux-6.6/drivers/media/platform/qcom/venus/
Dhfi_venus_io.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
14 #define VBIF_AXI_HALT_CTRL0_HALT_REQ BIT(0)
15 #define VBIF_AXI_HALT_CTRL1_HALT_ACK BIT(0)
30 #define VIDC_CTRL_INIT_RESERVED_BITS31_1_SHIFT 1
42 #define CPU_CS_SCIACMDARG0_PC_READY BIT(8)
43 #define CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK BIT(30)
56 #define UC_REGION_ADDR 0x64
117 #define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64
121 #define WRAPPER_CPU_AXI_HALT_HALT BIT(16)
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/kernel/linux/linux-5.10/drivers/media/platform/qcom/venus/
Dhfi_venus_io.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
14 #define VBIF_AXI_HALT_CTRL0_HALT_REQ BIT(0)
15 #define VBIF_AXI_HALT_CTRL1_HALT_ACK BIT(0)
27 #define VIDC_CTRL_INIT_RESERVED_BITS31_1_SHIFT 1
39 #define CPU_CS_SCIACMDARG0_PC_READY BIT(8)
40 #define CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK BIT(30)
53 #define UC_REGION_ADDR 0x64
113 #define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64
117 #define WRAPPER_CPU_AXI_HALT_HALT BIT(16)
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/kernel/linux/linux-5.10/include/video/
Dtdfx.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/i2c-algo-bit.h>
34 #define HWCURLOC 0x64
76 #define COLORFORE (0x00100000 + 0x64)
91 #define AUTOINC_DSTX BIT(10)
92 #define AUTOINC_DSTY BIT(11)
98 #define STATUS_RETRACE BIT(6)
99 #define STATUS_BUSY BIT(9)
100 #define MISCINIT1_CLUT_INV BIT(0)
101 #define MISCINIT1_2DBLOCK_DIS BIT(15)
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/kernel/linux/linux-6.6/include/video/
Dtdfx.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/i2c-algo-bit.h>
34 #define HWCURLOC 0x64
76 #define COLORFORE (0x00100000 + 0x64)
91 #define AUTOINC_DSTX BIT(10)
92 #define AUTOINC_DSTY BIT(11)
98 #define STATUS_RETRACE BIT(6)
99 #define STATUS_BUSY BIT(9)
100 #define MISCINIT1_CLUT_INV BIT(0)
101 #define MISCINIT1_2DBLOCK_DIS BIT(15)
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/kernel/linux/linux-6.6/drivers/gpu/drm/rockchip/
Drockchip_drm_vop2.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Author:Mark Yao <mark.yao@rock-chips.com>
15 #define VOP_FEATURE_OUTPUT_10BIT BIT(0)
17 #define WIN_FEATURE_AFBDC BIT(0)
18 #define WIN_FEATURE_CLUSTER BIT(1)
155 #define FS_NEW_INTR BIT(4)
156 #define ADDR_SAME_INTR BIT(5)
157 #define LINE_FLAG1_INTR BIT(6)
158 #define WIN0_EMPTY_INTR BIT(7)
159 #define WIN1_EMPTY_INTR BIT(8)
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/kernel/linux/linux-6.6/drivers/bus/mhi/
Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 #define ECABAP_HIGHER 0x64
62 #define BHI_OEMPKHASH(n) (0x64 + (0x4 * (n)))
81 #define BHIE_RXVECADDR_HIGH_OFFS 0x64
112 #define MHICTRL_RESET_MASK BIT(1)
114 #define MHISTATUS_SYSERR_MASK BIT(2)
115 #define MHISTATUS_READY_MASK BIT(0)
144 #define MHI_TRE_GET_DWORD(tre, word) le32_to_cpu((tre)->dword[(word)])
145 #define MHI_TRE_GET_CMD_CHID(tre) FIELD_GET(GENMASK(31, 24), MHI_TRE_GET_DWORD(tre, 1))
146 #define MHI_TRE_GET_CMD_TYPE(tre) FIELD_GET(GENMASK(23, 16), MHI_TRE_GET_DWORD(tre, 1))
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/kernel/linux/linux-5.10/drivers/ide/
Dcs5520.c41 #include <linux/dma-mapping.h>
55 {1, 4, 3},
56 {1, 3, 2},
57 {1, 2, 1}
62 struct pci_dev *pdev = to_pci_dev(hwif->dev); in cs5520_set_pio_mode()
63 int controller = drive->dn > 1 ? 1 : 0; in cs5520_set_pio_mode()
64 const u8 pio = drive->pio_mode - XFER_PIO_0; in cs5520_set_pio_mode()
66 /* 8bit CAT/CRT - 8bit command timing for channel */ in cs5520_set_pio_mode()
71 /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */ in cs5520_set_pio_mode()
75 pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1), in cs5520_set_pio_mode()
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/kernel/linux/linux-5.10/arch/arm/mach-mmp/
Dpm-mmp2.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <asm/mach-types.h>
21 #include "addr-map.h"
22 #include "pm-mmp2.h"
23 #include "regs-icu.h"
29 int irq = d->irq; in mmp2_set_wake()
64 __raw_writel(0x0, CIU_REG(0x64)); in pm_scu_clk_disable()
80 __raw_writel(0x03003003, CIU_REG(0x64)); in pm_scu_clk_enable()
106 val |= (1 << 29); in pm_mpmu_clk_enable()
119 | MPMU_PCR_PJ_AXISD | MPMU_PCR_PJ_VCTCXOSD | (1 << 13)); in mmp2_pm_enter_lowpower_mode()
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/kernel/linux/linux-5.10/Documentation/trace/
Duprobetracer.rst2 Uprobe-tracer: Uprobe-based Event Tracing
9 --------
13 Similar to the kprobe-event tracer, this doesn't need to be activated via
18 However unlike kprobe-event tracer, the uprobe event interface expects the
26 -------------------------
32 -:[GRP/]EVENT : Clear uprobe or uretprobe event
47 $retval : Fetch return value.(\*1)
49 +|-[u]OFFS(FETCHARG) : Fetch memory at FETCHARG +|- OFFS address.(\*2)(\*3)
54 (x8/x16/x32/x64), "string" and bitfield are supported.
56 (\*1) only for return probe.
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/kernel/linux/linux-6.6/Documentation/trace/
Duprobetracer.rst2 Uprobe-tracer: Uprobe-based Event Tracing
9 --------
13 Similar to the kprobe-event tracer, this doesn't need to be activated via
18 However unlike kprobe-event tracer, the uprobe event interface expects the
26 -------------------------
32 -:[GRP/][EVENT] : Clear uprobe or uretprobe event
47 $retval : Fetch return value.(\*1)
49 +|-[u]OFFS(FETCHARG) : Fetch memory at FETCHARG +|- OFFS address.(\*2)(\*3)
54 (x8/x16/x32/x64), "string" and bitfield are supported.
56 (\*1) only for return probe.
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/kernel/linux/linux-6.6/include/linux/mfd/
Dtps65912.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
117 #define TPS65912_VERNUM 0x64
118 #define TPS6591X_MAX_REGISTER 0x64
121 #define TPS65912_INT_STS_PWRHOLD_F BIT(0)
122 #define TPS65912_INT_STS_VMON BIT(1)
123 #define TPS65912_INT_STS_PWRON BIT(2)
124 #define TPS65912_INT_STS_PWRON_LP BIT(3)
125 #define TPS65912_INT_STS_PWRHOLD_R BIT(4)
126 #define TPS65912_INT_STS_HOTDIE BIT(5)
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/i2c/
Dmt9m114.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #include <media/v4l2-subdev.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-ctrls.h>
31 #include <linux/v4l2-mediabus.h>
32 #include <media/media-entity.h>
42 #define MISENSOR_8BIT 1
57 #define MISENSOR_AWB_STEADY BIT(0) /* awb steady */
58 #define MISENSOR_AE_READY BIT(3) /* ae status ready */
65 #define MISENSOR_FLIP_EN 1
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/
Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
22 maxItems: 1
26 maxItems: 1
28 enable-gpios:
30 maxItems: 1
32 reset-gpios:
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/kernel/linux/linux-6.6/drivers/staging/media/atomisp/i2c/
Dmt9m114.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #include <media/v4l2-subdev.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-ctrls.h>
31 #include <linux/v4l2-mediabus.h>
32 #include <media/media-entity.h>
42 #define MISENSOR_8BIT 1
57 #define MISENSOR_AWB_STEADY BIT(0) /* awb steady */
58 #define MISENSOR_AE_READY BIT(3) /* ae status ready */
65 #define MISENSOR_FLIP_EN 1
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/kernel/linux/linux-5.10/Documentation/bpf/
Dbpf_design_QA.rst18 Q: Is BPF a generic instruction set similar to x64 and arm64?
19 -------------------------------------------------------------
23 -------------------------------------
27 -----------------------------------------------------------
34 with two most used architectures x64 and arm64 (and takes into
45 A: NO. BPF calling convention only allows registers R1-R5 to be used
47 (unlike x64 ISA that allows msft, cdecl and other conventions)
50 -----------------------------------------------------------------
54 ------------------------------------------
62 Q: Does C-calling convention diminishes possible use cases?
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/kernel/linux/linux-5.10/include/linux/mfd/
Dtps65912.h2 * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
125 #define TPS65912_VERNUM 0x64
126 #define TPS6591X_MAX_REGISTER 0x64
129 #define TPS65912_INT_STS_PWRHOLD_F BIT(0)
130 #define TPS65912_INT_STS_VMON BIT(1)
131 #define TPS65912_INT_STS_PWRON BIT(2)
132 #define TPS65912_INT_STS_PWRON_LP BIT(3)
133 #define TPS65912_INT_STS_PWRHOLD_R BIT(4)
134 #define TPS65912_INT_STS_HOTDIE BIT(5)
135 #define TPS65912_INT_STS_GPIO1_R BIT(6)
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/kernel/linux/linux-6.6/drivers/irqchip/
Dirq-imx-mu-msi.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * Based on drivers/mailbox/imx-mailbox.c
46 IMX_MU_V2 = BIT(1),
50 #define IMX_MU_xCR_RIEn(data, x) ((data->cfg->type) & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
51 #define IMX_MU_xSR_RFn(data, x) ((data->cfg->type) & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
73 iowrite32(val, msi_data->regs + offs); in imx_mu_write()
78 return ioread32(msi_data->regs + offs); in imx_mu_read()
86 raw_spin_lock_irqsave(&msi_data->lock, flags); in imx_mu_xcr_rmw()
87 val = imx_mu_read(msi_data, msi_data->cfg->xCR[type]); in imx_mu_xcr_rmw()
90 imx_mu_write(msi_data, val, msi_data->cfg->xCR[type]); in imx_mu_xcr_rmw()
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/kernel/linux/linux-5.10/drivers/acpi/pmic/
Dintel_pmic_bytcrc.c1 // SPDX-License-Identifier: GPL-2.0
15 #define PWR_SOURCE_SELECT BIT(1)
23 .bit = ??,
28 .bit = 0x00,
29 }, /* SYSX -> VSYS_SX */
33 .bit = 0x00,
34 }, /* SYSU -> VSYS_U */
37 .reg = 0x64,
38 .bit = 0x00,
39 }, /* SYSS -> VSYS_S */
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/kernel/linux/linux-6.6/drivers/acpi/pmic/
Dintel_pmic_bytcrc.c1 // SPDX-License-Identifier: GPL-2.0
15 #define PWR_SOURCE_SELECT BIT(1)
23 .bit = ??,
28 .bit = 0x00,
29 }, /* SYSX -> VSYS_SX */
33 .bit = 0x00,
34 }, /* SYSU -> VSYS_U */
37 .reg = 0x64,
38 .bit = 0x00,
39 }, /* SYSS -> VSYS_S */
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
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