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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic.txt8 notable difference from Open PIC binding is the addition of 2
14 - compatible
22 - reg
24 Value type: <prop-encoded-array>
29 - interrupt-controller
35 - #interrupt-cells
38 Definition: Shall be 2 or 4. A value of 2 means that interrupt
39 specifiers do not contain the interrupt-type or type-specific
42 - #address-cells
47 - pic-no-reset
[all …]
Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic.txt8 notable difference from Open PIC binding is the addition of 2
14 - compatible
22 - reg
24 Value type: <prop-encoded-array>
29 - interrupt-controller
35 - #interrupt-cells
38 Definition: Shall be 2 or 4. A value of 2 means that interrupt
39 specifiers do not contain the interrupt-type or type-specific
42 - #address-cells
47 - pic-no-reset
[all …]
Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
[all …]
Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mips/cavium/
Dbootbus.txt7 - compatible: "cavium,octeon-3860-bootbus"
11 - reg: The base address of the Boot Bus' register bank.
13 - #address-cells: Must be <2>. The first cell is the chip select
14 within the bootbus. The second cell is the offset from the chip select.
16 - #size-cells: Must be <1>.
18 - ranges: There must be one one triplet of (child-bus-address,
19 parent-bus-address, length) for each active chip select. If the
27 - compatible: "cavium,octeon-3860-bootbus-config"
29 - cavium,cs-index: A single cell indicating the chip select that
32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mips/cavium/
Dbootbus.txt7 - compatible: "cavium,octeon-3860-bootbus"
11 - reg: The base address of the Boot Bus' register bank.
13 - #address-cells: Must be <2>. The first cell is the chip select
14 within the bootbus. The second cell is the offset from the chip select.
16 - #size-cells: Must be <1>.
18 - ranges: There must be one one triplet of (child-bus-address,
19 parent-bus-address, length) for each active chip select. If the
27 - compatible: "cavium,octeon-3860-bootbus-config"
29 - cavium,cs-index: A single cell indicating the chip select that
32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/
Dt4240si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
[all …]
Dqoriq-qman1-portals.dtsi4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "simple-bus";
40 qportal0: qman-portal@0 {
41 compatible = "fsl,qman-portal";
43 interrupts = <104 2 0 0>;
44 cell-index = <0x0>;
46 qportal1: qman-portal@4000 {
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dt4240si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
[all …]
Dqoriq-qman1-portals.dtsi4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "simple-bus";
40 qportal0: qman-portal@0 {
41 compatible = "fsl,qman-portal";
43 interrupts = <104 2 0 0>;
44 cell-index = <0x0>;
46 qportal1: qman-portal@4000 {
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/
Disp2400_support.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * version 2, as published by the Free Software Foundation.
25 #define hrt_isp_vamem1_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _s… argument
26 #define hrt_isp_vamem2_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _s… argument
28 #define hrt_isp_dmem(cell) HRT_PROC_TYPE_PROP(cell, _base_dmem) argument
29 #define hrt_isp_vmem(cell) HRT_PROC_TYPE_PROP(cell, _simd_vmem) argument
31 #define hrt_isp_dmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_dmem(cell)) argument
32 #define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) argument
35 #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) argument
36 #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) argument
/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/
Disp2400_support.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * version 2, as published by the Free Software Foundation.
25 #define hrt_isp_vamem1_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _s… argument
26 #define hrt_isp_vamem2_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _s… argument
28 #define hrt_isp_dmem(cell) HRT_PROC_TYPE_PROP(cell, _base_dmem) argument
29 #define hrt_isp_vmem(cell) HRT_PROC_TYPE_PROP(cell, _simd_vmem) argument
31 #define hrt_isp_dmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_dmem(cell)) argument
32 #define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) argument
35 #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) argument
36 #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) argument
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dstericsson,u8500-clks.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/stericsson,u8500-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 (U8500) clocks
10 - Ulf Hansson <ulf.hansson@linaro.org>
11 - Linus Walleij <linus.walleij@linaro.org>
14 DB8500 digital baseband system-on-chip and its siblings such as
16 itself, not off-chip clocks. There are four different on-chip
17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dfsp2.dts7 * License version 2. This program is licensed "as is" without
12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <32>;
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dfsp2.dts7 * License version 2. This program is licensed "as is" without
12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <32>;
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dtmio_mmc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the MMC / SD / SDIO cell found in:
62 divisor = host->pdata->hclk / new_clock; in tmio_mmc_set_clock()
64 /* bit7 set: 1/512, ... bit0 set: 1/4, all bits clear: 1/2 */ in tmio_mmc_set_clock()
66 clk = clk_sel ? 0 : (roundup_pow_of_two(divisor) >> 2); in tmio_mmc_set_clock()
68 host->pdata->set_clk_div(host->pdev, clk_sel); in tmio_mmc_set_clock()
90 const struct mfd_cell *cell = mfd_get_cell(pdev); in tmio_mmc_suspend() local
96 if (!ret && cell->disable) in tmio_mmc_suspend()
97 cell->disable(pdev); in tmio_mmc_suspend()
105 const struct mfd_cell *cell = mfd_get_cell(pdev); in tmio_mmc_resume() local
[all …]
/kernel/linux/linux-5.10/fs/afs/
Dproc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 struct afs_cell *cell; in afs_proc_cells_show() local
45 cell = list_entry(v, struct afs_cell, proc_link); in afs_proc_cells_show()
46 vllist = rcu_dereference(cell->vl_servers); in afs_proc_cells_show()
48 /* display one cell per line on subsequent lines */ in afs_proc_cells_show()
49 seq_printf(m, "%3u %3u %6lld %2u %2u %s\n", in afs_proc_cells_show()
50 atomic_read(&cell->ref), in afs_proc_cells_show()
51 atomic_read(&cell->active), in afs_proc_cells_show()
52 cell->dns_expiry - ktime_get_real_seconds(), in afs_proc_cells_show()
53 vllist ? vllist->nr_servers : 0, in afs_proc_cells_show()
[all …]
/kernel/linux/linux-6.6/fs/afs/
Dproc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 struct afs_cell *cell; in afs_proc_cells_show() local
45 cell = list_entry(v, struct afs_cell, proc_link); in afs_proc_cells_show()
46 vllist = rcu_dereference(cell->vl_servers); in afs_proc_cells_show()
48 /* display one cell per line on subsequent lines */ in afs_proc_cells_show()
49 seq_printf(m, "%3u %3u %6lld %2u %2u %s\n", in afs_proc_cells_show()
50 refcount_read(&cell->ref), in afs_proc_cells_show()
51 atomic_read(&cell->active), in afs_proc_cells_show()
52 cell->dns_expiry - ktime_get_real_seconds(), in afs_proc_cells_show()
53 vllist ? vllist->nr_servers : 0, in afs_proc_cells_show()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dcdns,xtensa-pic.txt1 * Xtensa built-in Programmable Interrupt Controller (PIC)
4 - compatible: Should be "cdns,xtensa-pic".
5 - interrupt-controller: Identifies the node as an interrupt controller.
6 - #interrupt-cells: The number of cells to define the interrupts.
7 It may be either 1 or 2.
8 When it's 1, the first cell is the internal IRQ number.
9 When it's 2, the first cell is the IRQ number, and the second cell
18 compatible = "cdns,xtensa-pic";
19 /* one cell: internal irq number,
20 * two cells: second cell == 0: internal irq number
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dcdns,xtensa-pic.txt1 * Xtensa built-in Programmable Interrupt Controller (PIC)
4 - compatible: Should be "cdns,xtensa-pic".
5 - interrupt-controller: Identifies the node as an interrupt controller.
6 - #interrupt-cells: The number of cells to define the interrupts.
7 It may be either 1 or 2.
8 When it's 1, the first cell is the internal IRQ number.
9 When it's 2, the first cell is the IRQ number, and the second cell
18 compatible = "cdns,xtensa-pic";
19 /* one cell: internal irq number,
20 * two cells: second cell == 0: internal irq number
[all …]
/kernel/linux/linux-6.6/drivers/mfd/
Dmfd-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mfd/mfd-core.c
46 if (!acpi_match_device_ids(adev, wd->ids)) { in match_device_ids()
47 wd->adev = adev; in match_device_ids()
54 static void mfd_acpi_add_device(const struct mfd_cell *cell, in mfd_acpi_add_device() argument
57 const struct mfd_cell_acpi_match *match = cell->acpi_match; in mfd_acpi_add_device()
61 parent = ACPI_COMPANION(pdev->dev.parent); in mfd_acpi_add_device()
71 * though at least Intel Galileo Gen 2 is using it to distinguish in mfd_acpi_add_device()
75 if (match->pnpid) { in mfd_acpi_add_device()
76 struct acpi_device_id ids[2] = {}; in mfd_acpi_add_device()
[all …]

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