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/kernel/linux/linux-6.6/tools/testing/selftests/bpf/progs/
Dfexit_many_args.c1 // SPDX-License-Identifier: GPL-2.0
15 e == (void *)20 && f == 21 && g == 22 && ret == 133; in BPF_PROG()
22 int g, unsigned int h, long i, __u64 j, unsigned long k, in BPF_PROG() argument
26 e == (void *)20 && f == 21 && g == 22 && h == 23 && in BPF_PROG()
27 i == 24 && j == 25 && k == 26 && ret == 231; in BPF_PROG()
34 __u64 g, __u64 h, __u64 i, __u64 j, __u64 k, __u64 ret) in BPF_PROG() argument
37 e == 20 && f == 21 && g == 22 && h == 23 && in BPF_PROG()
38 i == 24 && j == 25 && k == 26 && ret == 231; in BPF_PROG()
Dfentry_many_args.c1 // SPDX-License-Identifier: GPL-2.0
15 e == (void *)20 && f == 21 && g == 22; in BPF_PROG()
22 int g, unsigned int h, long i, __u64 j, unsigned long k) in BPF_PROG() argument
25 e == (void *)20 && f == 21 && g == 22 && h == 23 && in BPF_PROG()
26 i == 24 && j == 25 && k == 26; in BPF_PROG()
33 __u64 g, __u64 h, __u64 i, __u64 j, __u64 k) in BPF_PROG() argument
36 e == 20 && f == 21 && g == 22 && h == 23 && in BPF_PROG()
37 i == 24 && j == 25 && k == 26; in BPF_PROG()
/kernel/linux/linux-6.6/crypto/
Dserpent_generic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 ({ b ^= d; b ^= c; b ^= a; b ^= PHI ^ i; b = rol32(b, 11); k[j] = b; })
28 ({ x0 = k[i]; x1 = k[i+1]; x2 = k[i+2]; x3 = k[i+3]; })
31 ({ k[i] = x0; k[i+1] = x1; k[i+2] = x2; k[i+3] = x3; })
36 #define K(x0, x1, x2, x3, i) ({ \ macro
37 x3 ^= k[4*(i)+3]; x2 ^= k[4*(i)+2]; \
38 x1 ^= k[4*(i)+1]; x0 ^= k[4*(i)+0]; \
48 x0 ^= x3; x2 ^= x4; x3 ^= k[4*i+3]; \
49 x1 ^= k[4*i+1]; x0 = rol32(x0, 5); x2 = rol32(x2, 22);\
50 x0 ^= k[4*i+0]; x2 ^= k[4*i+2]; \
[all …]
Dsm3.c1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * SM3 secure hash, as specified by OSCCA GM/T 0004-2012 SM3 and described
4 * at https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02
7 * Copyright (C) 2017 Gilad Ben-Yossef <gilad@benyossef.com>
15 static const u32 ____cacheline_aligned K[64] = { variable
35 * Transform the message X which consists of 16 32-bit-words. See
36 * GM/T 004-2012 for details.
67 ^ W[(i-9) & 0x0f] \
68 ^ rol32(W[(i-3) & 0x0f], 15)) \
69 ^ rol32(W[(i-13) & 0x0f], 7) \
[all …]
/kernel/linux/linux-5.10/crypto/
Dserpent_generic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 ({ b ^= d; b ^= c; b ^= a; b ^= PHI ^ i; b = rol32(b, 11); k[j] = b; })
33 ({ x0 = k[i]; x1 = k[i+1]; x2 = k[i+2]; x3 = k[i+3]; })
36 ({ k[i] = x0; k[i+1] = x1; k[i+2] = x2; k[i+3] = x3; })
41 #define K(x0, x1, x2, x3, i) ({ \ macro
42 x3 ^= k[4*(i)+3]; x2 ^= k[4*(i)+2]; \
43 x1 ^= k[4*(i)+1]; x0 ^= k[4*(i)+0]; \
53 x0 ^= x3; x2 ^= x4; x3 ^= k[4*i+3]; \
54 x1 ^= k[4*i+1]; x0 = rol32(x0, 5); x2 = rol32(x2, 22);\
55 x0 ^= k[4*i+0]; x2 ^= k[4*i+2]; \
[all …]
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/include/
Drtw_ht.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
13 u8 ampdu_enable;/* for enable Tx A-MPDU */
14 u8 tx_amsdu_enable;/* for enable Tx A-MSDU */
18 u32 tx_amsdu_maxlen; /* 1: 8k, 0:4k ; default:8k, for tx */
27 /* for processing Tx A-MPDU */
96 …CEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val))
97 …ANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val))
98 …MP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val))
99 …MP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val))
[all …]
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/include/
Drtw_ht.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
13 u8 ampdu_enable;/* for enable Tx A-MPDU */
14 u8 tx_amsdu_enable;/* for enable Tx A-MSDU */
18 u32 tx_amsdu_maxlen; /* 1: 8k, 0:4k ; default:8k, for tx */
27 /* for processing Tx A-MPDU */
100 …CEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val))
101 …ANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val))
102 …MP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val))
103 …MP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val))
[all …]
/kernel/linux/linux-5.10/arch/powerpc/lib/
Dtest_emulate_step.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <asm/ppc-opcode.h>
14 #include <asm/code-patching.h>
65 regs->msr = msr; in init_pt_regs()
69 asm volatile("mfmsr %0" : "=r"(regs->msr)); in init_pt_regs()
71 regs->msr |= MSR_FP; in init_pt_regs()
72 regs->msr |= MSR_VEC; in init_pt_regs()
73 regs->msr |= MSR_VSX; in init_pt_regs()
75 msr = regs->msr; in init_pt_regs()
81 pr_info("%-14s : %s\n", mnemonic, result); in show_result()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/marvell/
Darmada-cp11x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
[all …]
/kernel/linux/linux-6.6/arch/powerpc/crypto/
Dmd5-asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-offsets.h>
9 #include <asm/asm-compat.h>
40 PPC_STLU r1,-INT_FRAME_SIZE(r1); \
68 addi w0,w0,k0l; /* 1: wk = w + k */ \
70 addis w0,w0,k0h; /* 1: wk = w + k' */ \
71 addis w1,w1,k1h; /* 2: wk = w + k */ \
73 addi w1,w1,k1l; /* 2: wk = w + k' */ \
88 addi w0,w0,k0l; /* 1: wk = w + k */ \
90 addis w0,w0,k0h; /* 1: wk = w + k' */ \
[all …]
/kernel/linux/linux-5.10/arch/powerpc/crypto/
Dmd5-asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-offsets.h>
9 #include <asm/asm-compat.h>
40 PPC_STLU r1,-INT_FRAME_SIZE(r1); \
72 addi w0,w0,k0l; /* 1: wk = w + k */ \
74 addis w0,w0,k0h; /* 1: wk = w + k' */ \
75 addis w1,w1,k1h; /* 2: wk = w + k */ \
77 addi w1,w1,k1l; /* 2: wk = w + k' */ \
92 addi w0,w0,k0l; /* 1: wk = w + k */ \
94 addis w0,w0,k0h; /* 1: wk = w + k' */ \
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/
Darmada-cp11x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(thermal-ic) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/
Darmada-380-rtc.txt1 * Real Time Clock of the Armada 38x/7K/8K SoCs
3 RTC controller for the Armada 38x, 7K and 8K SoCs
6 - compatible : Should be one of the following:
7 "marvell,armada-380-rtc" for Armada 38x SoC
8 "marvell,armada-8k-rtc" for Aramda 7K/8K SoCs
9 - reg: a list of base address and size pairs, one for each entry in
10 reg-names
11 - reg names: should contain:
13 * "rtc-soc" for the SoC related registers and among them the one
15 - interrupts: IRQ line for the RTC.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/
Darmada-380-rtc.txt1 * Real Time Clock of the Armada 38x/7K/8K SoCs
3 RTC controller for the Armada 38x, 7K and 8K SoCs
6 - compatible : Should be one of the following:
7 "marvell,armada-380-rtc" for Armada 38x SoC
8 "marvell,armada-8k-rtc" for Aramda 7K/8K SoCs
9 - reg: a list of base address and size pairs, one for each entry in
10 reg-names
11 - reg names: should contain:
13 * "rtc-soc" for the SoC related registers and among them the one
15 - interrupts: IRQ line for the RTC.
[all …]
/kernel/linux/linux-5.10/arch/arm64/include/asm/
Dkernel-pgtable.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <asm/pgtable-hwdef.h>
17 * with 4K (section size = 2M) but not with 16K (section size = 32M) or
18 * 64K (section size = 512M).
29 * map the kernel. With the 64K page configuration, swapper and idmap need to
37 #define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1)
38 #define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT) - 1)
46 * If KASLR is enabled, then an offset K is added to the kernel address
47 * space. The bottom 21 bits of this offset are zero to guarantee 2MB
51 * be larger than 21 (for the 4KB granule case we use section maps thus
[all …]
/kernel/linux/linux-6.6/arch/arc/include/asm/
Dpgtable-levels.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * -------------------------------------------------------
20 * | | <---------- PGDIR_SHIFT ----------> |
21 * | | | <-- PAGE_SHIFT --> |
22 * -------------------------------------------------------
24 * | | --> off in page frame
25 * | ---> index into Page Table
26 * ----> index into Page Directory
36 #define PGDIR_SHIFT 21
40 * Default value provides 11:8:13 (8K), 10:10:12 (4K)
[all …]
/kernel/linux/linux-6.6/arch/powerpc/lib/
Dtest_emulate_step.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <asm/ppc-opcode.h>
14 #include <asm/code-patching.h>
64 regs->msr = msr; in init_pt_regs()
68 asm volatile("mfmsr %0" : "=r"(regs->msr)); in init_pt_regs()
70 regs->msr |= MSR_FP; in init_pt_regs()
71 regs->msr |= MSR_VEC; in init_pt_regs()
72 regs->msr |= MSR_VSX; in init_pt_regs()
74 msr = regs->msr; in init_pt_regs()
80 pr_info("%-14s : %s\n", mnemonic, result); in show_result()
[all …]
/kernel/linux/linux-6.6/arch/arm64/include/asm/
Dkernel-pgtable.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <asm/pgtable-hwdef.h>
18 * with 4K (section size = 2M) but not with 16K (section size = 32M) or
19 * 64K (section size = 512M).
25 * map the kernel. With the 64K page configuration, swapper and idmap need to
33 #define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1)
40 * If KASLR is enabled, then an offset K is added to the kernel address
41 * space. The bottom 21 bits of this offset are zero to guarantee 2MB
45 * be larger than 21 (for the 4KB granule case we use section maps thus
63 ((((vend) - 1) >> (shift)) - ((vstart) >> (shift)) + 1)
/kernel/linux/linux-5.10/include/uapi/linux/
Dkeyboard.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
45 #define K(t,v) (((t)<<8)|(v)) macro
49 #define K_F1 K(KT_FN,0)
50 #define K_F2 K(KT_FN,1)
51 #define K_F3 K(KT_FN,2)
52 #define K_F4 K(KT_FN,3)
53 #define K_F5 K(KT_FN,4)
54 #define K_F6 K(KT_FN,5)
55 #define K_F7 K(KT_FN,6)
56 #define K_F8 K(KT_FN,7)
[all …]
/kernel/linux/linux-6.6/include/uapi/linux/
Dkeyboard.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
45 #define K(t,v) (((t)<<8)|(v)) macro
49 #define K_F1 K(KT_FN,0)
50 #define K_F2 K(KT_FN,1)
51 #define K_F3 K(KT_FN,2)
52 #define K_F4 K(KT_FN,3)
53 #define K_F5 K(KT_FN,4)
54 #define K_F6 K(KT_FN,5)
55 #define K_F7 K(KT_FN,6)
56 #define K_F8 K(KT_FN,7)
[all …]
/kernel/linux/linux-5.10/drivers/clk/berlin/
Dbg2q.c1 // SPDX-License-Identifier: GPL-2.0
5 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
10 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/berlin2q.h>
19 #include "berlin2-div.h"
20 #include "berlin2-pll.h"
130 BERLIN2_DIV_SELECT(REG_CLKSELECT0, 21),
176 BERLIN2_PLL_SWITCH(REG_CLKSWITCH0, 21),
205 BERLIN2_DIV_SELECT(REG_CLKSELECT1, 21),
218 BERLIN2_DIV_GATE(REG_CLKENABLE, 21),
[all …]
/kernel/linux/linux-6.6/drivers/clk/berlin/
Dbg2q.c1 // SPDX-License-Identifier: GPL-2.0
5 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
10 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/berlin2q.h>
19 #include "berlin2-div.h"
20 #include "berlin2-pll.h"
130 BERLIN2_DIV_SELECT(REG_CLKSELECT0, 21),
176 BERLIN2_PLL_SWITCH(REG_CLKSWITCH0, 21),
205 BERLIN2_DIV_SELECT(REG_CLKSELECT1, 21),
218 BERLIN2_DIV_GATE(REG_CLKENABLE, 21),
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/nohash/32/
Dpte-40x.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * At present, all PowerPC 400-class processors share a similar TLB
9 * 64-entry, fully-associative TLB which is maintained totally under
11 * hardware-managed, 4-entry, fully-associative TLB which serves as a
18 * 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
23 * - bits 20 and 21 must be cleared, because we use 4k pages (40x can
24 * support down to 1k pages), this is done in the TLBMiss exception
26 * - We use only zones 0 (for kernel pages) and 1 (for user pages)
27 * of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
30 * - PRESENT *must* be in the bottom two bits because swap cache
[all …]
/kernel/linux/linux-6.6/arch/powerpc/include/asm/nohash/32/
Dpte-40x.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * At present, all PowerPC 400-class processors share a similar TLB
9 * 64-entry, fully-associative TLB which is maintained totally under
11 * hardware-managed, 4-entry, fully-associative TLB which serves as a
18 * 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
23 * - bits 20 and 21 must be cleared, because we use 4k pages (40x can
24 * support down to 1k pages), this is done in the TLBMiss exception
26 * - We use only zones 0 (for kernel pages) and 1 (for user pages)
27 * of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
30 * - PRESENT *must* be in the bottom two bits because swap PTEs
[all …]
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
Dkeyboard.h11 *** source file (e.g. under external/kernel-headers/original/) then
52 #define K(t,v) (((t) << 8) | (v)) macro
55 #define K_F1 K(KT_FN, 0)
56 #define K_F2 K(KT_FN, 1)
57 #define K_F3 K(KT_FN, 2)
58 #define K_F4 K(KT_FN, 3)
59 #define K_F5 K(KT_FN, 4)
60 #define K_F6 K(KT_FN, 5)
61 #define K_F7 K(KT_FN, 6)
62 #define K_F8 K(KT_FN, 7)
[all …]

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