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/kernel/linux/linux-6.6/arch/powerpc/crypto/
Daes-gcm-p10.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # Accelerated AES-GCM stitched implementation for ppc64le.
5 # Copyright 2022- IBM Inc. All rights reserved
22 # Hash keys = v3 - v14
29 # v31 - counter 1
32 # vs0 - vs14 for round keys
35 # This implementation uses stitched AES-GCM approach to improve overall performance.
48 # v15 - v18 - input states
49 # vs1 - vs9 - round keys
102 xxlor 23+32, 9, 9
[all …]
Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
81 stdu 1,-752(1)
93 SAVE_GPR 24, 192, 1
102 addi 9, 1, 256
103 SAVE_VRS 20, 0, 9
104 SAVE_VRS 21, 16, 9
105 SAVE_VRS 22, 32, 9
[all …]
Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
26 # to 9 vectors for multiplications.
56 #include <asm/asm-offsets.h>
57 #include <asm/asm-compat.h>
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/kernel/linux/linux-6.6/drivers/clk/mediatek/
Dclk-mt8195-apmixedsys.c1 // SPDX-License-Identifier: GPL-2.0-only
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
6 #include "clk-fhctl.h"
7 #include "clk-gate.h"
8 #include "clk-mtk.h"
9 #include "clk-pll.h"
10 #include "clk-pllfh.h"
12 #include <dt-bindings/clock/mt8195-clk.h>
63 0, 0, 22, 0x0398, 24, 0, 0, 0, 0x0398, 0, 0x0398, 0, 9),
65 0, 0, 22, 0x0198, 24, 0, 0, 0, 0x0198, 0, 0x0198, 0, 9),
[all …]
Dclk-mt8188-apmixedsys.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
11 #include "clk-gate.h"
12 #include "clk-mtk.h"
13 #include "clk-pll.h"
62 0, 0, 22, 0x0450, 24, 0, 0, 0, 0x0450, 0, 0, 0, 9),
64 0, 0, 22, 0x0518, 24, 0, 0, 0, 0x0518, 0, 0, 0, 9),
66 0, 0, 22, 0x0528, 24, 0, 0, 0, 0x0528, 0, 0, 0, 9),
68 0, 0, 22, 0x0538, 24, 0, 0, 0, 0x0538, 0, 0, 0, 9),
70 HAVE_RST_BAR, BIT(23), 22, 0x0548, 24, 0, 0, 0, 0x0548, 0, 0, 0, 9),
[all …]
/kernel/linux/linux-6.6/include/dt-bindings/memory/
Dmt8195-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <dt-bindings/memory/mtk-memory-port.h>
20 * modules dma-address-region larbs-ports
22 * vcodec 4G ~ 8G larb19/20/21/22/23/24
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
30 * iommu-vpp: larb1/3/4/6/8/12/14/16/18/20/22/23/26/27
100 #define M4U_PORT_L9_IMG_IMGI_T1_A MTK_M4U_ID(9, 0)
101 #define M4U_PORT_L9_IMG_IMGBI_T1_A MTK_M4U_ID(9, 1)
102 #define M4U_PORT_L9_IMG_IMGCI_T1_A MTK_M4U_ID(9, 2)
103 #define M4U_PORT_L9_IMG_SMTI_T1_A MTK_M4U_ID(9, 3)
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/kernel/linux/linux-5.10/arch/arm/mach-omap1/
Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
27 MUX_CFG_7XX("J7_7XX_KBR1", 12, 25, 0, 24, 1, 0)
31 MUX_CFG_7XX("C2_7XX_KBC0", 13, 9, 0, 8, 1, 0)
35 MUX_CFG_7XX("E3_7XX_KBC4", 13, 25, 0, 24, 1, 0)
38 MUX_CFG_7XX("W16_7XX_USB_PU_EN", 2, 25, 0, 24, 0, 0)
44 MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0)
54 MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0)
57 MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0)
[all …]
/kernel/linux/linux-6.6/arch/alpha/kernel/
Dentry.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Kernel entry-points.
8 #include <asm/asm-offsets.h>
28 .cfi_rel_offset $16, 24
35 .size \func, . - \func
39 * This defines the normal kernel pt-regs layout.
41 * regs 9-15 preserved by C code
42 * regs 16-18 saved by PAL-code
43 * regs 29-30 saved and set up by PAL-code
44 * JRP - Save regs 16-18 in a special area of the stack, so that
[all …]
/kernel/linux/linux-6.6/arch/arm64/tools/
Dsysreg1 # SPDX-License-Identifier: GPL-2.0-only
44 # NI - Not implemented
45 # IMP - Implemented
75 Res0 25:24
113 UnsignedEnum 27:24 DIT
154 UnsignedEnum 27:24 Virt_frac
193 UnsignedEnum 27:24 PerfMon
252 UnsignedEnum 27:24 FCSE
301 Enum 27:24 L1TstCln
347 Enum 27:24 WFIStall
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/kernel/linux/linux-6.6/arch/arm/mach-omap1/
Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
42 MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0)
44 MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0)
53 MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1)
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/kernel/linux/linux-6.6/Documentation/translations/zh_CN/core-api/
Dpacking.rst1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/packing.rst
22 --------
42 --------
46 - 将一个CPU可使用的数字打包到内存缓冲区中（具有硬件约束/特殊性）。
47 - 将内存缓冲区（具有硬件约束/特殊性）解压缩为一个CPU可使用的数字。
63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
77 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
89 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
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/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Dcm-regbits-44xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2012 Texas Instruments, Inc.
6 * Copyright (C) 2009-2010 Nokia Corporation
10 * Benoit Cousson (b-cousson@ti.com)
14 * with the public linux-omap@vger.kernel.org mailing list and the
16 * up-to-date with the file contents.
24 #define OMAP4430_CLKSEL_SHIFT 24
26 #define OMAP4430_CLKSEL_MASK (1 << 24)
31 #define OMAP4430_CLKSEL_24_25_SHIFT 24
33 #define OMAP4430_CLKSEL_60M_SHIFT 24
[all …]
Dcm-regbits-54xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
9 * Benoit Cousson (b-cousson@ti.com)
13 * with the public linux-omap@vger.kernel.org mailing list and the
15 * up-to-date with the file contents.
23 #define OMAP54XX_CLKSEL_SHIFT 24
27 #define OMAP54XX_CLKSEL_AESS_FCLK_SHIFT 24
31 #define OMAP54XX_CLKSEL_FCLK_SHIFT 24
33 #define OMAP54XX_CLKSEL_GPU_CORE_GCLK_SHIFT 24
41 #define OMAP54XX_CLKSEL_SOURCE_SHIFT 24
[all …]
/kernel/linux/linux-5.10/arch/alpha/kernel/
Dentry.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Kernel entry-points.
8 #include <asm/asm-offsets.h>
32 .cfi_rel_offset $16, 24
39 .size \func, . - \func
43 * This defines the normal kernel pt-regs layout.
45 * regs 9-15 preserved by C code
46 * regs 16-18 saved by PAL-code
47 * regs 29-30 saved and set up by PAL-code
48 * JRP - Save regs 16-18 in a special area of the stack, so that
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/display/
Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
34 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
48 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
49 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
54 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
56 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
81 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
109 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
110 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
[all …]
/kernel/linux/linux-5.10/drivers/staging/netlogic/
Dxlr_net.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
3 * Copyright (c) 2003-2012 Broadcom Corporation
12 /* PE-MCXMAC register and bit field definitions */
37 #define O_IPG_IFG__ipgr1 24
46 #define O_HALF_DUPLEX__abebt 24
90 #define O_INTERFACE_CONTROL__phymod 24
95 #define O_INTERFACE_CONTROL__nocfr 9
99 #define O_INTERFACE_STATUS__xsdfr 9
109 /* A-XGMAC register and bit field definitions */
124 #define O_XGMAC_CONFIG_1__rfen 24
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Dcm-regbits-54xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
9 * Benoit Cousson (b-cousson@ti.com)
13 * with the public linux-omap@vger.kernel.org mailing list and the
15 * up-to-date with the file contents.
23 #define OMAP54XX_CLKSEL_SHIFT 24
27 #define OMAP54XX_CLKSEL_AESS_FCLK_SHIFT 24
31 #define OMAP54XX_CLKSEL_FCLK_SHIFT 24
33 #define OMAP54XX_CLKSEL_GPU_CORE_GCLK_SHIFT 24
41 #define OMAP54XX_CLKSEL_SOURCE_SHIFT 24
[all …]
/kernel/linux/linux-5.10/arch/arm/probes/kprobes/
Dtest-arm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/kernel/kprobes-test-arm.c
14 #include "test-core.h"
55 TEST_GROUP("Data-processing (register), (register-shifted register), (immediate)") in kprobe_arm_test_cases()
69 TEST_RRR( op "hi" s " r8, r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")\ in kprobe_arm_test_cases()
70 TEST_RRR( op "ls" s " r9, r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")\ in kprobe_arm_test_cases()
96 TEST_RRR( op "ls r",9, VAL1,", r",14,val, ", lsl r",0, 3,"") \ in kprobe_arm_test_cases()
97 TEST_RRR( op "hi r",9, VAL1,", r",14,val, ", lsr r",7, 4,"") \ in kprobe_arm_test_cases()
117 TEST_RR( op "hi" s " r9, r",9, val, ", lsr r",7, 4,"") \ in kprobe_arm_test_cases()
118 TEST_RR( op "ls" s " r10, r",9, val, ", asr r",7, 5,"") \ in kprobe_arm_test_cases()
[all …]
Dtest-thumb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/probes/kprobes/test-thumb.c
13 #include "test-core.h"
89 TEST_GROUP("16-bit Thumb data-processing instructions") in kprobe_thumb16_test_cases()
118 TEST_R( "add sp" ", r",8,-8, "") in kprobe_thumb16_test_cases()
120 TEST_BF_R("add pc" ", r",0,2f-1f-8,"") in kprobe_thumb16_test_cases()
125 TEST_R( "cmp sp" ", r",8,-8, "") in kprobe_thumb16_test_cases()
130 TEST_P( "mov sp, r",8,-8, "") in kprobe_thumb16_test_cases()
164 TEST_GROUP("16-bit Thumb Load/store instructions") in kprobe_thumb16_test_cases()
166 TEST_RPR("str r",0, VAL1,", [r",1, 24,", r",2, 48,"]") in kprobe_thumb16_test_cases()
[all …]
/kernel/linux/linux-6.6/arch/arm/probes/kprobes/
Dtest-arm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/kernel/kprobes-test-arm.c
14 #include "test-core.h"
55 TEST_GROUP("Data-processing (register), (register-shifted register), (immediate)") in kprobe_arm_test_cases()
69 TEST_RRR( op s "hi r8, r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")\ in kprobe_arm_test_cases()
70 TEST_RRR( op s "ls r9, r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")\ in kprobe_arm_test_cases()
96 TEST_RRR( op "ls r",9, VAL1,", r",14,val, ", lsl r",0, 3,"") \ in kprobe_arm_test_cases()
97 TEST_RRR( op "hi r",9, VAL1,", r",14,val, ", lsr r",7, 4,"") \ in kprobe_arm_test_cases()
117 TEST_RR( op s "hi r9, r",9, val, ", lsr r",7, 4,"") \ in kprobe_arm_test_cases()
118 TEST_RR( op s "ls r10, r",9, val, ", asr r",7, 5,"") \ in kprobe_arm_test_cases()
[all …]
Dtest-thumb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/probes/kprobes/test-thumb.c
13 #include "test-core.h"
89 TEST_GROUP("16-bit Thumb data-processing instructions") in kprobe_thumb16_test_cases()
118 TEST_R( "add sp" ", r",8,-8, "") in kprobe_thumb16_test_cases()
120 TEST_BF_R("add pc" ", r",0,2f-1f-8,"") in kprobe_thumb16_test_cases()
125 TEST_R( "cmp sp" ", r",8,-8, "") in kprobe_thumb16_test_cases()
130 TEST_P( "mov sp, r",8,-8, "") in kprobe_thumb16_test_cases()
164 TEST_GROUP("16-bit Thumb Load/store instructions") in kprobe_thumb16_test_cases()
166 TEST_RPR("str r",0, VAL1,", [r",1, 24,", r",2, 48,"]") in kprobe_thumb16_test_cases()
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/
Dmt76_connac2_mac.h1 /* SPDX-License-Identifier: ISC */
35 #define MT_TX_FREE_MSDU_CNT GENMASK(9, 0)
46 #define MT_TXD0_PKT_FMT GENMASK(24, 23)
52 #define MT_TXD1_OWN_MAC GENMASK(29, 24)
60 #define MT_TXD1_WLAN_IDX GENMASK(9, 0)
64 #define MT_TXD2_POWER_OFFSET GENMASK(29, 24)
71 #define MT_TXD2_RTS BIT(9)
98 #define MT_TXD5_TX_STATUS_MCU BIT(9)
123 #define MT_TXD7_TX_TIME GENMASK(9, 0)
130 #define MT_TX_RATE_MODE GENMASK(9, 6)
[all …]
Dmt76_connac3_mac.h1 /* SPDX-License-Identifier: ISC */
32 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
47 #define MT_RXD1_NORMAL_CLM BIT(24)
64 #define MT_RXD2_NORMAL_MAX_LEN_ERROR BIT(24)
82 #define MT_RXD3_NORMAL_FCS_ERR BIT(24)
91 #define MT_RXV_HDR_BAND_IDX BIT(24)
101 /* P-RXV */
109 #define MT_PRXV_RCPI3 GENMASK(31, 24)
114 #define MT_PRXV_HT_STBC GENMASK(10, 9)
119 /* C-RXV */
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-davinci/
Dda830.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
14 #include <linux/irqchip/irq-davinci-cp-intc.h>
16 #include <clocksource/timer-davinci.h>
55 MUX_CFG(DA830, NEMB_RAS, 0, 24, 0xf, 1, false)
63 MUX_CFG(DA830, EMB_A_4, 1, 24, 0xf, 1, false)
71 MUX_CFG(DA830, GPIO7_6, 1, 24, 0xf, 8, false)
79 MUX_CFG(DA830, EMB_A_12, 2, 24, 0xf, 1, false)
87 MUX_CFG(DA830, GPIO3_13, 2, 24, 0xf, 8, false)
94 MUX_CFG(DA830, EMB_D_24, 3, 24, 0xf, 1, false)
[all …]
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8186/
Dmt8186-reg.h1 /* SPDX-License-Identifier: GPL-2.0
3 * mt8186-reg.h -- Mediatek 8186 audio driver reg definition
39 #define PDN_ADC_SFT 24
40 #define PDN_ADC_MASK_SFT BIT(24)
53 #define PDN_24M_SFT 9
54 #define PDN_24M_MASK_SFT BIT(9)
141 #define DL6_ON_SFT 9
142 #define DL6_ON_MASK_SFT BIT(9)
215 #define I2S3_UPDATE_WORD_SFT 24
216 #define I2S3_UPDATE_WORD_MASK_SFT GENMASK(28, 24)
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