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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Dxlnx,versal-net-cdx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/xlnx,versal-net-cdx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 on run-time.
20 are used to configure SMMU and GIC-ITS respectively.
22 iommu-map property is used to define the set of stream ids
26 The msi-map property is used to associate the devices with the
34 - Nipun Gupta <nipun.gupta@amd.com>
35 - Nikhil Agarwal <nikhil.agarwal@amd.com>
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/mediatek/
Dpinctrl-mt2701.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/pinctrl/mt65xx.h>
15 #include "pinctrl-mtk-common.h"
16 #include "pinctrl-mtk-mt2701.h"
20 * - For special pins' mode setting
201 MTK_PIN_DRV_GRP(250, 0xfc0, 0, 2),
210 MTK_PIN_DRV_GRP(259, 0xc90, 0, 2),
260 MTK_PIN_PUPD_SPEC_SR(250, 0x130, 12, 13, 14), /* ms0e dat7 */
269 MTK_PIN_PUPD_SPEC_SR(259, 0xc90, 8, 9, 10), /* ms0e clk */
342 MTK_PIN_IES_SMT_SPEC(259, 259, 0xc90, 4),
[all …]
Dpinctrl-mt7623.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015 - 2018 MediaTek Inc.
11 #include "pinctrl-moore.h"
112 PIN_FIELD16(259, 259, 0xc90, 0x10, 4, 1),
191 PIN_FIELD16(250, 250, 0x130, 0x10, 15, 1),
200 PIN_FIELD16(259, 259, 0xc90, 0x10, 11, 1),
263 PIN_FIELD16(259, 259, 0xc90, 0x10, 0, 4),
303 PIN_FIELD16(250, 250, 0x130, 0x10, 12, 1),
312 PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1),
345 PIN_FIELD16(250, 250, 0x130, 0x10, 13, 1),
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/
Dpinctrl-mt2701.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/pinctrl/mt65xx.h>
14 #include "pinctrl-mtk-common.h"
15 #include "pinctrl-mtk-mt2701.h"
19 * - For special pins' mode setting
200 MTK_PIN_DRV_GRP(250, 0xfc0, 0, 2),
209 MTK_PIN_DRV_GRP(259, 0xc90, 0, 2),
259 MTK_PIN_PUPD_SPEC_SR(250, 0x130, 12, 13, 14), /* ms0e dat7 */
268 MTK_PIN_PUPD_SPEC_SR(259, 0xc90, 8, 9, 10), /* ms0e clk */
334 MTK_PIN_IES_SMT_SPEC(259, 259, 0xc90, 4),
[all …]
Dpinctrl-mt7623.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015 - 2018 MediaTek Inc.
11 #include "pinctrl-moore.h"
112 PIN_FIELD16(259, 259, 0xc90, 0x10, 4, 1),
191 PIN_FIELD16(250, 250, 0x130, 0x10, 15, 1),
200 PIN_FIELD16(259, 259, 0xc90, 0x10, 11, 1),
263 PIN_FIELD16(259, 259, 0xc90, 0x10, 0, 4),
303 PIN_FIELD16(250, 250, 0x130, 0x10, 12, 1),
312 PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1),
345 PIN_FIELD16(250, 250, 0x130, 0x10, 13, 1),
[all …]
/kernel/linux/linux-5.10/include/uapi/sound/sof/
Dtokens.h1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
26 #define SOF_TPLG_KCTL_SWITCH_ID 259
32 * Tokens - must match values in topology configurations
56 #define SOF_TKN_VOLUME_RAMP_STEP_TYPE 250
/kernel/linux/linux-6.6/arch/sparc/kernel/syscalls/
Dsyscall.tbl1 # SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
301 250 32 mremap sys_mremap
302 250 64 mremap sys_64_mremap
315 259 32 clock_nanosleep sys_clock_nanosleep_time32
316 259 64 clock_nanosleep sys_clock_nanosleep
/kernel/linux/linux-5.10/arch/sparc/kernel/syscalls/
Dsyscall.tbl1 # SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
301 250 32 mremap sys_mremap
302 250 64 mremap sys_64_mremap
315 259 32 clock_nanosleep sys_clock_nanosleep_time32
316 259 64 clock_nanosleep sys_clock_nanosleep
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/sound/sof/
Dtokens.h11 *** source file (e.g. under external/kernel-headers/original/) then
24 #define SOF_TPLG_KCTL_SWITCH_ID 259
39 #define SOF_TKN_VOLUME_RAMP_STEP_TYPE 250
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/sound/sof/
Dtokens.h11 *** source file (e.g. under external/kernel-headers/original/) then
24 #define SOF_TPLG_KCTL_SWITCH_ID 259
39 #define SOF_TKN_VOLUME_RAMP_STEP_TYPE 250
/kernel/linux/linux-5.10/drivers/pinctrl/intel/
Dpinctrl-tigerlake.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019 - 2020, Intel Corporation
16 #include "pinctrl-intel.h"
30 .size = ((e) - (s) + 1), \
43 .npins = ((e) - (s) + 1), \
54 /* Tiger Lake-LP */
318 PINCTRL_PIN(250, "SPI1_CLK_LOOPBK"),
328 PINCTRL_PIN(259, "DBG_PMODE"),
368 TGL_GPP(3, 226, 250, 320), /* GPP_E */
369 TGL_GPP(4, 251, 259, INTEL_GPIO_BASE_NOMAP), /* JTAG */
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/intel/
Dpinctrl-tigerlake.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019 - 2020, Intel Corporation
16 #include "pinctrl-intel.h"
34 .size = ((e) - (s) + 1), \
44 /* Tiger Lake-LP */
308 PINCTRL_PIN(250, "SPI1_CLK_LOOPBK"),
318 PINCTRL_PIN(259, "DBG_PMODE"),
358 TGL_GPP(3, 226, 250, 320), /* GPP_E */
359 TGL_GPP(4, 251, 259, INTEL_GPIO_BASE_NOMAP), /* JTAG */
370 TGL_LP_COMMUNITY(2, 171, 259, tgllp_community4_gpps),
[all …]
/kernel/linux/linux-6.6/include/uapi/sound/sof/
Dtokens.h1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
26 #define SOF_TPLG_KCTL_SWITCH_ID 259
32 * Tokens - must match values in topology configurations
60 #define SOF_TKN_VOLUME_RAMP_STEP_TYPE 250
/kernel/linux/linux-6.6/include/uapi/sound/
Dsnd_ar_tokens.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
32 /* container graph position Stream-Device */
222 #define AR_TKN_U32_MODULE_HW_IF_IDX 250
231 #define AR_TKN_U32_MODULE_LOG_CODE 259
/kernel/linux/linux-6.6/include/dt-bindings/clock/
Drk3399-cru.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Author: Xing Zheng <zhengxing@rock-chips.com>
198 #define ACLK_GIC 250
207 #define ACLK_ADB400M_PD_CORE_B 259
340 /* pmu-clocks indices */
383 /* soft-reset indices */
634 #define SRST_C_DP_CTRL 250
643 #define SRST_DPTX_SPDIF_REC 259
716 /* pmu soft-reset indices */
Dg12a-clkc.h1 /* SPDX-License-Identifier: GPL-2.0+ OR MIT */
3 * Meson-G12A clock tree IDs
261 #define CLKID_DSU_CLK_DYN 250
270 #define CLKID_SPICC1_SCLK_SEL 259
Dimx6sx-clock.h1 /* SPDX-License-Identifier: GPL-2.0-only */
259 #define IMX6SX_CLK_PLL1 250
268 #define IMX6SX_PLL3_BYPASS 259
Dqcom,gcc-ipq806x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
252 #define PCIE_1_AUX_CLK 250
261 #define PCIE_2_ALT_REF_SRC 259
Dimx6qdl-clock.h1 /* SPDX-License-Identifier: GPL-2.0-only */
260 #define IMX6QDL_CLK_PRE0 250
269 #define IMX6QDL_CLK_MLB_SEL 259
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Drk3399-cru.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Author: Xing Zheng <zhengxing@rock-chips.com>
198 #define ACLK_GIC 250
207 #define ACLK_ADB400M_PD_CORE_B 259
340 /* pmu-clocks indices */
383 /* soft-reset indices */
634 #define SRST_C_DP_CTRL 250
643 #define SRST_DPTX_SPDIF_REC 259
716 /* pmu soft-reset indices */
Dqcom,gcc-ipq806x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
252 #define PCIE_1_AUX_CLK 250
261 #define PCIE_2_ALT_REF_SRC 259
Dimx6sx-clock.h1 /* SPDX-License-Identifier: GPL-2.0-only */
259 #define IMX6SX_CLK_PLL1 250
268 #define IMX6SX_PLL3_BYPASS 259
Dimx6qdl-clock.h1 /* SPDX-License-Identifier: GPL-2.0-only */
260 #define IMX6QDL_CLK_PRE0 250
269 #define IMX6QDL_CLK_MLB_SEL 259
/kernel/linux/linux-5.10/include/dt-bindings/pinctrl/
Dmt6797-pinfunc.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <dt-bindings/pinctrl/mt65xx.h>
1279 #define MT6797_GPIO250__FUNC_GPIO250 (MTK_PIN_NO(250) | 0)
1280 #define MT6797_GPIO250__FUNC_SPI3_MI (MTK_PIN_NO(250) | 1)
1281 #define MT6797_GPIO250__FUNC_SPI3_MO (MTK_PIN_NO(250) | 2)
1282 #define MT6797_GPIO250__FUNC_IRTX_OUT (MTK_PIN_NO(250) | 3)
1283 #define MT6797_GPIO250__FUNC_TP_URXD1_AO (MTK_PIN_NO(250) | 6)
1284 #define MT6797_GPIO250__FUNC_DROP_ZONE (MTK_PIN_NO(250) | 7)
1345 #define MT6797_GPIO259__FUNC_GPIO259 (MTK_PIN_NO(259) | 0)
1346 #define MT6797_GPIO259__FUNC_IO_JTAG_TDI (MTK_PIN_NO(259) | 1)
[all …]
/kernel/linux/linux-6.6/include/dt-bindings/pinctrl/
Dmt6797-pinfunc.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <dt-bindings/pinctrl/mt65xx.h>
1279 #define MT6797_GPIO250__FUNC_GPIO250 (MTK_PIN_NO(250) | 0)
1280 #define MT6797_GPIO250__FUNC_SPI3_MI (MTK_PIN_NO(250) | 1)
1281 #define MT6797_GPIO250__FUNC_SPI3_MO (MTK_PIN_NO(250) | 2)
1282 #define MT6797_GPIO250__FUNC_IRTX_OUT (MTK_PIN_NO(250) | 3)
1283 #define MT6797_GPIO250__FUNC_TP_URXD1_AO (MTK_PIN_NO(250) | 6)
1284 #define MT6797_GPIO250__FUNC_DROP_ZONE (MTK_PIN_NO(250) | 7)
1345 #define MT6797_GPIO259__FUNC_GPIO259 (MTK_PIN_NO(259) | 0)
1346 #define MT6797_GPIO259__FUNC_IO_JTAG_TDI (MTK_PIN_NO(259) | 1)
[all …]

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