| /kernel/linux/linux-6.6/Documentation/arch/xtensa/ |
| D | mmu.rst | 62 5. The parent-bus-address value is rounded down to the nearest 256MB boundary 64 6. The IO area covers the entire 256MB segment of parent-bus-address; the 83 | VMALLOC area | VMALLOC_START 0xc0000000 128MB - 64KB 96 | | (4MB * DCACHE_N_COLORS) 104 | Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xd0000000 128MB 106 | Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xd8000000 128MB 108 | Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB 110 | Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB 114 256MB cached + 256MB uncached layout:: 126 | VMALLOC area | VMALLOC_START 0xa0000000 128MB - 64KB [all …]
|
| /kernel/linux/linux-5.10/Documentation/xtensa/ |
| D | mmu.rst | 62 5. The parent-bus-address value is rounded down to the nearest 256MB boundary 64 6. The IO area covers the entire 256MB segment of parent-bus-address; the 83 | VMALLOC area | VMALLOC_START 0xc0000000 128MB - 64KB 96 | | (4MB * DCACHE_N_COLORS) 104 | Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xd0000000 128MB 106 | Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xd8000000 128MB 108 | Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB 110 | Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB 114 256MB cached + 256MB uncached layout:: 126 | VMALLOC area | VMALLOC_START 0xa0000000 128MB - 64KB [all …]
|
| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi2/ |
| D | gaudi2.h | 16 #define CFG_BAR_SIZE 0x10000000ull /* 256MB */ 21 #define CFG_SIZE 0x8000000ull /* 96MB CFG + 32MB DBG*/ 22 #define CFG_REGION_SIZE 0xC000000ull /* 192MB */ 24 #define STM_FLASH_BASE_ADDR 0x1000007FF4000000ull /* Not 256MB aligned */ 25 #define STM_FLASH_ALIGNED_OFF 0x4000000ull /* 256 MB alignment */ 26 #define STM_FLASH_SIZE 0x2000000ull /* 32MB */ 29 #define SPI_FLASH_SIZE 0x1000000ull /* 16MB */ 38 #define BAR0_RSRVD_SIZE 0x1000000ull /* 16MB */ 41 #define SRAM_SIZE 0x3000000ull /* 48MB */ 66 #define RESERVED_MSIX_UNEXPECTED_USER_ERROR_INTERRUPT 256 [all …]
|
| /kernel/linux/linux-5.10/fs/btrfs/tests/ |
| D | free-space-tests.c | 421 * 256 extents on a x86_64 system at least, and a few other in test_steal_space_from_bitmap_to_extent() 431 * Extent entry covering free space range [128Mb - 256Kb, 128Mb - 128Kb[ in test_steal_space_from_bitmap_to_extent() 439 /* Bitmap entry covering free space range [128Mb + 512Kb, 256Mb[ */ in test_steal_space_from_bitmap_to_extent() 452 * Now make only the first 256Kb of the bitmap marked as free, so that in test_steal_space_from_bitmap_to_extent() 455 * [128Mb - 256Kb, 128Mb - 128Kb[ in test_steal_space_from_bitmap_to_extent() 456 * [128Mb + 512Kb, 128Mb + 768Kb[ in test_steal_space_from_bitmap_to_extent() 477 * Confirm that the bitmap range [128Mb + 768Kb, 256Mb[ isn't marked in test_steal_space_from_bitmap_to_extent() 487 * Confirm that the region [128Mb + 256Kb, 128Mb + 512Kb[, which is in test_steal_space_from_bitmap_to_extent() 496 * Confirm that the region [128Mb, 128Mb + 256Kb[, which is covered in test_steal_space_from_bitmap_to_extent() 505 * Now lets mark the region [128Mb, 128Mb + 512Kb[ as free too. But, in test_steal_space_from_bitmap_to_extent() [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 11 second the configuration area register space, 16MB 18 each be exactly 256MB (0x10000000) in size. 22 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 23 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked 46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */ 48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */ 50 0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 11 second the configuration area register space, 16MB 18 each be exactly 256MB (0x10000000) in size. 22 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 23 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked 46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */ 48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */ 50 0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */
|
| /kernel/linux/linux-6.6/fs/btrfs/tests/ |
| D | free-space-tests.c | 420 * 256 extents on a x86_64 system at least, and a few other in test_steal_space_from_bitmap_to_extent() 430 * Extent entry covering free space range [128Mb - 256Kb, 128Mb - 128Kb[ in test_steal_space_from_bitmap_to_extent() 438 /* Bitmap entry covering free space range [128Mb + 512Kb, 256Mb[ */ in test_steal_space_from_bitmap_to_extent() 451 * Now make only the first 256Kb of the bitmap marked as free, so that in test_steal_space_from_bitmap_to_extent() 454 * [128Mb - 256Kb, 128Mb - 128Kb[ in test_steal_space_from_bitmap_to_extent() 455 * [128Mb + 512Kb, 128Mb + 768Kb[ in test_steal_space_from_bitmap_to_extent() 476 * Confirm that the bitmap range [128Mb + 768Kb, 256Mb[ isn't marked in test_steal_space_from_bitmap_to_extent() 486 * Confirm that the region [128Mb + 256Kb, 128Mb + 512Kb[, which is in test_steal_space_from_bitmap_to_extent() 495 * Confirm that the region [128Mb, 128Mb + 256Kb[, which is covered in test_steal_space_from_bitmap_to_extent() 504 * Now lets mark the region [128Mb, 128Mb + 512Kb[ as free too. But, in test_steal_space_from_bitmap_to_extent() [all …]
|
| /kernel/linux/linux-5.10/Documentation/powerpc/ |
| D | pci_iov_resource_on_powernv.rst | 48 P8 supports up to 256 Partitionable Endpoints per PHB. 95 * It is divided into 256 segments of equal size. A table in the chip 98 the segment granularity is 2GB/256 = 8MB. 112 * Must be at least 256MB in size. 120 has 256 segments; however, there is no table for mapping a segment 180 1MB VF BAR0, the address in that VF BAR sets the base of an 8MB region. 181 This region is divided into eight contiguous 1MB regions, each of which 183 describes an 8MB region, the alignment requirement is for a single VF, 184 i.e., 1MB in this example. 188 - M32 window: There's one M32 window, and it is split into 256 [all …]
|
| /kernel/linux/linux-6.6/Documentation/powerpc/ |
| D | pci_iov_resource_on_powernv.rst | 48 P8 supports up to 256 Partitionable Endpoints per PHB. 95 * It is divided into 256 segments of equal size. A table in the chip 98 the segment granularity is 2GB/256 = 8MB. 112 * Must be at least 256MB in size. 120 has 256 segments; however, there is no table for mapping a segment 180 1MB VF BAR0, the address in that VF BAR sets the base of an 8MB region. 181 This region is divided into eight contiguous 1MB regions, each of which 183 describes an 8MB region, the alignment requirement is for a single VF, 184 i.e., 1MB in this example. 188 - M32 window: There's one M32 window, and it is split into 256 [all …]
|
| /kernel/linux/linux-6.6/tools/testing/selftests/tc-testing/tc-tests/qdiscs/ |
| D | fq_codel.json | 18 …]+ limit 10240p flows 1024 quantum.*target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64", 41 …9]+ limit 1000p flows 1024 quantum.*target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64", 87 …]+ limit 10240p flows 1024 quantum.*target 2ms interval 100ms memory_limit 32Mb ecn drop_batch 64", 110 …-9]+ limit 10240p flows 1024 quantum.*target 5ms interval 5ms memory_limit 32Mb ecn drop_batch 64", 133 …imit 10240p flows 1024 quantum 9000 target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64", 156 …[0-9]+ limit 10240p flows 1024 quantum.*target 5ms interval 100ms memory_limit 32Mb drop_batch 64", 179 …ws 1024 quantum.*target 5ms ce_threshold 1.02s interval 100ms memory_limit 32Mb ecn drop_batch 64", 202 …+ limit 10240p flows 1024 quantum.*target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 100", 222 …"cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root fq_codel limit 1000 flows 256 drop_batch … 225 …q_codel 1: root refcnt [0-9]+ limit 1000p flows 256 quantum.*target 5ms interval 100ms memory_limi… [all …]
|
| /kernel/linux/linux-5.10/arch/x86/pci/ |
| D | ce4100.c | 44 #define MB (1024 * 1024) macro 104 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) 105 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) 113 DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write) 116 DEFINE_REG(9, 0, 0x10 , (1*MB), reg_init, reg_read, reg_write) 118 DEFINE_REG(10, 0, 0x10, (256), reg_init, reg_read, reg_write) 119 DEFINE_REG(10, 0, 0x14, (256*MB), reg_init, reg_read, reg_write) 120 DEFINE_REG(11, 0, 0x10, (256), reg_init, reg_read, reg_write) 121 DEFINE_REG(11, 0, 0x14, (256), reg_init, reg_read, reg_write) 122 DEFINE_REG(11, 1, 0x10, (256), reg_init, reg_read, reg_write) [all …]
|
| /kernel/linux/linux-6.6/arch/x86/pci/ |
| D | ce4100.c | 44 #define MB (1024 * 1024) macro 104 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) 105 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) 113 DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write) 116 DEFINE_REG(9, 0, 0x10 , (1*MB), reg_init, reg_read, reg_write) 118 DEFINE_REG(10, 0, 0x10, (256), reg_init, reg_read, reg_write) 119 DEFINE_REG(10, 0, 0x14, (256*MB), reg_init, reg_read, reg_write) 120 DEFINE_REG(11, 0, 0x10, (256), reg_init, reg_read, reg_write) 121 DEFINE_REG(11, 0, 0x14, (256), reg_init, reg_read, reg_write) 122 DEFINE_REG(11, 1, 0x10, (256), reg_init, reg_read, reg_write) [all …]
|
| /kernel/linux/linux-6.6/arch/arc/plat-axs10x/ |
| D | axs10x.c | 44 * | snps,dw-apb-intc (MB)| in axs10x_enable_gpio_intc_wire() 55 * DT hardware topology - connect MB intc directly to cpu intc in axs10x_enable_gpio_intc_wire() 94 char mb[32]; in axs10x_early_init() local 104 scnprintf(mb, 32, "MainBoard v%d", mb_rev); in axs10x_early_init() 105 axs10x_print_board_ver(CREG_MB_VER, mb); in axs10x_early_init() 121 * Each AXI master has a 4GB memory map specified as 16 apertures of 256MB, each 122 * of which maps to a corresponding 256MB aperture in Target slave memory map. 127 * Access from cpu to MB controllers such as GMAC is setup using AXI Tunnel: 131 * MB AXI Tunnel Master, which also has a mem map setup 133 * In the reverse direction, MB AXI Masters (e.g. GMAC) mem map is setup [all …]
|
| /kernel/linux/linux-5.10/arch/arc/plat-axs10x/ |
| D | axs10x.c | 45 * | snps,dw-apb-intc (MB)| in axs10x_enable_gpio_intc_wire() 56 * DT hardware topology - connect MB intc directly to cpu intc in axs10x_enable_gpio_intc_wire() 95 char mb[32]; in axs10x_early_init() local 105 scnprintf(mb, 32, "MainBoard v%d", mb_rev); in axs10x_early_init() 106 axs10x_print_board_ver(CREG_MB_VER, mb); in axs10x_early_init() 122 * Each AXI master has a 4GB memory map specified as 16 apertures of 256MB, each 123 * of which maps to a corresponding 256MB aperture in Target slave memory map. 128 * Access from cpu to MB controllers such as GMAC is setup using AXI Tunnel: 132 * MB AXI Tunnel Master, which also has a mem map setup 134 * In the reverse direction, MB AXI Masters (e.g. GMAC) mem map is setup [all …]
|
| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/ |
| D | p1021rdb-pc.dtsi | 46 /* 256KB for Vitesse 7385 Switch firmware */ 53 /* 256KB for DTB Image */ 59 /* 3.5 MB for Linux Kernel Image */ 65 /* 10.75MB for JFFS2 based Root file System */ 72 /* 256KB for QE ucode firmware*/ 96 /* 1MB for u-boot Bootloader Image */ 103 /* 1MB for DTB Image */ 109 /* 4MB for Linux Kernel Image */ 115 /* 4MB for Compressed Root file System Image */ 121 /* 7MB for JFFS2 based Root file System */ [all …]
|
| D | p1024rdb.dtsi | 46 /* 256KB for Vitesse 7385 Switch firmware */ 53 /* 256KB for DTB Image */ 59 /* 3.5 MB for Linux Kernel Image */ 65 /* 11MB for JFFS2 based Root file System */ 89 /* 1MB for u-boot Bootloader Image */ 96 /* 1MB for DTB Image */ 102 /* 4MB for Linux Kernel Image */ 108 /* 4MB for Compressed Root file System Image */ 114 /* 15MB for JFFS2 based Root file System */ 120 /* 7MB for User Writable Area */ [all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | p1021rdb-pc.dtsi | 46 /* 256KB for Vitesse 7385 Switch firmware */ 53 /* 256KB for DTB Image */ 59 /* 3.5 MB for Linux Kernel Image */ 65 /* 10.75MB for JFFS2 based Root file System */ 72 /* 256KB for QE ucode firmware*/ 96 /* 1MB for u-boot Bootloader Image */ 103 /* 1MB for DTB Image */ 109 /* 4MB for Linux Kernel Image */ 115 /* 4MB for Compressed Root file System Image */ 121 /* 7MB for JFFS2 based Root file System */ [all …]
|
| D | p1024rdb.dtsi | 46 /* 256KB for Vitesse 7385 Switch firmware */ 53 /* 256KB for DTB Image */ 59 /* 3.5 MB for Linux Kernel Image */ 65 /* 11MB for JFFS2 based Root file System */ 89 /* 1MB for u-boot Bootloader Image */ 96 /* 1MB for DTB Image */ 102 /* 4MB for Linux Kernel Image */ 108 /* 4MB for Compressed Root file System Image */ 114 /* 15MB for JFFS2 based Root file System */ 120 /* 7MB for User Writable Area */ [all …]
|
| /kernel/linux/linux-5.10/arch/xtensa/ |
| D | Kconfig | 517 specifies cache attributes for the corresponding 512MB memory 641 bool "MMUv2: 128MB cached + 128MB uncached" 643 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting 646 KSEG_PADDR must be aligned to 128MB. 649 bool "256MB cached + 256MB uncached" 652 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000 654 KSEG_PADDR must be aligned to 256MB. 657 bool "512MB cached + 512MB uncached" 660 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000 662 KSEG_PADDR must be aligned to 256MB. [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | armada-xp-linksys-mamba.dts | 36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */ 335 reg = <0x0000000 0x100000>; /* 1MB */ 341 reg = <0x100000 0x40000>; /* 256KB */ 346 reg = <0x140000 0x40000>; /* 256KB */ 351 reg = <0x900000 0x100000>; /* 1MB */ 358 reg = <0xa00000 0x2800000>; /* 40MB */ 363 reg = <0xd00000 0x2500000>; /* 37MB */ 369 reg = <0x3200000 0x2800000>; /* 40MB */ 374 reg = <0x3500000 0x2500000>; /* 37MB */ 378 * 38MB, last MB is for the BBT, not writable [all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | armada-xp-linksys-mamba.dts | 36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */ 337 reg = <0x0000000 0x100000>; /* 1MB */ 343 reg = <0x100000 0x40000>; /* 256KB */ 348 reg = <0x140000 0x40000>; /* 256KB */ 353 reg = <0x900000 0x100000>; /* 1MB */ 360 reg = <0xa00000 0x2800000>; /* 40MB */ 365 reg = <0xd00000 0x2500000>; /* 37MB */ 371 reg = <0x3200000 0x2800000>; /* 40MB */ 376 reg = <0x3500000 0x2500000>; /* 37MB */ 380 * 38MB, last MB is for the BBT, not writable [all …]
|
| /kernel/linux/linux-5.10/arch/mips/bcm47xx/ |
| D | prom.c | 67 * want to reuse the memory used by CFE (around 4MB). That means cfe_* in prom_init_mem() 71 * BCM47XX uses 128MB for addressing the ram, if the system contains in prom_init_mem() 86 pr_debug("Assume 128MB RAM\n"); in prom_init_mem() 157 * 0x80000000 0xc0000000 (1st: 256MB) in bcm47xx_prom_highmem_init() 158 * 0x90000000 0xd0000000 (2nd: 256MB) in bcm47xx_prom_highmem_init() 161 ENTRYLO(0x80000000 + (256 << 20)), in bcm47xx_prom_highmem_init()
|
| /kernel/linux/linux-6.6/arch/mips/bcm47xx/ |
| D | prom.c | 67 * want to reuse the memory used by CFE (around 4MB). That means cfe_* in prom_init_mem() 71 * BCM47XX uses 128MB for addressing the ram, if the system contains in prom_init_mem() 86 pr_debug("Assume 128MB RAM\n"); in prom_init_mem() 153 * 0x80000000 0xc0000000 (1st: 256MB) in bcm47xx_prom_highmem_init() 154 * 0x90000000 0xd0000000 (2nd: 256MB) in bcm47xx_prom_highmem_init() 157 ENTRYLO(0x80000000 + (256 << 20)), in bcm47xx_prom_highmem_init()
|
| /kernel/linux/linux-6.6/arch/powerpc/include/asm/book3s/64/ |
| D | radix-64k.h | 8 #define RADIX_PTE_INDEX_SIZE 5 // size: 8B << 5 = 256B, maps 2^5 x 64K = 2MB 9 #define RADIX_PMD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 2MB = 1GB 14 * We use a 256 byte PTE page fragment in radix
|
| /kernel/linux/linux-5.10/arch/powerpc/include/asm/book3s/64/ |
| D | radix-64k.h | 8 #define RADIX_PTE_INDEX_SIZE 5 // size: 8B << 5 = 256B, maps 2^5 x 64K = 2MB 9 #define RADIX_PMD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 2MB = 1GB 14 * We use a 256 byte PTE page fragment in radix
|