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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c426 double RequiredDPPCLK[][2][DC__NUM_DPP__MAX],
427 double RequiredDISPCLK[][2],
429 unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX],
430 double ProjectedDCFCLKDeepSleep[][2],
431 double MaximumVStartup[][2][DC__NUM_DPP__MAX],
432 double TotalVActivePixelBandwidth[][2],
433 double TotalVActiveCursorBandwidth[][2],
434 double TotalMetaRowBandwidth[][2],
435 double TotalDPTERowBandwidth[][2],
436 unsigned int TotalNumberOfActiveDPP[][2],
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_mode_vba_util_32.c46 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dml32_dscceComputeDelay()
52 // N422/N420 operate at 2 pixels per clock in dml32_dscceComputeDelay()
57 pixelsPerClock = 2; in dml32_dscceComputeDelay()
59 pixelsPerClock = 2; in dml32_dscceComputeDelay()
86 wx = (w + 2) / 3; in dml32_dscceComputeDelay()
90 ax = (a + 2) / 3 + D + 6 + 1; in dml32_dscceComputeDelay()
98 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dml32_dscceComputeDelay()
120 Delay = Delay + 2; in dml32_dscComputeDelay()
126 Delay = Delay + 2; in dml32_dscComputeDelay()
132 Delay = Delay + 2; in dml32_dscComputeDelay()
[all …]
/kernel/linux/linux-6.6/drivers/ata/pata_parport/
Dfrpw.c30 static int cont_map[2] = { 0x08, 0x10 };
59 int h, l, k, ph; in frpw_read_block_int() local
64 for (k = 0; k < count; k++) { in frpw_read_block_int()
67 buf[k] = j44(l, h); in frpw_read_block_int()
73 ph = 2; in frpw_read_block_int()
76 for (k = 0; k < count; k++) { in frpw_read_block_int()
78 buf[k] = r0(); in frpw_read_block_int()
79 ph = 2 - ph; in frpw_read_block_int()
84 case 2: in frpw_read_block_int()
86 for (k = 0; k < count; k++) in frpw_read_block_int()
[all …]
Dfriq.c44 static int cont_map[2] = { 0x08, 0x10 };
71 int h, l, k, ph; in friq_read_block_int() local
76 for (k = 0; k < count; k++) { in friq_read_block_int()
79 buf[k] = j44(l, h); in friq_read_block_int()
84 ph = 2; in friq_read_block_int()
87 for (k = 0; k < count; k++) { in friq_read_block_int()
89 buf[k] = r0(); in friq_read_block_int()
90 ph = 2 - ph; in friq_read_block_int()
94 case 2: in friq_read_block_int()
96 for (k = 0; k < count - 2; k++) in friq_read_block_int()
[all …]
Depia.c23 * 1 5/3 reads on ports 1 & 2, 8-bit writes
24 * 2 8-bit reads and writes
37 static int cont_map[2] = { 0, 0x80 };
57 case 2: in epia_read_regr()
81 case 2: in epia_write_regr()
129 int k, ph, a, b; in epia_read_block() local
135 for (k = 0; k < count; k++) { in epia_read_block()
136 w2(2+ph); a = r1(); in epia_read_block()
138 buf[k] = j44(a, b); in epia_read_block()
147 for (k = 0; k < count; k++) { in epia_read_block()
[all …]
Dkbic.c33 static int cont_map[2] = { 0x80, 0x40 };
50 case 2: in kbic_read_regr()
72 case 2: in kbic_write_regr()
128 int k, a, b; in kbic_read_block() local
133 for (k = 0; k < count / 2; k++) { in kbic_read_block()
138 buf[2 * k] = j44(a, b); in kbic_read_block()
143 buf[2 * k + 1] = j44(a, b); in kbic_read_block()
149 for (k = 0; k < count / 4; k++) { in kbic_read_block()
153 buf[4 * k] = j53(r12w()); in kbic_read_block()
155 buf[4 * k + 1] = j53(r12w()); in kbic_read_block()
[all …]
Depat.c33 * cont = 2 internal EPAT registers
44 case 2: in epat_write_regr()
71 case 2: in epat_read_regr()
87 int k, ph, a, b; in epat_read_block() local
94 for (k = 0; k < count; k++) { in epat_read_block()
95 if (k == count-1) in epat_read_block()
103 buf[k] = j44(a, b); in epat_read_block()
112 for (k = 0; k < count; k++) { in epat_read_block()
113 if (k == count - 1) in epat_read_block()
117 buf[k] = j53(a, b); in epat_read_block()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c419 unsigned int CursorWidth[][2],
420 unsigned int CursorBPP[][2],
680 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
686 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
691 pixelsPerClock = 2; in dscceComputeDelay()
696 pixelsPerClock = 2; in dscceComputeDelay()
722 wx = (w + 2) / 3; in dscceComputeDelay()
726 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
734 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
745 Delay = Delay + 2; in dscComputeDelay()
[all …]
/kernel/linux/linux-5.10/drivers/block/paride/
Dfrpw.c45 static int cont_map[2] = { 0x08, 0x10 };
76 { int h, l, k, ph; in frpw_read_block_int() local
81 for (k=0;k<count;k++) { in frpw_read_block_int()
84 buf[k] = j44(l,h); in frpw_read_block_int()
89 case 1: ph = 2; in frpw_read_block_int()
92 for (k=0;k<count;k++) { in frpw_read_block_int()
94 buf[k] = r0(); in frpw_read_block_int()
95 ph = 2 - ph; in frpw_read_block_int()
100 case 2: w2(4); w0(regr + 0x80); cec4; in frpw_read_block_int()
101 for (k=0;k<count;k++) buf[k] = r4(); in frpw_read_block_int()
[all …]
Dfriq.c49 static int cont_map[2] = { 0x08, 0x10 };
79 { int h, l, k, ph; in friq_read_block_int() local
84 for (k=0;k<count;k++) { in friq_read_block_int()
87 buf[k] = j44(l,h); in friq_read_block_int()
92 case 1: ph = 2; in friq_read_block_int()
95 for (k=0;k<count;k++) { in friq_read_block_int()
97 buf[k] = r0(); in friq_read_block_int()
98 ph = 2 - ph; in friq_read_block_int()
103 case 2: CMD(regr+0x80); in friq_read_block_int()
104 for (k=0;k<count-2;k++) buf[k] = r4(); in friq_read_block_int()
[all …]
Depia.c33 1 5/3 reads on ports 1 & 2, 8-bit writes
34 2 8-bit reads and writes
47 static int cont_map[2] = { 0, 0x80 };
68 case 2: r = regr^0x29; in epia_read_regr()
92 case 2: r = regr^0x19; in epia_write_regr()
138 { int k, ph, a, b; in epia_read_block() local
144 for (k=0;k<count;k++) { in epia_read_block()
145 w2(2+ph); a = r1(); in epia_read_block()
147 buf[k] = j44(a,b); in epia_read_block()
156 for (k=0;k<count;k++) { in epia_read_block()
[all …]
Dkbic.c43 static int cont_map[2] = { 0x80, 0x40 };
61 case 2: w0(regr|0x08|s); w2(4); w2(6); w2(4); w2(0xa5); w2(0xa1); in kbic_read_regr()
85 case 2: w0(regr|0x10|s); w2(4); w2(6); w2(4); in kbic_write_regr()
136 { int k, a, b; in kbic_read_block() local
141 for (k=0;k<count/2;k++) { in kbic_read_block()
144 buf[2*k] = j44(a,b); in kbic_read_block()
147 buf[2*k+1] = j44(a,b); in kbic_read_block()
153 for (k=0;k<count/4;k++) { in kbic_read_block()
156 w0(8); buf[4*k] = j53(r12w()); in kbic_read_block()
157 w0(0xb8); buf[4*k+1] = j53(r12w()); in kbic_read_block()
[all …]
Depat.c42 cont = 2 internal EPAT registers
57 case 2: w0(0x60+r); w2(1); w0(val); w2(4); in epat_write_regr()
84 case 2: w0(0x20+r); w2(1); w2(0x25); in epat_read_regr()
99 { int k, ph, a, b; in epat_read_block() local
105 for(k=0;k<count;k++) { in epat_read_block()
106 if (k == count-1) w0(0xfd); in epat_read_block()
110 buf[k] = j44(a,b); in epat_read_block()
118 for(k=0;k<count;k++) { in epat_read_block()
119 if (k == count-1) w0(0xfd); in epat_read_block()
122 buf[k] = j53(a,b); in epat_read_block()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20v2.c319 2)); in adjust_ReturnBW()
336 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
342 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
347 pixelsPerClock = 2; in dscceComputeDelay()
374 wx = (w + 2) / 3; in dscceComputeDelay()
378 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
386 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
397 Delay = Delay + 2; in dscComputeDelay()
403 Delay = Delay + 2; in dscComputeDelay()
409 Delay = Delay + 2; in dscComputeDelay()
[all …]
Ddisplay_mode_vba_20.c295 2)); in adjust_ReturnBW()
312 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
318 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
323 pixelsPerClock = 2; in dscceComputeDelay()
350 wx = (w + 2) / 3; in dscceComputeDelay()
354 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
362 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
373 Delay = Delay + 2; in dscComputeDelay()
379 Delay = Delay + 2; in dscComputeDelay()
385 Delay = Delay + 2; in dscComputeDelay()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20v2.c319 2)); in adjust_ReturnBW()
336 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
342 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
347 pixelsPerClock = 2; in dscceComputeDelay()
374 wx = (w + 2) / 3; in dscceComputeDelay()
378 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
386 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
397 Delay = Delay + 2; in dscComputeDelay()
403 Delay = Delay + 2; in dscComputeDelay()
409 Delay = Delay + 2; in dscComputeDelay()
[all …]
Ddisplay_mode_vba_20.c295 2)); in adjust_ReturnBW()
312 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
318 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
323 pixelsPerClock = 2; in dscceComputeDelay()
350 wx = (w + 2) / 3; in dscceComputeDelay()
354 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
362 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
373 Delay = Delay + 2; in dscComputeDelay()
379 Delay = Delay + 2; in dscComputeDelay()
385 Delay = Delay + 2; in dscComputeDelay()
[all …]
/kernel/linux/linux-6.6/tools/lib/
Dlist_sort.c14 __attribute__((nonnull(2,3,4)))
50 __attribute__((nonnull(2,3,4,5)))
129 * 2:1 balanced merges. Given two pending sublists of size 2^k, they are
130 * merged to a size-2^(k+1) list as soon as we have 2^k following elements.
132 * Thus, it will avoid cache thrashing as long as 3*2^k elements can
141 * Each time we increment "count", we set one bit (bit k) and clear
142 * bits k-1 .. 0. Each time this happens (except the very first time
143 * for each bit, when count increments to 2^k), we merge two lists of
144 * size 2^k into one list of size 2^(k+1).
147 * 2^k, which is when we have 2^k elements pending in smaller lists,
[all …]
/kernel/linux/linux-6.6/lib/
Dlist_sort.c15 __attribute__((nonnull(2,3,4)))
51 __attribute__((nonnull(2,3,4,5)))
130 * 2:1 balanced merges. Given two pending sublists of size 2^k, they are
131 * merged to a size-2^(k+1) list as soon as we have 2^k following elements.
133 * Thus, it will avoid cache thrashing as long as 3*2^k elements can
142 * Each time we increment "count", we set one bit (bit k) and clear
143 * bits k-1 .. 0. Each time this happens (except the very first time
144 * for each bit, when count increments to 2^k), we merge two lists of
145 * size 2^k into one list of size 2^(k+1).
148 * 2^k, which is when we have 2^k elements pending in smaller lists,
[all …]
/kernel/linux/linux-5.10/lib/
Dlist_sort.c15 __attribute__((nonnull(2,3,4)))
51 __attribute__((nonnull(2,3,4,5)))
130 * 2:1 balanced merges. Given two pending sublists of size 2^k, they are
131 * merged to a size-2^(k+1) list as soon as we have 2^k following elements.
133 * Thus, it will avoid cache thrashing as long as 3*2^k elements can
142 * Each time we increment "count", we set one bit (bit k) and clear
143 * bits k-1 .. 0. Each time this happens (except the very first time
144 * for each bit, when count increments to 2^k), we merge two lists of
145 * size 2^k into one list of size 2^(k+1).
148 * 2^k, which is when we have 2^k elements pending in smaller lists,
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c507 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
513 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
518 pixelsPerClock = 2; in dscceComputeDelay()
545 wx = (w + 2) / 3; in dscceComputeDelay()
549 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
557 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
568 Delay = Delay + 2; in dscComputeDelay()
574 Delay = Delay + 2; in dscComputeDelay()
580 Delay = Delay + 2; in dscComputeDelay()
586 Delay = Delay + 2; in dscComputeDelay()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c507 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
513 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
518 pixelsPerClock = 2; in dscceComputeDelay()
545 wx = (w + 2) / 3; in dscceComputeDelay()
549 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
557 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
568 Delay = Delay + 2; in dscComputeDelay()
574 Delay = Delay + 2; in dscComputeDelay()
580 Delay = Delay + 2; in dscComputeDelay()
586 Delay = Delay + 2; in dscComputeDelay()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_mode_vba_314.c57 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
267 unsigned int k,
704 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
710 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
714 pixelsPerClock = 2; in dscceComputeDelay()
718 pixelsPerClock = 2; in dscceComputeDelay()
745 wx = (w + 2) / 3; in dscceComputeDelay()
749 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
757 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
768 Delay = Delay + 2; in dscComputeDelay()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_mode_vba_31.c56 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
255 unsigned int k,
683 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
689 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
693 pixelsPerClock = 2; in dscceComputeDelay()
697 pixelsPerClock = 2; in dscceComputeDelay()
724 wx = (w + 2) / 3; in dscceComputeDelay()
728 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
736 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
747 Delay = Delay + 2; in dscComputeDelay()
[all …]
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
Dkeyboard.h10 #define KG_CTRL 2
27 #define KT_SPEC 2
39 #define K(t,v) (((t)<<8)|(v)) macro
42 #define K_F1 K(KT_FN,0)
43 #define K_F2 K(KT_FN,1)
44 #define K_F3 K(KT_FN,2)
45 #define K_F4 K(KT_FN,3)
46 #define K_F5 K(KT_FN,4)
47 #define K_F6 K(KT_FN,5)
48 #define K_F7 K(KT_FN,6)
[all …]

12345678910>>...51