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/kernel/linux/linux-5.10/fs/exfat/
Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
/kernel/linux/linux-6.6/arch/powerpc/lib/
Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
21 or 3,3,3
28 or 3,3,3
33 or 3,3,3
38 or 3,3,3
45 or 3,3,3
53 or 3,3,3
[all …]
/kernel/linux/linux-5.10/arch/powerpc/lib/
Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
21 or 3,3,3
28 or 3,3,3
33 or 3,3,3
38 or 3,3,3
45 or 3,3,3
53 or 3,3,3
[all …]
/kernel/linux/linux-6.6/fs/exfat/
Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
46 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
48 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
50 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
52 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
54 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
56 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
58 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
60 { 6, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
61 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
[all …]
/kernel/linux/linux-5.10/arch/m68k/lib/
Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
45 __asm__("movel %2,%3\n\t" in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
54 "clrl %3\n\t" in csum_partial()
55 "addxl %3,%0\n" /* add X bit */ in csum_partial()
58 "movel %1,%3\n\t" /* save len in tmp1 */ in csum_partial()
[all …]
/kernel/linux/linux-6.6/arch/m68k/lib/
Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
45 __asm__("movel %2,%3\n\t" in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
54 "clrl %3\n\t" in csum_partial()
55 "addxl %3,%0\n" /* add X bit */ in csum_partial()
58 "movel %1,%3\n\t" /* save len in tmp1 */ in csum_partial()
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/icelake/
Dpipeline.json4 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
10 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event"
14 "CollectPEBSRecord": "3",
45 …-on-Store blocking code preventing store forwarding. This includes cases when: a. preceding store …
47 "Counter": "0,1,2,3",
49 "PEBScounters": "0,1,2,3",
58 "Counter": "0,1,2,3",
60 "PEBScounters": "0,1,2,3",
69 "Counter": "0,1,2,3",
71 "PEBScounters": "0,1,2,3",
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/sandybridge/
Dpipeline.json12 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
40 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
48 … See the table of not supported store forwards in the Intel\u00ae 64 and IA-32 Architectures Opti…
50 "Counter": "0,1,2,3",
54 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
55 "CounterHTOff": "0,1,2,3,4,5,6,7"
59 "Counter": "0,1,2,3",
64 "CounterHTOff": "0,1,2,3,4,5,6,7"
68 "Counter": "0,1,2,3",
[all …]
/kernel/linux/linux-6.6/arch/alpha/lib/
Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
[all …]
/kernel/linux/linux-5.10/arch/alpha/lib/
Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
[all …]
/kernel/linux/linux-6.6/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
36 #define Op2_shift 5
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/jaketown/
Dpipeline.json3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
22 "Counter": "Fixed counter 3",
27 "CounterHTOff": "Fixed counter 3"
31 "Counter": "0,1,2,3",
35 "BriefDescription": "Not taken macro-conditional branches.",
36 "CounterHTOff": "0,1,2,3,4,5,6,7"
40 "Counter": "0,1,2,3",
44 "BriefDescription": "Taken speculative and retired macro-conditional branches.",
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
49 "Counter": "0,1,2,3",
[all …]
/kernel/linux/linux-6.6/include/dt-bindings/pinctrl/
Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
13 #define IMX8DXL_COMP_CTL_GPIO_1V8_3V3_PCIESEP 3
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
170 … IMX8DXL_USB_SS3_TC2_LSIO_GPIO7_IO05 IMX8DXL_USB_SS3_TC2 5
174 … IMX8DXL_USB_SS3_TC3_LSIO_GPIO7_IO06 IMX8DXL_USB_SS3_TC3 5
[all …]
/kernel/linux/linux-5.10/include/dt-bindings/pinctrl/
Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
13 #define IMX8DXL_COMP_CTL_GPIO_1V8_3V3_PCIESEP 3
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
170 … IMX8DXL_USB_SS3_TC2_LSIO_GPIO7_IO05 IMX8DXL_USB_SS3_TC2 5
174 … IMX8DXL_USB_SS3_TC3_LSIO_GPIO7_IO06 IMX8DXL_USB_SS3_TC3 5
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-rpc/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0
56 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
57 4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
58 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
59 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
60 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3,
61 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3,
62 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
63 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
121 d->mask = mask; in iomd_set_base_mask()
[all …]
/kernel/linux/linux-5.10/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
17 3. Differentiating hardware versions
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
27 5.2.3 Two finger touch
28 6. Hardware version 3
38 7.2.3 Motion packet
39 8. Trackpoint (for Hardware version 3 and 4)
50 hardware versions unimaginatively called version 1,version 2, version 3
54 and width of the touch. Hardware version 3 uses 6 bytes per packet (and
[all …]
/kernel/linux/linux-6.6/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
17 3. Differentiating hardware versions
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
27 5.2.3 Two finger touch
28 6. Hardware version 3
38 7.2.3 Motion packet
39 8. Trackpoint (for Hardware version 3 and 4)
50 hardware versions unimaginatively called version 1,version 2, version 3
54 and width of the touch. Hardware version 3 uses 6 bytes per packet (and
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivytown/
Dpipeline.json39 "Counter": "0,1,2,3",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
49 "Counter": "0,1,2,3",
54 "CounterHTOff": "0,1,2,3,4,5,6,7"
59 "Counter": "0,1,2,3",
64 "CounterHTOff": "0,1,2,3,4,5,6,7"
68 "Counter": "0,1,2,3",
74 "CounterHTOff": "0,1,2,3,4,5,6,7"
78 "Counter": "0,1,2,3",
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivybridge/
Dpipeline.json39 "Counter": "0,1,2,3",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
49 "Counter": "0,1,2,3",
54 "CounterHTOff": "0,1,2,3,4,5,6,7"
59 "Counter": "0,1,2,3",
64 "CounterHTOff": "0,1,2,3,4,5,6,7"
68 "Counter": "0,1,2,3",
74 "CounterHTOff": "0,1,2,3,4,5,6,7"
78 "Counter": "0,1,2,3",
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellx/
Dpipeline.json7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
42 "Counter": "0,1,2,3",
44 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
46 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "Counter": "0,1,2,3",
55 "CounterHTOff": "0,1,2,3,4,5,6,7"
61 "Counter": "0,1,2,3",
65 "CounterHTOff": "0,1,2,3,4,5,6,7"
71 "Counter": "0,1,2,3",
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/haswellx/
Dpipeline.json8 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
43 "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
53 "Counter": "0,1,2,3",
57 "CounterHTOff": "0,1,2,3,4,5,6,7"
63 "Counter": "0,1,2,3",
67 "CounterHTOff": "0,1,2,3,4,5,6,7"
73 "Counter": "0,1,2,3",
78 "CounterHTOff": "0,1,2,3,4,5,6,7"
84 "Counter": "0,1,2,3",
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/haswell/
Dpipeline.json3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
42 "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "Counter": "0,1,2,3",
57 "CounterHTOff": "0,1,2,3,4,5,6,7"
62 "Counter": "0,1,2,3",
67 "CounterHTOff": "0,1,2,3,4,5,6,7"
72 "Counter": "0,1,2,3",
78 "CounterHTOff": "0,1,2,3,4,5,6,7"
83 "Counter": "0,1,2,3",
[all …]
/kernel/linux/linux-6.6/lib/zstd/compress/
Dclevels.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
17 /*-===== Pre-defined compression levels =====-*/
24 { /* "default" - for any srcSize > 256 KB */
29 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
30 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
31 { 21, 18, 19, 3, 5, 2, ZSTD_greedy }, /* level 5 */
32 { 21, 18, 19, 3, 5, 4, ZSTD_lazy }, /* level 6 */
33 { 21, 19, 20, 4, 5, 8, ZSTD_lazy }, /* level 7 */
34 { 21, 19, 20, 4, 5, 16, ZSTD_lazy2 }, /* level 8 */
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/skylake/
Dpipeline.json3 …tion. For instructions that consist of multiple micro-ops, Counts the retirement of the last micro…
39 …-on-Store blocking code preventing store forwarding. This includes cases when:a. preceding store c…
41 "Counter": "0,1,2,3",
46 "CounterHTOff": "0,1,2,3,4,5,6,7"
51 "Counter": "0,1,2,3",
56 "CounterHTOff": "0,1,2,3,4,5,6,7"
61 "Counter": "0,1,2,3",
66 "CounterHTOff": "0,1,2,3,4,5,6,7"
71 "Counter": "0,1,2,3",
76 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]

12345678910>>...54