| /kernel/linux/linux-5.10/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP1_SA_ALIGN 8 /* min alignment of save area */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */
72 #define XCHAL_TOTAL_SA_ALIGN 8 /* actual minimum alignment */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
90 * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
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| /kernel/linux/linux-6.6/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP1_SA_ALIGN 8 /* min alignment of save area */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */
72 #define XCHAL_TOTAL_SA_ALIGN 8 /* actual minimum alignment */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
90 * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
|
| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | nand_ids.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
37 SZ_4K, SZ_512, SZ_256K, 0, 8, 256, NAND_ECC_INFO(8, SZ_512) },
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
[all …]
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | nand_ids.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
37 SZ_4K, SZ_512, SZ_256K, 0, 8, 256, NAND_ECC_INFO(8, SZ_512) },
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
[all …]
|
| /kernel/linux/linux-6.6/tools/testing/selftests/powerpc/lib/ |
| D | reg.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 #include <ppc-asm.h>
11 /* Non volatile GPR - unsigned long buf[18] */
13 ld 14, 0*8(3)
14 ld 15, 1*8(3)
15 ld 16, 2*8(3)
16 ld 17, 3*8(3)
17 ld 18, 4*8(3)
18 ld 19, 5*8(3)
19 ld 20, 6*8(3)
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/arch/powerpc/tests/ |
| D | regs_load.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define R1 1 * 8
7 #define R2 2 * 8
8 #define R3 3 * 8
9 #define R4 4 * 8
10 #define R5 5 * 8
11 #define R6 6 * 8
12 #define R7 7 * 8
13 #define R8 8 * 8
14 #define R9 9 * 8
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/arch/powerpc/tests/ |
| D | regs_load.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define R1 1 * 8
7 #define R2 2 * 8
8 #define R3 3 * 8
9 #define R4 4 * 8
10 #define R5 5 * 8
11 #define R6 6 * 8
12 #define R7 7 * 8
13 #define R8 8 * 8
14 #define R9 9 * 8
[all …]
|
| /kernel/linux/linux-5.10/arch/xtensa/variants/test_kc705_be/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP1_SA_ALIGN 8 /* min alignment of save area */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 160 /* with 16-byte align padding */
72 #define XCHAL_TOTAL_SA_ALIGN 8 /* actual minimum alignment */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
90 * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
|
| /kernel/linux/linux-6.6/arch/xtensa/variants/test_kc705_be/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP1_SA_ALIGN 8 /* min alignment of save area */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 160 /* with 16-byte align padding */
72 #define XCHAL_TOTAL_SA_ALIGN 8 /* actual minimum alignment */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
90 * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
|
| /kernel/linux/linux-6.6/drivers/media/test-drivers/vicodec/ |
| D | codec-fwht.c | 1 // SPDX-License-Identifier: LGPL-2.1+
6 * 8x8 Fast Walsh Hadamard Transform in sequency order based on the paper:
8 * A Recursive Algorithm for Sequency-Ordered Fast Walsh Transforms,
15 #include "codec-fwht.h"
21 * be guaranteed that the magic 8 byte sequence (see below) can
34 1, 8,
36 3, 10, 17, 24,
57 s16 block[8 * 8]; in rlc()
67 for (y = 0; y < 8; y++) { in rlc()
68 for (x = 0; x < 8; x++) { in rlc()
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/test-drivers/vicodec/ |
| D | codec-fwht.c | 1 // SPDX-License-Identifier: LGPL-2.1+
6 * 8x8 Fast Walsh Hadamard Transform in sequency order based on the paper:
8 * A Recursive Algorithm for Sequency-Ordered Fast Walsh Transforms,
14 #include "codec-fwht.h"
20 * be guaranteed that the magic 8 byte sequence (see below) can
33 1, 8,
35 3, 10, 17, 24,
56 s16 block[8 * 8]; in rlc()
66 for (y = 0; y < 8; y++) { in rlc()
67 for (x = 0; x < 8; x++) { in rlc()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/driver-api/media/drivers/ccs/ |
| D | ccs-regs.asc | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
12 # 8, 16, 32 register bits (default is 8)
20 module_revision_number_major 0x0002 8
21 frame_count 0x0005 8
[all …]
|
| /kernel/linux/linux-5.10/tools/testing/selftests/powerpc/lib/ |
| D | reg.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 #include <ppc-asm.h>
11 /* Non volatile GPR - unsigned long buf[18] */
13 ld 14, 0*8(3)
14 ld 15, 1*8(3)
15 ld 16, 2*8(3)
16 ld 17, 3*8(3)
17 ld 18, 4*8(3)
18 ld 19, 5*8(3)
19 ld 20, 6*8(3)
[all …]
|
| /kernel/linux/linux-5.10/include/asm-generic/ |
| D | xor.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-generic/xor.h
5 * Generic optimized RAID-5 checksumming functions.
13 long lines = bytes / (sizeof (long)) / 8; in xor_8regs_2()
19 p1[3] ^= p2[3]; in xor_8regs_2()
24 p1 += 8; in xor_8regs_2()
25 p2 += 8; in xor_8regs_2()
26 } while (--lines > 0); in xor_8regs_2()
33 long lines = bytes / (sizeof (long)) / 8; in xor_8regs_3()
39 p1[3] ^= p2[3] ^ p3[3]; in xor_8regs_3()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/admin-guide/media/ |
| D | dvb_intro.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 structure of DVB-T cards are substantially similar to Analogue TV cards,
30 embedded within the modulated composite analogue signal -
38 signal encoded at a resolution of 768x576 24-bit color pixels over 25
39 frames per second - a fair amount of data is generated and must be
43 encoded and compressed form - similar to the form that is used in
46 The purpose of a simple budget digital TV card (DVB-T,C or S) is to
96 On this example, we're considering tuning into DVB-T channels in
115 The digital TV Scan utilities (like dvbv5-scan) have use a set of
116 compiled-in defaults for various countries and regions. Those are
[all …]
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/media/ |
| D | dvb_intro.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 structure of DVB-T cards are substantially similar to Analogue TV cards,
30 embedded within the modulated composite analogue signal -
38 signal encoded at a resolution of 768x576 24-bit color pixels over 25
39 frames per second - a fair amount of data is generated and must be
43 encoded and compressed form - similar to the form that is used in
46 The purpose of a simple budget digital TV card (DVB-T,C or S) is to
96 On this example, we're considering tuning into DVB-T channels in
115 The digital TV Scan utilities (like dvbv5-scan) have use a set of
116 compiled-in defaults for various countries and regions. Those are
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | intel_qp_tables.c | 1 // SPDX-License-Identifier: MIT
46 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
48 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
50 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
52 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
54 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
56 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
58 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
60 { 6, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
61 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
[all …]
|
| /kernel/linux/linux-6.6/include/asm-generic/ |
| D | xor.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-generic/xor.h
5 * Generic optimized RAID-5 checksumming functions.
14 long lines = bytes / (sizeof (long)) / 8; in xor_8regs_2()
20 p1[3] ^= p2[3]; in xor_8regs_2()
25 p1 += 8; in xor_8regs_2()
26 p2 += 8; in xor_8regs_2()
27 } while (--lines > 0); in xor_8regs_2()
35 long lines = bytes / (sizeof (long)) / 8; in xor_8regs_3()
41 p1[3] ^= p2[3] ^ p3[3]; in xor_8regs_3()
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| D | sysreg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
34 #define CRm_shift 8
68 (((x) << 8) & 0x00ff0000) | \
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/display/ |
| D | drm_dsc_helper.c | 1 // SPDX-License-Identifier: MIT
34 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
48 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
49 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
54 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
56 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
81 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
109 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
110 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
[all …]
|
| /kernel/linux/linux-5.10/tools/testing/selftests/powerpc/copyloops/ |
| D | copyuser_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
60 neg r6,r3 /* LS 3 bits = # bytes to 8-byte dest bdry */
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/lib/ |
| D | copyuser_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
60 neg r6,r3 /* LS 3 bits = # bytes to 8-byte dest bdry */
[all …]
|
| /kernel/linux/linux-6.6/arch/powerpc/lib/ |
| D | copyuser_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
60 neg r6,r3 /* LS 3 bits = # bytes to 8-byte dest bdry */
[all …]
|
| /kernel/linux/linux-6.6/tools/testing/selftests/powerpc/copyloops/ |
| D | copyuser_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
60 neg r6,r3 /* LS 3 bits = # bytes to 8-byte dest bdry */
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/crypto/ |
| D | aes-spe-core.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #include "aes-spe-regs.h"
17 rlwimi rT0,in,28-((bpos+3)%4)*8,20,27;
20 rlwimi rT1,in,24-((bpos+3)%4)*8,24,31;
41 LBZ(out, rT0, 8)
44 LBZ(out, rT0, 8) /* load enc byte */
56 * via bl/blr. It expects that caller has pre-xored input data with first
57 * 4 words of encryption key into rD0-rD3. Pointer/counter registers must
58 * have also been set up before (rT0, rKP, CTR). Output is stored in rD0-rD3
59 * and rW0-rW3 and caller must execute a final xor on the output registers.
[all …]
|