| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/goldmontplus/ |
| D | frontend.json | 4 …Line and that cache line is in the ICache (hit). The event strives to count on a cache line basis…
6 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
12 …"BriefDescription": "References per ICache line that are available in the ICache (hit). This event…
16 …Line and that cache line is not in the ICache (miss). The event strives to count on a cache line …
18 "Counter": "0,1,2,3",
20 "PEBScounters": "0,1,2,3",
24 …"BriefDescription": "References per ICache line that are not available in the ICache (miss). This …
28 …Line. The event strives to count on a cache line basis, so that multiple fetches to a single cach…
30 "Counter": "0,1,2,3",
[all …]
|
| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| D | dz.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
20 #define DZ_TLINE 0x0300 /* Transmitter Line Number */
31 #define DZ_LINE_MASK 0x0300 /* Line Mask */
39 #define LINE(x) ((x & DZ_LINE_MASK) >> 8) /* Get the line number macro
51 #define DZ_MODEM_RTS 0x0800 /* RTS for the modem line (2) */
52 #define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
53 #define DZ_PRINT_RTS 0x0200 /* RTS for the prntr line (3) */
54 #define DZ_PRINT_DTR 0x0100 /* DTR for the prntr line (3) */
55 #define DZ_LNENB 0x000f /* Transmitter Line Enable */
60 #define DZ_MODEM_RI 0x0800 /* RI for the modem line (2) */
[all …]
|
| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| D | dz.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
20 #define DZ_TLINE 0x0300 /* Transmitter Line Number */
31 #define DZ_LINE_MASK 0x0300 /* Line Mask */
39 #define LINE(x) ((x & DZ_LINE_MASK) >> 8) /* Get the line number macro
51 #define DZ_MODEM_RTS 0x0800 /* RTS for the modem line (2) */
52 #define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
53 #define DZ_PRINT_RTS 0x0200 /* RTS for the prntr line (3) */
54 #define DZ_PRINT_DTR 0x0100 /* DTR for the prntr line (3) */
55 #define DZ_LNENB 0x000f /* Transmitter Line Enable */
60 #define DZ_MODEM_RI 0x0800 /* RI for the modem line (2) */
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z13/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z13/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
|
| /kernel/linux/linux-5.10/arch/alpha/kernel/ |
| D | sys_wildfire.c | 1 // SPDX-License-Identifier: GPL-2.0
41 int qbbno = (irq >> 8) & (WILDFIRE_MAX_QBB - 1); in wildfire_update_irq_hw()
42 int pcano = (irq >> 6) & (WILDFIRE_PCA_PER_QBB - 1); in wildfire_update_irq_hw()
49 " got irq %d for non-existent PCA %d" in wildfire_update_irq_hw()
57 enable0 = (unsigned long *) &pca->pca_int[0].enable; /* ??? */ in wildfire_update_irq_hw()
72 enable0 = (unsigned long *) &pca->pca_int[0].enable; in wildfire_init_irq_hw()
73 enable1 = (unsigned long *) &pca->pca_int[1].enable; in wildfire_init_irq_hw()
74 enable2 = (unsigned long *) &pca->pca_int[2].enable; in wildfire_init_irq_hw()
75 enable3 = (unsigned long *) &pca->pca_int[3].enable; in wildfire_init_irq_hw()
77 target0 = (unsigned long *) &pca->pca_int[0].target; in wildfire_init_irq_hw()
[all …]
|
| D | sys_noritake.c | 1 // SPDX-License-Identifier: GPL-2.0
53 noritake_update_irq_hw(d->irq, cached_irq_mask |= 1 << (d->irq - 16)); in noritake_enable_irq()
59 noritake_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << (d->irq - 16))); in noritake_disable_irq()
87 pld &= pld - 1; /* clear least bit set */ in noritake_device_interrupt()
101 irq = (vector - 0x800) >> 4; in noritake_srm_device_interrupt()
110 * So, here's this additional grotty hack... :-( in noritake_srm_device_interrupt()
145 * 0 All valid ints from summary regs 2 & 3
147 * 2 Interrupt Line A from slot 0
148 * 3 Interrupt Line B from slot 0
149 * 4 Interrupt Line A from slot 1
[all …]
|
| D | sys_sx164.c | 1 // SPDX-License-Identifier: GPL-2.0
49 /* Not interested in the bogus interrupts (0,3,4,5,40-47), in sx164_init_irq()
56 if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL)) in sx164_init_irq()
57 pr_err("Failed to register timer-cascade interrupt\n"); in sx164_init_irq()
68 * 3 MBZ
72 * 7 PCI-ISA Bridge
73 * 8 Interrupt Line A from slot 3
74 * 9 Interrupt Line A from slot 2
75 *10 Interrupt Line A from slot 1
76 *11 Interrupt Line A from slot 0
[all …]
|
| /kernel/linux/linux-6.6/arch/alpha/kernel/ |
| D | sys_wildfire.c | 1 // SPDX-License-Identifier: GPL-2.0
41 int qbbno = (irq >> 8) & (WILDFIRE_MAX_QBB - 1); in wildfire_update_irq_hw()
42 int pcano = (irq >> 6) & (WILDFIRE_PCA_PER_QBB - 1); in wildfire_update_irq_hw()
49 " got irq %d for non-existent PCA %d" in wildfire_update_irq_hw()
57 enable0 = (unsigned long *) &pca->pca_int[0].enable; /* ??? */ in wildfire_update_irq_hw()
72 enable0 = (unsigned long *) &pca->pca_int[0].enable; in wildfire_init_irq_hw()
73 enable1 = (unsigned long *) &pca->pca_int[1].enable; in wildfire_init_irq_hw()
74 enable2 = (unsigned long *) &pca->pca_int[2].enable; in wildfire_init_irq_hw()
75 enable3 = (unsigned long *) &pca->pca_int[3].enable; in wildfire_init_irq_hw()
77 target0 = (unsigned long *) &pca->pca_int[0].target; in wildfire_init_irq_hw()
[all …]
|
| D | sys_noritake.c | 1 // SPDX-License-Identifier: GPL-2.0
53 noritake_update_irq_hw(d->irq, cached_irq_mask |= 1 << (d->irq - 16)); in noritake_enable_irq()
59 noritake_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << (d->irq - 16))); in noritake_disable_irq()
87 pld &= pld - 1; /* clear least bit set */ in noritake_device_interrupt()
101 irq = (vector - 0x800) >> 4; in noritake_srm_device_interrupt()
110 * So, here's this additional grotty hack... :-( in noritake_srm_device_interrupt()
145 * 0 All valid ints from summary regs 2 & 3
147 * 2 Interrupt Line A from slot 0
148 * 3 Interrupt Line B from slot 0
149 * 4 Interrupt Line A from slot 1
[all …]
|
| D | sys_sx164.c | 1 // SPDX-License-Identifier: GPL-2.0
49 /* Not interested in the bogus interrupts (0,3,4,5,40-47), in sx164_init_irq()
56 if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL)) in sx164_init_irq()
57 pr_err("Failed to register timer-cascade interrupt\n"); in sx164_init_irq()
68 * 3 MBZ
72 * 7 PCI-ISA Bridge
73 * 8 Interrupt Line A from slot 3
74 * 9 Interrupt Line A from slot 2
75 *10 Interrupt Line A from slot 1
76 *11 Interrupt Line A from slot 0
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/goldmont/ |
| D | frontend.json | 4 …Line and that cache line is in the ICache (hit). The event strives to count on a cache line basis…
6 "Counter": "0,1,2,3",
10 …"BriefDescription": "References per ICache line that are available in the ICache (hit). This event…
14 …Line and that cache line is not in the ICache (miss). The event strives to count on a cache line …
16 "Counter": "0,1,2,3",
20 …"BriefDescription": "References per ICache line that are not available in the ICache (miss). This …
24 …Line. The event strives to count on a cache line basis, so that multiple fetches to a single cach…
26 "Counter": "0,1,2,3",
30 …"BriefDescription": "References per ICache line. This event counts differently than Intel processo…
34 … read from the MSROM. The most common case that this counts is when a micro-coded instruction is …
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z14/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z14/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/sandybridge/ |
| D | cache.json | 4 "Counter": "0,1,2,3",
9 "CounterHTOff": "0,1,2,3,4,5,6,7"
13 "Counter": "0,1,2,3",
18 "CounterHTOff": "0,1,2,3,4,5,6,7"
22 "Counter": "0,1,2,3",
27 "CounterHTOff": "0,1,2,3,4,5,6,7"
31 "Counter": "0,1,2,3",
36 "CounterHTOff": "0,1,2,3,4,5,6,7"
40 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_zec12/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_zec12/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/ |
| D | aspeed-bmc-lenovo-hr855xg2.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr855xg2-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | aspeed-bmc-lenovo-hr855xg2.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr855xg2-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z15/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page"
31 "Unit": "CPU-M-CF",
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z15/ |
| D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
|
| /kernel/linux/linux-6.6/drivers/media/pci/cx18/ |
| D | cx18-vbi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Derived from ivtv-vbi.c
10 #include "cx18-driver.h"
11 #include "cx18-vbi.h"
12 #include "cx18-ioctl.h"
13 #include "cx18-queue.h"
18 * of VBI sample or VBI ancillary data regions in the digital ratser line.
27 int line = 0; in copy_vbi_data() local
32 /* MPEG-2 Program Pack */ in copy_vbi_data()
37 /* MPEG-2 Private Stream 1 PES Packet */ in copy_vbi_data()
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/pci/cx18/ |
| D | cx18-vbi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Derived from ivtv-vbi.c
10 #include "cx18-driver.h"
11 #include "cx18-vbi.h"
12 #include "cx18-ioctl.h"
13 #include "cx18-queue.h"
18 * of VBI sample or VBI ancillary data regions in the digital ratser line.
27 int line = 0; in copy_vbi_data() local
32 /* MPEG-2 Program Pack */ in copy_vbi_data()
37 /* MPEG-2 Private Stream 1 PES Packet */ in copy_vbi_data()
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-ts5500.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Digital I/O driver for Technologic Systems TS-5500
5 * Copyright (c) 2012 Savoir-faire Linux Inc.
10 * In that sense, the support is not limited to the TS-5500 blocks.
13 * TS-5500:
14 * Documentation: http://wiki.embeddedarm.com/wiki/TS-5500
17 * TS-5600:
18 * Documentation: http://wiki.embeddedarm.com/wiki/TS-5600
19 * Blocks: LCD port (identical to TS-5500 LCD).
99 TS5500_DIO_IN_OUT(vaddr, vbitfrom + 3, caddr, cbit)
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpio/ |
| D | gpio-ts5500.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Digital I/O driver for Technologic Systems TS-5500
5 * Copyright (c) 2012 Savoir-faire Linux Inc.
10 * In that sense, the support is not limited to the TS-5500 blocks.
13 * TS-5500:
14 * Documentation: https://docs.embeddedts.com/TS-5500
17 * TS-5600:
18 * Documentation: https://docs.embeddedts.com/TS-5600
19 * Blocks: LCD port (identical to TS-5500 LCD).
99 TS5500_DIO_IN_OUT(vaddr, vbitfrom + 3, caddr, cbit)
[all …]
|