| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ |
| D | renesas,du.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Display Unit (DU)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the Display Unit embedded in the Renesas R-Car
14 Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,du-r8a7742 # for RZ/G1H compatible DU
20 - renesas,du-r8a7743 # for RZ/G1M compatible DU
21 - renesas,du-r8a7744 # for RZ/G1N compatible DU
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | vlv_dsi_pll_regs.h | 1 /* SPDX-License-Identifier: MIT */
21 #define BXT_MIPI_DIV_SHIFT(port) \ argument
22 _MIPI_PORT(port, BXT_MIPI1_DIV_SHIFT, \
28 #define BXT_MIPI_TX_ESCLK_SHIFT(port) \ argument
29 _MIPI_PORT(port, BXT_MIPI1_TX_ESCLK_SHIFT, \
33 #define BXT_MIPI_TX_ESCLK_FIXDIV_MASK(port) \ argument
34 _MIPI_PORT(port, BXT_MIPI1_TX_ESCLK_FIXDIV_MASK, \
36 #define BXT_MIPI_TX_ESCLK_DIVIDER(port, val) \ argument
37 (((val) & 0x3F) << BXT_MIPI_TX_ESCLK_SHIFT(port))
41 #define BXT_MIPI_RX_ESCLK_UPPER_SHIFT(port) \ argument
[all …]
|
| D | vlv_dsi_regs.h | 1 /* SPDX-License-Identifier: MIT */
14 #define _MIPI_MMIO_BASE(__i915) ((__i915)->display.dsi.mmio_base)
16 #define _MIPI_PORT(port, a, c) (((port) == PORT_A) ? a : c) /* ports A and C only */ argument
17 #define _MMIO_MIPI(port, a, c) _MMIO(_MIPI_PORT(port, a, c)) argument
43 #define MIPI_PORT_CTRL(port) _MMIO_MIPI(port, _MIPIA_PORT_CTRL, _MIPIC_PORT_CTRL) argument
45 /* BXT port control */
69 #define CSB_MASK (3 << 9)
80 #define TEARING_EFFECT_MASK (3 << 2)
85 #define LANE_CONFIGURATION_MASK (3 << 0)
92 #define MIPI_TEARING_CTRL(port) _MMIO_MIPI(port, _MIPIA_TEARING_CTRL, _MIPIC_TEARING_CTRL) argument
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-ebsa110/ |
| D | io.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/arm/mach-ebsa110/isamem.c
8 * in the way it handles accesses to odd IO ports on 16-bit devices. These
9 * devices have their D0-D15 lines connected to the processors D0-D15 lines.
10 * Since they expect all byte IO operations to be performed on D0-D7, and the
11 * StrongARM expects to transfer the byte to these odd addresses on D8-D15,
14 * The trick employed here is to use long word stores to odd address -1. The
16 * peripherals address bus, thereby accessing the odd IO port. Meanwhile, the
17 * StrongARM transfers its data on D0-D7 as expected.
19 * Things get more interesting on the pass-1 EBSA110 - the PCMCIA controller
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-ws16c48.c | 1 // SPDX-License-Identifier: GPL-2.0-only
34 * struct ws16c48_gpio - GPIO device private data structure
41 * @base: base port address of the GPIO device
56 const unsigned port = offset / 8; in ws16c48_gpio_get_direction() local
59 if (ws16c48gpio->io_state[port] & mask) in ws16c48_gpio_get_direction()
68 const unsigned port = offset / 8; in ws16c48_gpio_direction_input() local
72 raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); in ws16c48_gpio_direction_input()
74 ws16c48gpio->io_state[port] |= mask; in ws16c48_gpio_direction_input()
75 ws16c48gpio->out_state[port] &= ~mask; in ws16c48_gpio_direction_input()
76 outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); in ws16c48_gpio_direction_input()
[all …]
|
| D | gpio-104-dio-48e.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the ACCES 104-DIO-48E series
6 * This driver supports the following ACCES devices: 104-DIO-48E and
7 * 104-DIO-24E.
30 MODULE_PARM_DESC(base, "ACCES 104-DIO-48E base addresses");
34 MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers");
37 * struct dio48e_gpio - GPIO device private data structure
43 * @base: base port address of the GPIO device
59 const unsigned port = offset / 8; in dio48e_gpio_get_direction() local
62 if (dio48egpio->io_state[port] & mask) in dio48e_gpio_get_direction()
[all …]
|
| D | gpio-gpio-mm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the Diamond Systems GPIO-MM
6 * This driver supports the following Diamond Systems devices: GPIO-MM and
7 * GPIO-MM-12.
28 MODULE_PARM_DESC(base, "Diamond Systems GPIO-MM base addresses");
31 * struct gpiomm_gpio - GPIO device private data structure
37 * @base: base port address of the GPIO device
52 const unsigned int port = offset / 8; in gpiomm_gpio_get_direction() local
55 if (gpiommgpio->io_state[port] & mask) in gpiomm_gpio_get_direction()
66 const unsigned int control_port = io_port / 3; in gpiomm_gpio_direction_input()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpio/ |
| D | gpio-ws16c48.c | 1 // SPDX-License-Identifier: GPL-2.0-only
43 #define INT_ID_PAGE u8_encode_bits(3, PAGE_LOCK_PAGE_FIELD)
89 /* Only the first 24 lines (Port 0-2) support interrupts */
92 WS16C48_REGMAP_IRQ(0), WS16C48_REGMAP_IRQ(1), WS16C48_REGMAP_IRQ(2), /* 0-2 */
93 WS16C48_REGMAP_IRQ(3), WS16C48_REGMAP_IRQ(4), WS16C48_REGMAP_IRQ(5), /* 3-5 */
94 WS16C48_REGMAP_IRQ(6), WS16C48_REGMAP_IRQ(7), WS16C48_REGMAP_IRQ(8), /* 6-8 */
95 WS16C48_REGMAP_IRQ(9), WS16C48_REGMAP_IRQ(10), WS16C48_REGMAP_IRQ(11), /* 9-11 */
96 WS16C48_REGMAP_IRQ(12), WS16C48_REGMAP_IRQ(13), WS16C48_REGMAP_IRQ(14), /* 12-14 */
97 WS16C48_REGMAP_IRQ(15), WS16C48_REGMAP_IRQ(16), WS16C48_REGMAP_IRQ(17), /* 15-17 */
98 WS16C48_REGMAP_IRQ(18), WS16C48_REGMAP_IRQ(19), WS16C48_REGMAP_IRQ(20), /* 18-20 */
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/ |
| D | tegra194-p2972-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra194-p2888.dtsi"
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
24 #address-cells = <1>;
25 #size-cells = <0>;
27 port@0 {
31 remote-endpoint = <&xbar_i2s1_ep>;
[all …]
|
| D | tegra234-p3701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
17 #address-cells = <1>;
18 #size-cells = <0>;
20 port@0 {
24 remote-endpoint = <&xbar_i2s1>;
28 i2s1_port: port@1 {
32 dai-format = "i2s";
43 #address-cells = <1>;
44 #size-cells = <0>;
46 port@0 {
[all …]
|
| D | tegra194-p3509-0000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
19 #address-cells = <1>;
20 #size-cells = <0>;
22 port@0 {
26 remote-endpoint = <&xbar_i2s3_ep>;
30 i2s3_port: port@1 {
34 dai-format = "i2s";
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/boot/dts/cavium-octeon/ |
| D | octeon_3xxx.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * OCTEON 3XXX, 5XXX, 63XX device tree skeleton.
6 * use. Because of this, it contains a super-set of the available
15 phy0: ethernet-phy@0 {
17 marvell,reg-init =
21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
22 /* irq, blink-activity, blink-link */
23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
27 phy1: ethernet-phy@1 {
29 marvell,reg-init =
[all …]
|
| /kernel/linux/linux-6.6/arch/mips/boot/dts/cavium-octeon/ |
| D | octeon_3xxx.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * OCTEON 3XXX, 5XXX, 63XX device tree skeleton.
6 * use. Because of this, it contains a super-set of the available
15 phy0: ethernet-phy@0 {
17 marvell,reg-init =
21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
22 /* irq, blink-activity, blink-link */
23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
27 phy1: ethernet-phy@1 {
29 marvell,reg-init =
[all …]
|
| /kernel/linux/linux-6.6/drivers/input/joystick/ |
| D | analog.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1996-2001 Vojtech Pavlik
69 #define ANALOG_MAX_TIME 3 /* 3 ms */
121 struct input_dev *dev = analog->dev; in analog_decode()
124 if (analog->mask & ANALOG_HAT_FCS) in analog_decode()
126 if (axes[3] < ((initial[3] * ((i << 1) + 1)) >> 3)) { in analog_decode()
132 if (analog->mask & (0x10 << i)) in analog_decode()
133 input_report_key(dev, analog->buttons[j++], (buttons >> i) & 1); in analog_decode()
135 if (analog->mask & ANALOG_HBTN_CHF) in analog_decode()
137 input_report_key(dev, analog->buttons[j++], (buttons >> (i + 10)) & 1); in analog_decode()
[all …]
|
| /kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/ |
| D | sh_css_mipi.c | 1 // SPDX-License-Identifier: GPL-2.0
37 * - A line is multiple of 4 bytes = 1 word.
38 * - Each frame has SOF and EOF (each 1 word).
39 * - Each line has format header and optionally SOL and EOL (each 1 word).
40 * - Odd and even lines of YUV420 format are different in bites per pixel size.
41 * - Custom size of embedded data.
42 * -- Interleaved frames are not taken into account.
43 * -- Lines are multiples of 8B, and not necessary of (custom 3B, or 7B
72 * in the non-continuous use scenario. in ia_css_mipi_frame_calculate_size()
81 case ATOMISP_INPUT_FORMAT_RAW_6: /* 4p, 3B, 24bits */ in ia_css_mipi_frame_calculate_size()
[all …]
|
| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/ |
| D | sh_css_mipi.c | 1 // SPDX-License-Identifier: GPL-2.0
48 * Check if a source port or TPG/PRBS ID is valid
54 unsigned int port = 0; in ia_css_mipi_is_source_port_valid() local
57 switch (pipe->stream->config.mode) { in ia_css_mipi_is_source_port_valid()
59 port = (unsigned int)pipe->stream->config.source.port.port; in ia_css_mipi_is_source_port_valid()
63 port = (unsigned int)pipe->stream->config.source.tpg.id; in ia_css_mipi_is_source_port_valid()
67 port = (unsigned int)pipe->stream->config.source.prbs.id; in ia_css_mipi_is_source_port_valid()
77 assert(port < max_ports); in ia_css_mipi_is_source_port_valid()
79 if (port >= max_ports) in ia_css_mipi_is_source_port_valid()
83 *pport = port; in ia_css_mipi_is_source_port_valid()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/i2c/ |
| D | ti,ds90ub960.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs
10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
13 The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO
17 - $ref: /schemas/i2c/i2c-atr.yaml#
22 - ti,ds90ub960-q1
23 - ti,ds90ub9702-q1
33 clock-names:
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/ |
| D | ocelot.txt | 5 -----
9 - VSC9959 (Felix)
10 - VSC9953 (Seville)
13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node
25 For the external switch ports, depending on board configuration, "phy-mode" and
26 "phy-handle" are populated by board specific device tree instances. Ports 4 and
29 The CPU port property ("ethernet") configures the feature called "NPI port" in
30 the Ocelot hardware core. The CPU port in Ocelot is a set of queues, which are
31 connected, in the Node Processor Interface (NPI) mode, to an Ethernet port.
32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal
[all …]
|
| D | mt7530.txt | 6 - compatible: may be compatible = "mediatek,mt7530"
9 - #address-cells: Must be 1.
10 - #size-cells: Must be 0.
11 - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part
12 on multi-chip module belong to MT7623A has or the remotely standalone
17 - core-supply: Phandle to the regulator node necessary for the core power.
18 - io-supply: Phandle to the regulator node necessary for the I/O power.
19 See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt
24 - reset-gpios: Should be a gpio specifier for a reset line.
28 - resets : Phandle pointing to the system reset controller with
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/mscc/ |
| D | ocelot_police.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 /* Types for ANA:POL[0-192]:POL_MODE_CFG.FRM_MODE */
11 #define POL_MODE_LINERATE 0 /* Incl IPG. Unit: 33 1/3 kbps, 4096 bytes */
12 #define POL_MODE_DATARATE 1 /* Excl IPG. Unit: 33 1/3 kbps, 4096 bytes */
13 #define POL_MODE_FRMRATE_HI 2 /* Unit: 33 1/3 fps, 32.8 frames */
14 #define POL_MODE_FRMRATE_LO 3 /* Unit: 1/3 fps, 0.3 frames */
17 #define POL_IX_PORT 0 /* 0-11 : Port policers */
18 #define POL_IX_QUEUE 32 /* 32-127 : Queue policers */
21 #define POL_ORDER 0x1d3 /* Ocelot policer order: Serial (QoS -> Port -> VCAP) */
23 int qos_policer_conf_set(struct ocelot *ocelot, int port, u32 pol_ix, in qos_policer_conf_set() argument
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
|
| D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
|
| /kernel/linux/linux-5.10/drivers/input/joystick/ |
| D | analog.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1996-2001 Vojtech Pavlik
75 #define ANALOG_MAX_TIME 3 /* 3 ms */
131 #define DELTA(x,y) (boot_cpu_has(X86_FEATURE_TSC) ? ((y) - (x)) : ((x) - (y) + ((x) < (y) ? PIT_TIC…
148 #define DELTA(x,y) ((y)-(x))
152 #define DELTA(x,y) ((y)-(x))
158 #define DELTA(x,y) ((y)-(x))
177 return y - x; in delta()
188 struct input_dev *dev = analog->dev; in analog_decode()
191 if (analog->mask & ANALOG_HAT_FCS) in analog_decode()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/dsa/ |
| D | mediatek,mt7530.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
|
| /kernel/linux/linux-6.6/drivers/pinctrl/renesas/ |
| D | pinctrl-rza1.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * This includes SoCs which are sub- or super- sets of this particular line,
22 #include <linux/pinctrl/pinconf-generic.h>
34 #define DRIVER_NAME "pinctrl-rza1"
47 #define RZA1_ADDR(mem, reg, port) ((mem) + (reg) + ((port) * 4)) argument
74 /* ----------------------------------------------------------------------------
79 * rza1_bidir_pin - describe a single pin that needs bidir flag applied.
87 * rza1_bidir_entry - describe a list of pins that needs bidir flag applied.
88 * Each struct rza1_bidir_entry describes a port.
96 * rza1_swio_pin - describe a single pin that needs swio flag applied.
[all …]
|