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/kernel/linux/linux-6.6/arch/arm/boot/dts/arm/
Dvexpress-v2p-ca15-tc1.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
8 * HBI-0237A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15";
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/sandybridge/
Dcache.json9 "CounterHTOff": "0,1,2,3,4,5,6,7"
18 "CounterHTOff": "0,1,2,3,4,5,6,7"
27 "CounterHTOff": "0,1,2,3,4,5,6,7"
36 "CounterHTOff": "0,1,2,3,4,5,6,7"
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
54 "CounterHTOff": "0,1,2,3,4,5,6,7"
63 "CounterHTOff": "0,1,2,3,4,5,6,7"
72 "CounterHTOff": "0,1,2,3,4,5,6,7"
81 "CounterHTOff": "0,1,2,3,4,5,6,7"
90 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/jaketown/
Duncore-power.json78 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
86 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
94 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
102 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
110 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
118 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
126 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
134 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
142 …can use all four counters with this event, so it is possible to track up to 4 configurable bands. …
150 …can use all four counters with this event, so it is possible to track up to 4 configurable bands. …
[all …]
/kernel/linux/linux-5.10/drivers/phy/broadcom/
Dphy-bcm-sr-pcie.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Broadcom
18 #define SR_PAXC_PHY_IDX (SR_NR_PCIE_PHYS - 1)
40 * struct sr_pcie_phy - Stingray PCIe PHY
53 * struct sr_pcie_phy_core - Stingray PCIe PHY core control
83 /* PIPEMUX = 2, EP 4x4 */
85 /* PIPEMUX = 3, RC 2x8, cores 0, 7 */
87 /* PIPEMUX = 4, RC 4x4, cores 0, 1, 6, 7 */
89 /* PIPEMUX = 5, RC 8x2, all 8 cores */
91 /* PIPEMUX = 6, RC 3x4 + 2x2, cores 0, 2, 3, 6, 7 */
[all …]
/kernel/linux/linux-6.6/drivers/phy/broadcom/
Dphy-bcm-sr-pcie.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Broadcom
18 #define SR_PAXC_PHY_IDX (SR_NR_PCIE_PHYS - 1)
40 * struct sr_pcie_phy - Stingray PCIe PHY
53 * struct sr_pcie_phy_core - Stingray PCIe PHY core control
83 /* PIPEMUX = 2, EP 4x4 */
85 /* PIPEMUX = 3, RC 2x8, cores 0, 7 */
87 /* PIPEMUX = 4, RC 4x4, cores 0, 1, 6, 7 */
89 /* PIPEMUX = 5, RC 8x2, all 8 cores */
91 /* PIPEMUX = 6, RC 3x4 + 2x2, cores 0, 2, 3, 6, 7 */
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dvexpress-v2p-ca15-tc1.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
8 * HBI-0237A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15";
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/ivytown/
Duncore-power.json82 "BriefDescription": "Core 4 C State Transition Cycles",
130 "BriefDescription": "Deep C State Rejection - Core 0",
138 "BriefDescription": "Deep C State Rejection - Core 1",
146 "BriefDescription": "Deep C State Rejection - Core 10",
154 "BriefDescription": "Deep C State Rejection - Core 11",
162 "BriefDescription": "Deep C State Rejection - Core 12",
170 "BriefDescription": "Deep C State Rejection - Core 13",
178 "BriefDescription": "Deep C State Rejection - Core 14",
186 "BriefDescription": "Deep C State Rejection - Core 2",
194 "BriefDescription": "Deep C State Rejection - Core 3",
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/haswellx/
Duncore-power.json158 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
166 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
174 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
182 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
190 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
198 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
206 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
214 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
222 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
230 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/haswell/
Dcache.json11 "CounterHTOff": "0,1,2,3,4,5,6,7"
21 "CounterHTOff": "0,1,2,3,4,5,6,7"
31 "CounterHTOff": "0,1,2,3,4,5,6,7"
42 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "CounterHTOff": "0,1,2,3,4,5,6,7"
63 "CounterHTOff": "0,1,2,3,4,5,6,7"
74 "CounterHTOff": "0,1,2,3,4,5,6,7"
84 "CounterHTOff": "0,1,2,3,4,5,6,7"
94 "CounterHTOff": "0,1,2,3,4,5,6,7"
104 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/haswellx/
Dcache.json11 "CounterHTOff": "0,1,2,3,4,5,6,7"
21 "CounterHTOff": "0,1,2,3,4,5,6,7"
31 "CounterHTOff": "0,1,2,3,4,5,6,7"
42 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "CounterHTOff": "0,1,2,3,4,5,6,7"
63 "CounterHTOff": "0,1,2,3,4,5,6,7"
74 "CounterHTOff": "0,1,2,3,4,5,6,7"
84 "CounterHTOff": "0,1,2,3,4,5,6,7"
94 "CounterHTOff": "0,1,2,3,4,5,6,7"
104 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/
Darm,vexpress-juno.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <sudeep.holla@arm.com>
11 - Linus Walleij <linus.walleij@linaro.org>
15 multicore Cortex-A class systems. The Versatile Express family contains both
37 further subvariants are released of the core tile, even more fine-granular
45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
49 - const: arm,vexpress,v2p-ca9
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Darm,vexpress-juno.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <sudeep.holla@arm.com>
11 - Linus Walleij <linus.walleij@linaro.org>
15 multicore Cortex-A class systems. The Versatile Express family contains both
37 further subvariants are released of the core tile, even more fine-granular
45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
49 - const: arm,vexpress,v2p-ca9
[all …]
/kernel/linux/linux-6.6/drivers/crypto/cavium/cpt/
Dcptpf_main.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #define DRV_NAME "thunder-cpt"
19 static u32 num_vfs = 4; /* Default 4 VF enabled */
21 MODULE_PARM_DESC(num_vfs, "Number of VFs to enable(1-16)");
24 * Disable cores specified by coremask
32 struct device *dev = &cpt->pdev->dev; in cpt_disable_cores()
35 coremask = (coremask << cpt->max_se_cores); in cpt_disable_cores()
37 /* Disengage the cores from groups */ in cpt_disable_cores()
38 grpmask = cpt_read_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp)); in cpt_disable_cores()
39 cpt_write_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp), in cpt_disable_cores()
[all …]
/kernel/linux/linux-5.10/drivers/crypto/cavium/cpt/
Dcptpf_main.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #define DRV_NAME "thunder-cpt"
20 static u32 num_vfs = 4; /* Default 4 VF enabled */
22 MODULE_PARM_DESC(num_vfs, "Number of VFs to enable(1-16)");
25 * Disable cores specified by coremask
33 struct device *dev = &cpt->pdev->dev; in cpt_disable_cores()
36 coremask = (coremask << cpt->max_se_cores); in cpt_disable_cores()
38 /* Disengage the cores from groups */ in cpt_disable_cores()
39 grpmask = cpt_read_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp)); in cpt_disable_cores()
40 cpt_write_csr64(cpt->reg_base, CPTX_PF_GX_EN(0, grp), in cpt_disable_cores()
[all …]
/kernel/linux/linux-5.10/tools/power/cpupower/man/
Dcpupower.13 cpupower \- Shows and sets processor power related values
6 .B cpupower [ \-c cpulist ] <command> [ARGS]
8 .B cpupower \-v|\-\-version
10 .B cpupower \-h|\-\-help
16 The manpages of the commands (cpupower\-<command>(1)) provide detailed
22 \-\-help, \-h
23 .RS 4
27 \-\-cpu cpulist, \-c cpulist
28 .RS 4
29 Only show or set values for specific cores.
[all …]
Dcpupower-idle-set.11 .TH "CPUPOWER-IDLE-SET" "1" "0.1" "" "cpupower Manual"
4 cpupower\-idle\-set \- Utility to set cpu idle state specific kernel options
7 cpupower [ \-c cpulist ] idle\-info [\fIoptions\fP]
10 The cpupower idle\-set subcommand allows to set cpu idle, also called cpu
16 \fB\-d\fR \fB\-\-disable\fR <STATE_NO>
19 \fB\-e\fR \fB\-\-enable\fR <STATE_NO>
22 \fB\-D\fR \fB\-\-disable-by-latency\fR <LATENCY>
27 \fB\-E\fR \fB\-\-enable-all\fR
34 .RS 4
52 .RS 4
[all …]
Dcpupower-monitor.11 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-monitor \- Report processor frequency and idle statistics
7 .RB "\-l"
10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ]
11 .RB [ "\-i seconds" ]
14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ]
18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power
22 \fBcpupower-monitor \fP implements independent processor sleep state and
24 directly reading out hardware registers. Use \-l to get an overview which are
29 \-l
[all …]
/kernel/linux/linux-6.6/tools/power/cpupower/man/
Dcpupower.13 cpupower \- Shows and sets processor power related values
6 .B cpupower [ \-c cpulist ] <command> [ARGS]
8 .B cpupower \-v|\-\-version
10 .B cpupower \-h|\-\-help
16 The manpages of the commands (cpupower\-<command>(1)) provide detailed
22 \-\-help, \-h
23 .RS 4
27 \-\-cpu cpulist, \-c cpulist
28 .RS 4
29 Only show or set values for specific cores.
[all …]
Dcpupower-idle-set.11 .TH "CPUPOWER-IDLE-SET" "1" "0.1" "" "cpupower Manual"
4 cpupower\-idle\-set \- Utility to set cpu idle state specific kernel options
7 cpupower [ \-c cpulist ] idle\-set [\fIoptions\fP]
10 The cpupower idle\-set subcommand allows to set cpu idle, also called cpu
16 \fB\-d\fR \fB\-\-disable\fR <STATE_NO>
19 \fB\-e\fR \fB\-\-enable\fR <STATE_NO>
22 \fB\-D\fR \fB\-\-disable-by-latency\fR <LATENCY>
27 \fB\-E\fR \fB\-\-enable-all\fR
34 .RS 4
52 .RS 4
[all …]
/kernel/linux/linux-5.10/arch/arc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
96 source "arch/arc/plat-tb10x/Kconfig"
97 source "arch/arc/plat-axs10x/Kconfig"
98 source "arch/arc/plat-hsdk/Kconfig"
110 The original ARC ISA of ARC600/700 cores
116 ISA for the Next Generation ARC-HS cores
141 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
143 -Caches: New Prog Model, Region Flush
144 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
[all …]
/kernel/linux/linux-6.6/arch/arc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
88 source "arch/arc/plat-tb10x/Kconfig"
89 source "arch/arc/plat-axs10x/Kconfig"
90 source "arch/arc/plat-hsdk/Kconfig"
102 The original ARC ISA of ARC600/700 cores
108 ISA for the Next Generation ARC-HS cores
126 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
128 -Caches: New Prog Model, Region Flush
129 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/icelakex/
Duncore-cache.json111 "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4",
115 …"PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4 : Number of CMS Agent 0 AD…
210 "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4",
214 …"PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4 : Number of CMS Agent 0 A…
309 "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4",
313 …"PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4 : Number of CMS Agent 0 BL…
408 "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4",
412 …"PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4 : Number of CMS Agent 0 B…
507 "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4",
511 …"PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4 : Number of CMS Agent 1 AD…
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/jaketown/
Dcache.json34 …vent counts line-splitted load uops retired to the architected path. A line split is across 64B ca…
45 …ent counts line-splitted store uops retired to the architected path. A line split is across 64B ca…
97 …"PublicDescription": "This event counts retired load uops that hit in the last-level (L3) cache wi…
112 "BriefDescription": "Miss in last-level (L3) cache. Excludes Unknown data-source.",
131 …n": "Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core …
135 …-level cache (L3) and were found in a non-modified state in a neighboring core's private cache (sa…
141 …iption": "Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core c…
145 …-level cache (L3) and were found in a non-modified state in a neighboring core's private cache (sa…
189 "CounterHTOff": "0,1,2,3,4,5,6,7"
198 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
/kernel/linux/linux-5.10/drivers/soc/tegra/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
63 # 64-bit ARM SoCs
75 Tegra124's "4+1" Cortex-A15 CPU complex.
85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
86 cores in a switched configuration. It features a GPU of the Maxwell
88 and providing 256 CUDA cores. It supports hardware-accelerated en-
90 VP8 at 4K resolution and up to 60 fps.
105 combination of Denver and Cortex-A57 CPU cores and a GPU based on
106 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivytown/
Dcache.json10 "CounterHTOff": "0,1,2,3,4,5,6,7"
20 "CounterHTOff": "0,1,2,3,4,5,6,7"
30 "CounterHTOff": "0,1,2,3,4,5,6,7"
40 "CounterHTOff": "0,1,2,3,4,5,6,7"
50 "CounterHTOff": "0,1,2,3,4,5,6,7"
60 "CounterHTOff": "0,1,2,3,4,5,6,7"
70 "CounterHTOff": "0,1,2,3,4,5,6,7"
80 "CounterHTOff": "0,1,2,3,4,5,6,7"
90 "CounterHTOff": "0,1,2,3,4,5,6,7"
100 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]

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