Searched +full:5 +full:- +full:bit (Results 1 – 25 of 1229) sorted by relevance
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| /kernel/linux/linux-5.10/include/linux/mfd/da9062/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Copyright (C) 2015-2017 Dialog Semiconductor 151 * Bit fields 158 #define DA9062AA_WRITE_MODE_MASK BIT(6) 160 #define DA9062AA_REVERT_MASK BIT(7) 166 #define DA9062AA_DVC_BUSY_MASK BIT(2) 172 #define DA9062AA_GPI1_MASK BIT(1) 174 #define DA9062AA_GPI2_MASK BIT(2) 176 #define DA9062AA_GPI3_MASK BIT(3) 178 #define DA9062AA_GPI4_MASK BIT(4) [all …]
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| /kernel/linux/linux-6.6/include/linux/mfd/da9062/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Copyright (C) 2015-2017 Dialog Semiconductor 151 * Bit fields 158 #define DA9062AA_WRITE_MODE_MASK BIT(6) 160 #define DA9062AA_REVERT_MASK BIT(7) 166 #define DA9062AA_DVC_BUSY_MASK BIT(2) 172 #define DA9062AA_GPI1_MASK BIT(1) 174 #define DA9062AA_GPI2_MASK BIT(2) 176 #define DA9062AA_GPI3_MASK BIT(3) 178 #define DA9062AA_GPI4_MASK BIT(4) [all …]
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| /kernel/linux/linux-5.10/drivers/usb/typec/tcpm/ |
| D | fusb302_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Copyright 2016-2017 Google, Inc 5 * Fairchild FUSB302 Type-C Chip Driver 13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7) 14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6) 15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5) 16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4) 17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3) 18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2) 19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1) [all …]
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| /kernel/linux/linux-6.6/drivers/usb/typec/tcpm/ |
| D | fusb302_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Copyright 2016-2017 Google, Inc 5 * Fairchild FUSB302 Type-C Chip Driver 13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7) 14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6) 15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5) 16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4) 17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3) 18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2) 19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1) [all …]
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| /kernel/linux/linux-5.10/drivers/net/dsa/microchip/ |
| D | ksz8795_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 34 #define SW_NEW_BACKOFF BIT(7) 35 #define SW_GLOBAL_RESET BIT(6) 36 #define SW_FLUSH_DYN_MAC_TABLE BIT(5) 37 #define SW_FLUSH_STA_MAC_TABLE BIT(4) 38 #define SW_LINK_AUTO_AGING BIT(0) 42 #define SW_HUGE_PACKET BIT(6) 43 #define SW_TX_FLOW_CTRL_DISABLE BIT(5) 44 #define SW_RX_FLOW_CTRL_DISABLE BIT(4) 45 #define SW_CHECK_LENGTH BIT(3) [all …]
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| /kernel/linux/linux-5.10/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net> 22 5. Hardware version 2 25 5.2.1 Parity checking and packet re-synchronization 58 4 allows tracking up to 5 fingers. 114 non-zero value will turn it ON. For hardware version 1 the default is ON. 118 calculating a parity bit for the last 3 bytes of each packet. The driver 145 4 bytes version: (after the arrow is the name given in the Dell-provided driver) 173 --------- 179 echo -n 0x16 > reg_10 183 bit 7 6 5 4 3 2 1 0 [all …]
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| /kernel/linux/linux-6.6/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net> 22 5. Hardware version 2 25 5.2.1 Parity checking and packet re-synchronization 58 4 allows tracking up to 5 fingers. 114 non-zero value will turn it ON. For hardware version 1 the default is ON. 118 calculating a parity bit for the last 3 bytes of each packet. The driver 145 4 bytes version: (after the arrow is the name given in the Dell-provided driver) 173 --------- 179 echo -n 0x16 > reg_10 183 bit 7 6 5 4 3 2 1 0 [all …]
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| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | rk3328_codec.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 37 #define PIN_DIRECTION_MASK BIT(5) 38 #define PIN_DIRECTION_IN (0x0 << 5) 39 #define PIN_DIRECTION_OUT (0x1 << 5) 40 #define DAC_I2S_MODE_MASK BIT(4) 45 #define DAC_I2S_LRP_MASK BIT(7) 48 #define DAC_VDL_MASK GENMASK(6, 5) 49 #define DAC_VDL_16BITS (0x0 << 5) 50 #define DAC_VDL_20BITS (0x1 << 5) 51 #define DAC_VDL_24BITS (0x2 << 5) [all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | rk3328_codec.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 37 #define PIN_DIRECTION_MASK BIT(5) 38 #define PIN_DIRECTION_IN (0x0 << 5) 39 #define PIN_DIRECTION_OUT (0x1 << 5) 40 #define DAC_I2S_MODE_MASK BIT(4) 45 #define DAC_I2S_LRP_MASK BIT(7) 48 #define DAC_VDL_MASK GENMASK(6, 5) 49 #define DAC_VDL_16BITS (0x0 << 5) 50 #define DAC_VDL_20BITS (0x1 << 5) 51 #define DAC_VDL_24BITS (0x2 << 5) [all …]
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| /kernel/linux/linux-6.6/drivers/net/dsa/microchip/ |
| D | ksz8795_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 22 #define KSZ8863_GLOBAL_SOFTWARE_RESET BIT(4) 23 #define KSZ8863_PCS_RESET BIT(0) 27 #define SW_NEW_BACKOFF BIT(7) 28 #define SW_GLOBAL_RESET BIT(6) 29 #define SW_FLUSH_DYN_MAC_TABLE BIT(5) 30 #define SW_FLUSH_STA_MAC_TABLE BIT(4) 31 #define SW_LINK_AUTO_AGING BIT(0) 35 #define SW_HUGE_PACKET BIT(6) 36 #define SW_TX_FLOW_CTRL_DISABLE BIT(5) [all …]
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| D | ksz9477_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Copyright (C) 2017-2024 Microchip Technology Inc. 14 /* 0 - Operation */ 43 #define PME_ENABLE BIT(1) 44 #define PME_POLARITY BIT(0) 48 #define SW_GIGABIT_ABLE BIT(6) 49 #define SW_REDUNDANCY_ABLE BIT(5) 50 #define SW_AVB_ABLE BIT(4) 68 #define SW_QW_ABLE BIT(5) 74 #define LUE_INT BIT(31) [all …]
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| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | tps6594.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ 236 #define TPS6594_BIT_BUCK_EN BIT(0) 237 #define TPS6594_BIT_BUCK_FPWM BIT(1) 238 #define TPS6594_BIT_BUCK_FPWM_MP BIT(2) 239 #define TPS6594_BIT_BUCK_VSEL BIT(3) 240 #define TPS6594_BIT_BUCK_VMON_EN BIT(4) 241 #define TPS6594_BIT_BUCK_PLDN BIT(5) 242 #define TPS6594_BIT_BUCK_RV_SEL BIT(7) 246 #define TPS6594_MASK_BUCK_ILIM GENMASK(5, 3) [all …]
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| D | tps65219.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ 90 #define TPS65219_REG_INT_RV_POS 5 102 #define TPS65219_BUCKS_LDOS_VOUT_VSET_MASK GENMASK(5, 0) 103 #define TPS65219_BUCKS_UV_THR_SEL_MASK BIT(6) 104 #define TPS65219_BUCKS_BW_SEL_MASK BIT(7) 106 #define TPS65219_LDOS_BYP_CONFIG_MASK BIT(LDO_BYP_SHIFT) 107 #define TPS65219_LDOS_LSW_CONFIG_MASK BIT(7) 109 #define TPS65219_ENABLE_BUCK1_EN_MASK BIT(0) 110 #define TPS65219_ENABLE_BUCK2_EN_MASK BIT(1) [all …]
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| D | rohm-bd71815.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 9 * Author: yanglsh@embest-tech.com 32 /* LDO for Low-Power State Retention */ 236 #define BD71815_BUCK_PWM_FIXED BIT(4) 237 #define BD71815_BUCK_SNVS_ON BIT(3) 238 #define BD71815_BUCK_RUN_ON BIT(2) 239 #define BD71815_BUCK_LPSR_ON BIT(1) 240 #define BD71815_BUCK_SUSP_ON BIT(0) 243 #define BD71815_BUCK_DVSSEL BIT(7) 244 #define BD71815_BUCK_STBY_DVS BIT(6) [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/analogix/ |
| D | analogix-i2c-txcommon.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 27 #define SP_REGISTER_PD BIT(7) 28 #define SP_HDCP_PD BIT(5) 29 #define SP_AUDIO_PD BIT(4) 30 #define SP_VIDEO_PD BIT(3) 31 #define SP_LINK_PD BIT(2) 32 #define SP_TOTAL_PD BIT(1) 36 #define SP_MISC_RST BIT(7) 37 #define SP_VIDCAP_RST BIT(6) 38 #define SP_VIDFIF_RST BIT(5) [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/bridge/analogix/ |
| D | analogix-i2c-txcommon.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 27 #define SP_REGISTER_PD BIT(7) 28 #define SP_HDCP_PD BIT(5) 29 #define SP_AUDIO_PD BIT(4) 30 #define SP_VIDEO_PD BIT(3) 31 #define SP_LINK_PD BIT(2) 32 #define SP_TOTAL_PD BIT(1) 36 #define SP_MISC_RST BIT(7) 37 #define SP_VIDCAP_RST BIT(6) 38 #define SP_VIDFIF_RST BIT(5) [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/mcde/ |
| D | mcde_dsi_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0) 9 #define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE BIT(1) 10 #define DSI_MCTL_MAIN_DATA_CTL_VID_EN BIT(2) 11 #define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL BIT(3) 12 #define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL BIT(4) 13 #define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN BIT(5) 14 #define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN BIT(6) 15 #define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN BIT(7) 16 #define DSI_MCTL_MAIN_DATA_CTL_READ_EN BIT(8) [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/mcde/ |
| D | mcde_dsi_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0) 9 #define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE BIT(1) 10 #define DSI_MCTL_MAIN_DATA_CTL_VID_EN BIT(2) 11 #define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL BIT(3) 12 #define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL BIT(4) 13 #define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN BIT(5) 14 #define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN BIT(6) 15 #define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN BIT(7) 16 #define DSI_MCTL_MAIN_DATA_CTL_READ_EN BIT(8) [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpkg.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* Copyright 2013-2015 Freescale Semiconductor Inc. 16 * DPKG_NUM_OF_MASKS - Number of masks per key extraction 21 * DPKG_MAX_NUM_OF_EXTRACTS - Number of extractions per key profile 26 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types 38 * enum dpkg_extract_type - Enumeration for selecting extraction type 41 * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result; 52 * struct dpkg_mask - A structure for defining a single extraction mask 64 #define NH_FLD_ETH_DA BIT(0) 65 #define NH_FLD_ETH_SA BIT(1) [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpkg.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* Copyright 2013-2015 Freescale Semiconductor Inc. 25 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types 37 * enum dpkg_extract_type - Enumeration for selecting extraction type 40 * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result; 51 * struct dpkg_mask - A structure for defining a single extraction mask 63 #define NH_FLD_ETH_DA BIT(0) 64 #define NH_FLD_ETH_SA BIT(1) 65 #define NH_FLD_ETH_LENGTH BIT(2) 66 #define NH_FLD_ETH_TYPE BIT(3) [all …]
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| /kernel/linux/linux-6.6/drivers/platform/x86/intel/pmc/ |
| D | mtl.c | 1 // SPDX-License-Identifier: GPL-2.0 17 * MTL-M SOC-M IOE-M None 18 * MTL-P SOC-M IOE-P None 19 * MTL-S SOC-S IOE-P PCH-S 23 {"PMC", BIT(0)}, 24 {"OPI", BIT(1)}, 25 {"SPI", BIT(2)}, 26 {"XHCI", BIT(3)}, 27 {"SPA", BIT(4)}, 28 {"SPB", BIT(5)}, [all …]
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| /kernel/linux/linux-5.10/include/linux/mfd/da9150/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * DA9150 MFD Driver - Registers 160 #define DA9150_WRITE_MODE_MASK BIT(6) 162 #define DA9150_REVERT_MASK BIT(7) 172 #define DA9150_VFAULT_STAT_MASK BIT(0) 174 #define DA9150_TFAULT_STAT_MASK BIT(1) 178 #define DA9150_VDD33_STAT_MASK BIT(0) 180 #define DA9150_VDD33_SLEEP_MASK BIT(1) 182 #define DA9150_LFOSC_STAT_MASK BIT(7) 186 #define DA9150_GPIOA_STAT_MASK BIT(0) [all …]
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| /kernel/linux/linux-6.6/include/linux/mfd/da9150/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * DA9150 MFD Driver - Registers 160 #define DA9150_WRITE_MODE_MASK BIT(6) 162 #define DA9150_REVERT_MASK BIT(7) 172 #define DA9150_VFAULT_STAT_MASK BIT(0) 174 #define DA9150_TFAULT_STAT_MASK BIT(1) 178 #define DA9150_VDD33_STAT_MASK BIT(0) 180 #define DA9150_VDD33_SLEEP_MASK BIT(1) 182 #define DA9150_LFOSC_STAT_MASK BIT(7) 186 #define DA9150_GPIOA_STAT_MASK BIT(0) [all …]
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| /kernel/linux/linux-6.6/include/linux/soundwire/ |
| D | sdw_registers.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ 2 /* Copyright(c) 2015-17 Intel Corporation. */ 36 #define SDW_DP0_INT_TEST_FAIL BIT(0) 37 #define SDW_DP0_INT_PORT_READY BIT(1) 38 #define SDW_DP0_INT_BRA_FAILURE BIT(2) 39 #define SDW_DP0_SDCA_CASCADE BIT(3) 40 /* BIT(4) not allocated in SoundWire specification 1.2 */ 41 #define SDW_DP0_INT_IMPDEF1 BIT(5) 42 #define SDW_DP0_INT_IMPDEF2 BIT(6) 43 #define SDW_DP0_INT_IMPDEF3 BIT(7) [all …]
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| /kernel/linux/linux-6.6/sound/soc/mediatek/mt8186/ |
| D | mt8186-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 3 * mt8186-reg.h -- Mediatek 8186 audio driver reg definition 12 /* reg bit enum */ 26 #define RESERVED_MASK_SFT BIT(31) 28 #define AHB_IDLE_EN_INT_MASK_SFT BIT(30) 30 #define AHB_IDLE_EN_EXT_MASK_SFT BIT(29) 32 #define PDN_NLE_MASK_SFT BIT(28) 34 #define PDN_TML_MASK_SFT BIT(27) 36 #define PDN_DAC_PREDIS_MASK_SFT BIT(26) 38 #define PDN_DAC_MASK_SFT BIT(25) [all …]
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