Home
last modified time | relevance | path

Searched +full:55 +full:mhz (Results 1 – 25 of 365) sorted by relevance

12345678910>>...15

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/spi/
Dsony-cxd2880.txt6 - spi-max-frequency: Maximum bus speed, should be set to <55000000> (55MHz).
17 spi-max-frequency = <55000000>; /* 55MHz */
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/spi/
Dsony-cxd2880.txt6 - spi-max-frequency: Maximum bus speed, should be set to <55000000> (55MHz).
17 spi-max-frequency = <55000000>; /* 55MHz */
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Dopp2xxx.h123 /* 2420-PRCM III 532MHz core */
124 #define RIII_CLKSEL_L3 (4 << 0) /* 133MHz */
125 #define RIII_CLKSEL_L4 (2 << 5) /* 66.5MHz */
126 #define RIII_CLKSEL_USB (4 << 25) /* 33.25MHz */
131 #define RIII_CLKSEL_MPU (2 << 0) /* 266MHz */
133 #define RIII_CLKSEL_DSP (3 << 0) /* c5x - 177.3MHz */
134 #define RIII_CLKSEL_DSP_IF (2 << 5) /* c5x - 88.67MHz */
136 #define RIII_CLKSEL_IVA (6 << 8) /* iva1 - 88.67MHz */
141 #define RIII_CLKSEL_GFX (2 << 0) /* 66.5MHz */
144 /* 2420-PRCM II 600MHz core */
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Dopp2xxx.h123 /* 2420-PRCM III 532MHz core */
124 #define RIII_CLKSEL_L3 (4 << 0) /* 133MHz */
125 #define RIII_CLKSEL_L4 (2 << 5) /* 66.5MHz */
126 #define RIII_CLKSEL_USB (4 << 25) /* 33.25MHz */
131 #define RIII_CLKSEL_MPU (2 << 0) /* 266MHz */
133 #define RIII_CLKSEL_DSP (3 << 0) /* c5x - 177.3MHz */
134 #define RIII_CLKSEL_DSP_IF (2 << 5) /* c5x - 88.67MHz */
136 #define RIII_CLKSEL_IVA (6 << 8) /* iva1 - 88.67MHz */
141 #define RIII_CLKSEL_GFX (2 << 0) /* 66.5MHz */
144 /* 2420-PRCM II 600MHz core */
[all …]
/kernel/linux/linux-5.10/drivers/media/tuners/
Dqt1010_priv.h22 07 2b set frequency: 32 MHz scale, n*32 MHz
24 09 10 ? changes every 8/24 MHz; values 1d/1c
25 0a 08 set frequency: 4 MHz scale, n*4 MHz
26 0b 41 ? changes every 2/2 MHz; values 45/45
55 28 55 ?
70 #define QT1010_MIN_FREQ (48 * MHz)
71 #define QT1010_MAX_FREQ (860 * MHz)
72 #define QT1010_OFFSET (1246 * MHz)
/kernel/linux/linux-6.6/drivers/media/tuners/
Dqt1010_priv.h22 07 2b set frequency: 32 MHz scale, n*32 MHz
24 09 10 ? changes every 8/24 MHz; values 1d/1c
25 0a 08 set frequency: 4 MHz scale, n*4 MHz
26 0b 41 ? changes every 2/2 MHz; values 45/45
55 28 55 ?
70 #define QT1010_MIN_FREQ (48 * MHz)
71 #define QT1010_MAX_FREQ (860 * MHz)
72 #define QT1010_OFFSET (1246 * MHz)
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
Dmxl692_defs.h295 MXL_EAGLE_OOB_DEMOD_SYMB_RATE_0_772MHZ, /* ANSI/SCTE 55-2 0.772 MHz */
296 MXL_EAGLE_OOB_DEMOD_SYMB_RATE_1_024MHZ, /* ANSI/SCTE 55-1 1.024 MHz */
297 MXL_EAGLE_OOB_DEMOD_SYMB_RATE_1_544MHZ, /* ANSI/SCTE 55-2 1.544 MHz */
Dmxl5xx_defs.h88 MXL_HYDRA_TUNER_ACTIVATE_CMD = 55,
396 MXL_HYDRA_STEP_SIZE_24_XTAL_102_05KHZ, /* 102.05 KHz for 24 MHz XTAL */
397 MXL_HYDRA_STEP_SIZE_24_XTAL_204_10KHZ, /* 204.10 KHz for 24 MHz XTAL */
398 MXL_HYDRA_STEP_SIZE_24_XTAL_306_15KHZ, /* 306.15 KHz for 24 MHz XTAL */
399 MXL_HYDRA_STEP_SIZE_24_XTAL_408_20KHZ, /* 408.20 KHz for 24 MHz XTAL */
401 MXL_HYDRA_STEP_SIZE_27_XTAL_102_05KHZ, /* 102.05 KHz for 27 MHz XTAL */
402 MXL_HYDRA_STEP_SIZE_27_XTAL_204_35KHZ, /* 204.35 KHz for 27 MHz XTAL */
403 MXL_HYDRA_STEP_SIZE_27_XTAL_306_52KHZ, /* 306.52 KHz for 27 MHz XTAL */
404 MXL_HYDRA_STEP_SIZE_27_XTAL_408_69KHZ, /* 408.69 KHz for 27 MHz XTAL */
433 MXL_HYDRA_SEARCH_MAX_OFFSET = 0, /* DMD searches for max freq offset (i.e. 5MHz) */
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dac14xx.dts26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
145 bus-frequency = <80000000>; /* 80 MHz ips bus */
214 at24@55 {
262 54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dac14xx.dts26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
145 bus-frequency = <80000000>; /* 80 MHz ips bus */
214 at24@55 {
262 54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
/kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/fw/api/
Drs.h14 * bandwidths <= 80MHz
16 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz
37 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
38 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
39 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
40 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
41 * @IWL_TLC_MNG_CH_WIDTH_320MHZ: 320MHZ channel
122 * @IWL_TLC_MCS_PER_BW_160: mcs for bw - 160Mhz
123 * @IWL_TLC_MCS_PER_BW_320: mcs for bw - 320Mhz
146 * <nss, channel-width> pair (0 - 80mhz width and below, 1 - 160mhz).
[all …]
/kernel/linux/linux-6.6/drivers/ata/
Dpata_hpt37x.c146 55,
595 * @freq: Reported frequency in MHz
598 * and 3 for 66Mhz)
604 return 0; /* 33Mhz slot */ in hpt37x_clock_slot()
606 return 1; /* 40Mhz slot */ in hpt37x_clock_slot()
607 if (freq < 55) in hpt37x_clock_slot()
608 return 2; /* 50Mhz slot */ in hpt37x_clock_slot()
609 return 3; /* 60Mhz slot */ in hpt37x_clock_slot()
688 freq = (fcnt * base) / 192; /* in MHz */ in hpt37x_pci_clock()
695 if (freq < 55) in hpt37x_pci_clock()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/fw/api/
Drs.h70 * bandwidths <= 80MHz
72 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz
91 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
92 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
93 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
94 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
191 * pair (0 - 80mhz width and below, 1 - 160mhz).
301 IWL_RATE_5M_PLCP = 55,
357 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
402 * 55) 5.5 Mbps
[all …]
/kernel/linux/linux-5.10/drivers/staging/vt6655/
Drf.c57 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
58 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
59 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
60 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
61 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
62 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
63 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
64 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
65 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
66 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-mmp/
Dpxa168.c63 /* system timer - clock enabled, 3.25MHz */
71 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running in pxa168_timer_init()
75 /* 3.25MHz, bus/functional clock enabled, release reset */ in pxa168_timer_init()
103 PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmarvell,xenon-sdhci.txt82 Only available when bus frequency lower than 55MHz in SDR mode.
128 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>
164 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>
/kernel/linux/linux-5.10/drivers/net/wireless/ath/wcn36xx/
Dtxrx.c45 { 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
51 { 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
128 /* 11ac 20 MHz 800ns GI MCS 0-8 */
150 /* 11ac 20 MHz 400ns SGI MCS 6-8 */
160 /* 11ac 40 MHz 800ns GI MCS 0-9 */
181 /* 11ac 40 MHz 400ns SGI MCS 5-7 */
189 /* 11ac 40 MHz 400ns SGI MCS 5-7 */
196 /* 11ac 80 MHz 800ns GI MCS 0-7 */
209 /* 11ac 80 MHz 800 ns GI MCS 8-9 */
222 /* 11ac 80 MHz 400 ns SGI MCS 6-7 */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dst,nomadik.txt18 i.e. the driver output for the main (~19.2 MHz) chrystal,
96 (55 RESERVED)
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dst,nomadik.txt18 i.e. the driver output for the main (~19.2 MHz) chrystal,
96 (55 RESERVED)
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dam3517.dtsi36 * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx
37 * appear to operate at 300MHz as well. Since AM3517 only
99 dmas = <&sdma 55 &sdma 54>;
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dmxl5xx_defs.h92 MXL_HYDRA_TUNER_ACTIVATE_CMD = 55,
400 MXL_HYDRA_STEP_SIZE_24_XTAL_102_05KHZ, /* 102.05 KHz for 24 MHz XTAL */
401 MXL_HYDRA_STEP_SIZE_24_XTAL_204_10KHZ, /* 204.10 KHz for 24 MHz XTAL */
402 MXL_HYDRA_STEP_SIZE_24_XTAL_306_15KHZ, /* 306.15 KHz for 24 MHz XTAL */
403 MXL_HYDRA_STEP_SIZE_24_XTAL_408_20KHZ, /* 408.20 KHz for 24 MHz XTAL */
405 MXL_HYDRA_STEP_SIZE_27_XTAL_102_05KHZ, /* 102.05 KHz for 27 MHz XTAL */
406 MXL_HYDRA_STEP_SIZE_27_XTAL_204_35KHZ, /* 204.35 KHz for 27 MHz XTAL */
407 MXL_HYDRA_STEP_SIZE_27_XTAL_306_52KHZ, /* 306.52 KHz for 27 MHz XTAL */
408 MXL_HYDRA_STEP_SIZE_27_XTAL_408_69KHZ, /* 408.69 KHz for 27 MHz XTAL */
437 MXL_HYDRA_SEARCH_MAX_OFFSET = 0, /* DMD searches for max freq offset (i.e. 5MHz) */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dmarvell,xenon-sdhci.yaml124 Only available when bus frequency lower than 55MHz in SDR mode.
227 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
269 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Dam3517.dtsi33 * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx
34 * appear to operate at 300MHz as well. Since AM3517 only
120 dmas = <&sdma 55 &sdma 54>;
/kernel/linux/linux-6.6/drivers/net/wireless/ath/wcn36xx/
Dtxrx.c51 { 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
57 { 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
134 /* 11ac 20 MHz 800ns GI MCS 0-8 */
156 /* 11ac 20 MHz 400ns SGI MCS 6-8 */
166 /* 11ac 40 MHz 800ns GI MCS 0-9 */
187 /* 11ac 40 MHz 400ns SGI MCS 5-7 */
195 /* 11ac 40 MHz 400ns SGI MCS 5-7 */
202 /* 11ac 80 MHz 800ns GI MCS 0-7 */
215 /* 11ac 80 MHz 800 ns GI MCS 8-9 */
228 /* 11ac 80 MHz 400 ns SGI MCS 6-7 */
[all …]
/kernel/linux/linux-6.6/drivers/usb/dwc3/
Ddwc3-octeon.c49 * [55:53] = modules -1
52 # define USBDRD_UCTL_CTL_SSC_REF_CLK_SEL GENMASK_ULL(55, 47)
54 * 0x19 = 100MHz on DLMC_REF_CLK* if REF_CLK_SEL = 0x0 or 0x1
55 * 0x28 = 125MHz on DLMC_REF_CLK* if REF_CLK_SEL = 0x0 or 0x1
56 * 0x32 = 50MHz on DLMC_REF_CLK* if REF_CLK_SEL = 0x0 or 0x1
68 * 0x1 = DLMC_REF_CLK* is 125MHz

12345678910>>...15