| /kernel/linux/linux-6.6/arch/alpha/lib/ |
| D | ev6-memset.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
53 and $17,255,$1 # E : 00000000000000ch
[all …]
|
| D | ev6-csum_ipv6_magic.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-csum_ipv6_magic.S
4 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
15 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
17 * E - either cluster
18 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
19 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
32 * Then turn it back into a sign extended 32-bit item
35 * Swap <len> (an unsigned int) using Mike Burrows' 7-instruction sequence
36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence)
[all …]
|
| D | ev6-memcpy.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memcpy.S
4 * 21264 version by Rick Gorton <rick.gorton@alpha-processor.com>
8 * - memory accessed as aligned quadwords only
9 * - uses bcmpge to compare 8 bytes in parallel
14 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
16 * E - either cluster
17 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
18 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
21 * $1,$2, - scratch
[all …]
|
| /kernel/linux/linux-5.10/arch/alpha/lib/ |
| D | ev6-memset.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
53 and $17,255,$1 # E : 00000000000000ch
[all …]
|
| D | ev6-csum_ipv6_magic.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-csum_ipv6_magic.S
4 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
15 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
17 * E - either cluster
18 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
19 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
32 * Then turn it back into a sign extended 32-bit item
35 * Swap <len> (an unsigned int) using Mike Burrows' 7-instruction sequence
36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence)
[all …]
|
| D | ev6-memcpy.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memcpy.S
4 * 21264 version by Rick Gorton <rick.gorton@alpha-processor.com>
8 * - memory accessed as aligned quadwords only
9 * - uses bcmpge to compare 8 bytes in parallel
14 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
16 * E - either cluster
17 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
18 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
21 * $1,$2, - scratch
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/crypto/ |
| D | aes-tab-4k.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 * instructions. E.g. evldw, evlwwsplat, ...
16 * For the safety-conscious it has to be noted that they might be vulnerable
19 * This is a quite good tradeoff for low power devices (e.g. routers) without
32 /* encryption table, same as crypto_ft_tab in crypto/aes-generic.c */
33 .long R(c6, 63, 63, a5), R(f8, 7c, 7c, 84)
34 .long R(ee, 77, 77, 99), R(f6, 7b, 7b, 8d)
35 .long R(ff, f2, f2, 0d), R(d6, 6b, 6b, bd)
36 .long R(de, 6f, 6f, b1), R(91, c5, c5, 54)
38 .long R(ce, 67, 67, a9), R(56, 2b, 2b, 7d)
[all …]
|
| /kernel/linux/linux-6.6/arch/powerpc/crypto/ |
| D | aes-tab-4k.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 * instructions. E.g. evldw, evlwwsplat, ...
16 * For the safety-conscious it has to be noted that they might be vulnerable
19 * This is a quite good tradeoff for low power devices (e.g. routers) without
32 /* encryption table, same as crypto_ft_tab in crypto/aes-generic.c */
33 .long R(c6, 63, 63, a5), R(f8, 7c, 7c, 84)
34 .long R(ee, 77, 77, 99), R(f6, 7b, 7b, 8d)
35 .long R(ff, f2, f2, 0d), R(d6, 6b, 6b, bd)
36 .long R(de, 6f, 6f, b1), R(91, c5, c5, 54)
38 .long R(ce, 67, 67, a9), R(56, 2b, 2b, 7d)
[all …]
|
| /kernel/linux/linux-5.10/arch/m68k/fpsp040/ |
| D | tbldo.S | 10 | index with a 10-bit index, with the first
11 | 7 bits the opcode, and the remaining 3
46 | instruction ;opcode-stag Notes
49 .long smovcr |$00-0 fmovecr all
50 .long smovcr |$00-1 fmovecr all
51 .long smovcr |$00-2 fmovecr all
52 .long smovcr |$00-3 fmovecr all
53 .long smovcr |$00-4 fmovecr all
54 .long smovcr |$00-5 fmovecr all
55 .long smovcr |$00-6 fmovecr all
[all …]
|
| /kernel/linux/linux-6.6/arch/m68k/fpsp040/ |
| D | tbldo.S | 10 | index with a 10-bit index, with the first
11 | 7 bits the opcode, and the remaining 3
46 | instruction ;opcode-stag Notes
49 .long smovcr |$00-0 fmovecr all
50 .long smovcr |$00-1 fmovecr all
51 .long smovcr |$00-2 fmovecr all
52 .long smovcr |$00-3 fmovecr all
53 .long smovcr |$00-4 fmovecr all
54 .long smovcr |$00-5 fmovecr all
55 .long smovcr |$00-6 fmovecr all
[all …]
|
| /kernel/linux/linux-6.6/Documentation/driver-api/media/drivers/ccs/ |
| D | ccs-regs.asc | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
23 - e GRBG 0
24 - e RGGB 1
25 - e BGGR 2
[all …]
|
| /kernel/linux/linux-6.6/arch/mips/include/asm/ |
| D | pgtable-32.h | 19 #include <asm-generic/pgtable-nopmd.h>
26 * Regarding 32-bit MIPS huge page support (and the tradeoff it entails):
28 * We use the same huge page sizes as 64-bit MIPS. Assuming a 4KB page size,
29 * our 2-level table layout would normally have a PGD entry cover a contiguous
30 * 4MB virtual address region (pointing to a 4KB PTE page of 1,024 32-bit pte_t
37 * increases to match 64-bit MIPS, but PTE lookups remain CPU cache-friendly.
39 * NOTE: We don't yet support huge pages if extended-addressing is enabled
40 * (i.e. EVA, XPA, 36-bit Alchemy/Netlogic).
46 * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
56 * Basically we have the same two-level (which is the logical three level
[all …]
|
| /kernel/linux/linux-6.6/Documentation/gpu/amdgpu/display/ |
| D | pipeline_4k_no_split.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
17 inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)"
31 …style="fill:#aa00d4;fill-opacity:1;fill-rule:evenodd;stroke:#aa00d4;stroke-width:0.625;stroke-line…
32 …d="M 8.7185878,4.0337352 -2.2072895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354…
33 transform="scale(-0.6)"
34 inkscape:connector-curvature="0" />
46 …style="fill:#ff0000;fill-opacity:1;fill-rule:evenodd;stroke:#ff0000;stroke-width:0.625;stroke-line…
[all …]
|
| D | pipeline_4k_split.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
17 inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)"
31 …style="fill:#aa00d4;fill-opacity:1;fill-rule:evenodd;stroke:#aa00d4;stroke-width:0.625;stroke-line…
32 …d="M 8.7185878,4.0337352 -2.2072895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354…
33 transform="scale(-0.6)"
34 inkscape:connector-curvature="0" />
46 …style="fill:#ff0000;fill-opacity:1;fill-rule:evenodd;stroke:#ff0000;stroke-width:0.625;stroke-line…
[all …]
|
| /kernel/linux/linux-6.6/Documentation/networking/device_drivers/can/ctu/ |
| D | fsm_txt_buffer_user.svg | 1 <?xml version="1.0" encoding="UTF-8"?>
2 …mlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#">
5 …-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1.73544 5.61745-6e-7 8.0…
8 …-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1.73544 5.61745-6e-7 8.0…
11 …-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1.73544 5.61745-6e-7 8.0…
14 …-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1.73544 5.61745-6e-7 8.0…
17 …-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1.73544 5.61745-6e-7 8.0…
20 …-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1.73544 5.61745-6e-7 8.0…
23 …6) rotate(180) translate(0)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1…
26 …6) rotate(180) translate(0)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1…
[all …]
|
| /kernel/linux/linux-5.10/arch/x86/crypto/ |
| D | sha256-avx-asm.S | 2 # Implement fast SHA-256 with AVX1 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
40 # This code is described in an Intel White-Paper:
41 # "Fast SHA-256 Implementations on Intel Architecture Processors"
58 # Add reg to mem using reg-mem add and store
66 shld $(32-(\p1)), \p2, \p2
93 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
94 SHUF_DC00 = %xmm12 # shuffle xDxC -> DC00
104 e = %edx define
[all …]
|
| D | sha256-ssse3-asm.S | 2 # Implement fast SHA-256 with SSSE3 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
57 # Add reg to mem using reg-mem add and store
86 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
87 SHUF_DC00 = %xmm11 # shuffle xDxC -> DC00
97 e = %edx define
139 f = e
[all …]
|
| /kernel/linux/linux-6.6/arch/x86/crypto/ |
| D | sha256-avx-asm.S | 2 # Implement fast SHA-256 with AVX1 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
40 # This code is described in an Intel White-Paper:
41 # "Fast SHA-256 Implementations on Intel Architecture Processors"
59 # Add reg to mem using reg-mem add and store
67 shld $(32-(\p1)), \p2, \p2
94 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
95 SHUF_DC00 = %xmm12 # shuffle xDxC -> DC00
105 e = %edx define
[all …]
|
| D | sha256-ssse3-asm.S | 2 # Implement fast SHA-256 with SSSE3 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
58 # Add reg to mem using reg-mem add and store
87 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
88 SHUF_DC00 = %xmm11 # shuffle xDxC -> DC00
98 e = %edx define
140 f = e
[all …]
|
| /kernel/linux/linux-5.10/Documentation/i2c/ |
| D | i2c_bus.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 inkscape:version="0.92.3 (2405546, 2018-03-11)"
30 inkscape:connector-curvature="0"
32 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
33 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
47 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
48 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
[all …]
|
| /kernel/linux/linux-6.6/Documentation/i2c/ |
| D | i2c_bus.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 inkscape:version="0.92.3 (2405546, 2018-03-11)"
30 inkscape:connector-curvature="0"
32 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
33 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
47 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
48 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | stm32mp15-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_ain_pins_a: adc1-ain-0 {
20 adc1_in6_pins_a: adc1-in6-0 {
26 adc12_ain_pins_a: adc12-ain-0 {
35 adc12_ain_pins_b: adc12-ain-1 {
42 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
49 cec_pins_a: cec-0 {
52 bias-disable;
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ |
| D | mapfile.csv | 1 Family-model,Version,Filename,EventType
2 GenuineIntel-6-56,v5,broadwellde,core
3 GenuineIntel-6-3D,v17,broadwell,core
4 GenuineIntel-6-47,v17,broadwell,core
5 GenuineIntel-6-4F,v10,broadwellx,core
6 GenuineIntel-6-1C,v4,bonnell,core
7 GenuineIntel-6-26,v4,bonnell,core
8 GenuineIntel-6-27,v4,bonnell,core
9 GenuineIntel-6-36,v4,bonnell,core
10 GenuineIntel-6-35,v4,bonnell,core
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/crypto/ |
| D | sha256-core.S_shipped | 1 @ SPDX-License-Identifier: GPL-2.0
20 @ Performance is ~2x better than gcc 3.4 generated code and in "abso-
21 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
22 @ byte [on single-issue Xscale PXA250 core].
26 @ Rescheduling for dual-issue pipeline resulted in 22% improvement on
31 @ Profiler-assisted and platform-specific optimization resulted in 16%
37 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
38 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
39 @ code (meaning that latter performs sub-optimally, nothing was done
50 # define __ARM_MAX_ARCH__ 7
[all …]
|
| /kernel/linux/linux-6.6/arch/x86/include/asm/ |
| D | pgtable-3level.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Intel Physical Address Extension (PAE) Mode - three-level page
12 #define pte_ERROR(e) \ argument
14 __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
15 #define pmd_ERROR(e) \ argument
17 __FILE__, __LINE__, &(e), pmd_val(e))
18 #define pgd_ERROR(e) \ argument
20 __FILE__, __LINE__, &(e), pgd_val(e))
34 * value and then use set_pte to update it. -ben
38 WRITE_ONCE(ptep->pte_high, pte.pte_high); in native_set_pte()
[all …]
|
![[all …]](/OpenHarmony-v6.0-Release/more/kernel/linux/linux-6.6/Documentation/gpu/amdgpu/display/pipeline_4k_no_split.svg?full=6e%5C-7){kind=link}
![[all …]](/OpenHarmony-v6.0-Release/more/kernel/linux/linux-6.6/Documentation/gpu/amdgpu/display/pipeline_4k_split.svg?full=6e%5C-7){kind=link}
![[all …]](/OpenHarmony-v6.0-Release/more/kernel/linux/linux-6.6/Documentation/networking/device_drivers/can/ctu/fsm_txt_buffer_user.svg?full=6e%5C-7){kind=link}
![[all …]](/OpenHarmony-v6.0-Release/more/kernel/linux/linux-5.10/Documentation/i2c/i2c_bus.svg?full=6e%5C-7){kind=link}
![[all …]](/OpenHarmony-v6.0-Release/more/kernel/linux/linux-6.6/Documentation/i2c/i2c_bus.svg?full=6e%5C-7){kind=link}