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/kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/
Dpixfmt-rgb.rst9 These formats encode each pixel as a triplet of RGB values. They are packed
12 bits required to store a pixel is not aligned to a byte boundary, the data is
20 or a permutation thereof, collectively referred to as alpha formats) depend on
24 a meaningful value. Otherwise, when the device doesn't capture an alpha channel
25 but can set the alpha bit to a user-configurable value, the
28 the value specified by that control. Otherwise a corresponding format without
34 filled with meaningful values by applications. Otherwise a corresponding format
38 Formats that contain padding bits are named XRGB (or a permutation thereof).
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
46 respectively. 'a' denotes bits of the alpha component (if supported by the
[all …]
Dpixfmt-packed-yuv.rst15 - In all the tables that follow, bit 7 is the most significant bit in a byte.
17 'U') and red chroma (also known as 'V') components respectively. 'A'
25 These formats do not subsample the chroma components and store each pixels as a
30 seen in a 16-bit word, which is then stored in memory in little endian byte
32 format stores a pixel in a 16-bit word [15:0] laid out at as [Y'\ :sub:`4-0`
51 - :cspan:`7` Byte 0 in memory
53 - :cspan:`7` Byte 1
57 - 7
66 - 7
89 - a\ :sub:`3`
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/kernel/linux/linux-6.6/sound/usb/caiaq/
Dcontrol.c181 { "LED 7seg_1b", 8 },
182 { "LED 7seg_1c", 9 },
183 { "LED 7seg_2a", 10 },
184 { "LED 7seg_2b", 11 },
185 { "LED 7seg_2c", 12 },
186 { "LED 7seg_2d", 13 },
187 { "LED 7seg_2e", 14 },
188 { "LED 7seg_2f", 15 },
189 { "LED 7seg_2g", 16 },
190 { "LED 7seg_3a", 17 },
[all …]
/kernel/linux/linux-5.10/sound/usb/caiaq/
Dcontrol.c181 { "LED 7seg_1b", 8 },
182 { "LED 7seg_1c", 9 },
183 { "LED 7seg_2a", 10 },
184 { "LED 7seg_2b", 11 },
185 { "LED 7seg_2c", 12 },
186 { "LED 7seg_2d", 13 },
187 { "LED 7seg_2e", 14 },
188 { "LED 7seg_2f", 15 },
189 { "LED 7seg_2g", 16 },
190 { "LED 7seg_3a", 17 },
[all …]
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dpixfmt-packed-yuv.rst33 - :cspan:`7` Byte 0 in memory
35 - :cspan:`7` Byte 1
37 - :cspan:`7` Byte 2
39 - :cspan:`7` Byte 3
43 - 7
52 - 7
61 - 7
70 - 7
93 - a\ :sub:`3`
94 - a\ :sub:`2`
[all …]
Dpixfmt-rgb.rst14 These are all packed-pixel formats, meaning all the data for a pixel lie
32 - :cspan:`7` Byte 0 in memory
33 - :cspan:`7` Byte 1
34 - :cspan:`7` Byte 2
35 - :cspan:`7` Byte 3
38 - 7
47 - 7
56 - 7
65 - 7
101 - a\ :sub:`3`
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/skylake/
Dvirtual-memory.json3 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
10 "CounterHTOff": "0,1,2,3,4,5,6,7"
13 …sed in the TLB and were mapped to 4K pages. The page walks can end with or without a page fault.",
19 "BriefDescription": "Page walk completed due to a demand data load to a 4K page",
20 "CounterHTOff": "0,1,2,3,4,5,6,7"
23 … in the TLB and were mapped to 2M/4M pages. The page walks can end with or without a page fault.",
29 "BriefDescription": "Page walk completed due to a demand data load to a 2M/4M page",
30 "CounterHTOff": "0,1,2,3,4,5,6,7"
33 …sed in the TLB and were mapped to 4K pages. The page walks can end with or without a page fault.",
39 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
[all …]
Dpipeline.json3a designated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable …
12a halt state. The thread enters the halt state when it is running the HLT instruction. This event …
30a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT i…
39a. preceding store conflicts with the load (incomplete overlap),b. store forwarding is impossible …
46 "CounterHTOff": "0,1,2,3,4,5,6,7"
56 "CounterHTOff": "0,1,2,3,4,5,6,7"
66 "CounterHTOff": "0,1,2,3,4,5,6,7"
76 "CounterHTOff": "0,1,2,3,4,5,6,7"
86 "CounterHTOff": "0,1,2,3,4,5,6,7"
95 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/cascadelakex/
Dvirtual-memory.json3 "BriefDescription": "Page walk completed due to a demand data store to a 2M/4M page",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
8 … in the TLB and were mapped to 2M/4M pages. The page walks can end with or without a page fault.",
13 …"BriefDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for an instruct…
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
18 …on": "Counts 1 per cycle for each PMH (Page Miss Handler) that is busy with a page walk for an ins…
23 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
28 …e sizes) caused by a code fetch. This implies it missed in the ITLB and further levels of TLB. The…
35 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/skylakex/
Dvirtual-memory.json5 "CounterHTOff": "0,1,2,3,4,5,6,7",
14 "CounterHTOff": "0,1,2,3,4,5,6,7",
17 …"PublicDescription": "Counts demand data stores that caused a page walk of any page size (4K/2M/4M…
22 "BriefDescription": "Page walk completed due to a demand data store to a 2M/4M page",
24 "CounterHTOff": "0,1,2,3,4,5,6,7",
27 … in the TLB and were mapped to 2M/4M pages. The page walks can end with or without a page fault.",
32 …"BriefDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for an instruct…
34 "CounterHTOff": "0,1,2,3,4,5,6,7",
37 …on": "Counts 1 per cycle for each PMH (Page Miss Handler) that is busy with a page walk for an ins…
42 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/icelake/
Dpipeline.json4 …ANY is counted by a designated fixed counter freeing up programmable counters to count other event…
15 …"PublicDescription": "A version of INST_RETIRED that allows for a more unbiased distribution of sa…
21 …"BriefDescription": "Precise instruction retired event with a reduced effect of PEBS shadow in IP …
25a halt state. The thread enters the halt state when it is running the HLT instruction. This event …
35a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT i…
45a. preceding store conflicts with the load (incomplete overlap),b. store forwarding is impossible …
67 …"PublicDescription": "Counts the number of times a load got blocked due to false dependencies in M…
80 "Counter": "0,1,2,3,4,5,6,7",
82 "PEBScounters": "0,1,2,3,4,5,6,7",
89 …ription": "Counts cycles the Backend cluster is recovering after a miss-speculation or a Store Buf…
[all …]
Dmemory.json4 "PublicDescription": "Counts the number of times a TSX line had a cache conflict.",
11 …"BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on
15 …nts the number Transactional Synchronization Extensions (TSX) Aborts due to a data capacity limita…
22 …"BriefDescription": "Speculatively counts the number TSX Aborts due to a data capacity limitation …
26 …"PublicDescription": "Counts the number of times a TSX Abort was triggered due to a non-release/co…
33 …"BriefDescription": "Number of times a HLE transactional region aborted due to a non XRELEASE pref…
37 …"PublicDescription": "Counts the number of times a TSX Abort was triggered due to commit but Lock …
48 …"PublicDescription": "Counts the number of times a TSX Abort was triggered due to release/commit b…
59 …"PublicDescription": "Counts the number of times a TSX Abort was triggered due to attempting an un…
81 "PublicDescription": "Counts Unfriendly TSX abort triggered by a vzeroupper instruction.",
[all …]
Dfrontend.json110 …n": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The leg…
117 "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss."
143 …"PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag …
150 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss."
154 …ipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",
156 "Counter": "0,1,2,3,4,5,6,7",
158 "PEBScounters": "0,1,2,3,4,5,6,7",
165 …ipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",
167 "Counter": "0,1,2,3,4,5,6,7",
169 "PEBScounters": "0,1,2,3,4,5,6,7",
[all …]
/kernel/linux/linux-6.6/Documentation/i2c/
Di2c-sysfs.rst13 is a gap of knowledge to map from the I2C bus physical number and MUX topology
24 People who need to use Linux shell to interact with I2C subsystem on a system
40 There is a list of symbolic links under that directory. The links that
52 on bus 2 address 0x49 bound with a kernel driver.
73 For each physical I2C bus controller, the system vendor may assign a physical
80 Every I2C bus number you see in Linux I2C Sysfs is a logical I2C bus with a
84 Each logical I2C bus may be an abstraction of a physical I2C bus controller, or
85 an abstraction of a channel behind an I2C MUX. In case it is an abstraction of a
86 MUX channel, whenever we access an I2C device via a such logical bus, the kernel
93 If the logical I2C bus is a direct abstraction of a physical I2C bus controller,
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/kernel/linux/linux-5.10/Documentation/input/devices/
Delantech.rst33 7. Hardware version 4
57 combine a status packet with multiple head or motion packets. Hardware version
60 Some Hardware version 3 and version 4 also have a trackpoint which uses a
67 Note that a mouse button is also associated with either the touchpad or the
68 trackpoint when a trackpoint is available. Disabling the Touchpad in xorg
101 Currently a value of "1" will turn on some basic debugging and a value of
107 generate quite a lot of data!
118 calculating a parity bit for the last 3 bytes of each packet. The driver
175 By echoing a hexadecimal value to a register it contents can be altered.
183 bit 7 6 5 4 3 2 1 0
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/kernel/linux/linux-6.6/Documentation/input/devices/
Delantech.rst33 7. Hardware version 4
57 combine a status packet with multiple head or motion packets. Hardware version
60 Some Hardware version 3 and version 4 also have a trackpoint which uses a
67 Note that a mouse button is also associated with either the touchpad or the
68 trackpoint when a trackpoint is available. Disabling the Touchpad in xorg
101 Currently a value of "1" will turn on some basic debugging and a value of
107 generate quite a lot of data!
118 calculating a parity bit for the last 3 bytes of each packet. The driver
175 By echoing a hexadecimal value to a register it contents can be altered.
183 bit 7 6 5 4 3 2 1 0
[all …]
/kernel/linux/patches/linux-5.10/yangfan_patch/
Dkernel.patch1 diff --git a/kernel/bpf/syscall.c b/kernel/bpf/syscall.c
3 --- a/kernel/bpf/syscall.c
55 @@ -664,7 +655,7 @@ static int bpf_map_mmap(struct file *filp, struct vm_area_struct *vma)
64 @@ -1096,7 +1087,6 @@ static int map_update_elem(union bpf_attr *attr)
72 @@ -1138,7 +1128,6 @@ static int map_update_elem(union bpf_attr *attr)
80 @@ -1161,7 +1150,6 @@ static int map_delete_elem(union bpf_attr *attr)
88 @@ -1192,7 +1180,6 @@ static int map_delete_elem(union bpf_attr *attr)
96 @@ -1497,7 +1484,6 @@ static int map_lookup_and_delete_elem(union bpf_attr *attr)
104 @@ -1539,7 +1525,6 @@ static int map_lookup_and_delete_elem(union bpf_attr *attr)
112 @@ -1566,7 +1551,8 @@ static int map_freeze(const union bpf_attr *attr)
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellde/
Dvirtual-memory.json11 "CounterHTOff": "0,1,2,3,4,5,6,7"
16 …: "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that compl…
20 … misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can end …
22 "CounterHTOff": "0,1,2,3,4,5,6,7"
27 …: "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that compl…
31 …ses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk can …
33 "CounterHTOff": "0,1,2,3,4,5,6,7"
38 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
42 …misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can end …
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwell/
Dvirtual-memory.json11 "CounterHTOff": "0,1,2,3,4,5,6,7"
14 … misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can end …
21 …: "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that compl…
22 "CounterHTOff": "0,1,2,3,4,5,6,7"
25 …ses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk can …
32 …: "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that compl…
33 "CounterHTOff": "0,1,2,3,4,5,6,7"
36 …misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can end …
43 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellx/
Dvirtual-memory.json11 "CounterHTOff": "0,1,2,3,4,5,6,7"
16 …: "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that compl…
20 … misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can end …
22 "CounterHTOff": "0,1,2,3,4,5,6,7"
27 …: "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that compl…
31 …ses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk can …
33 "CounterHTOff": "0,1,2,3,4,5,6,7"
38 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
42 …misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can end …
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
/kernel/linux/linux-5.10/Documentation/core-api/
Dpacking.rst10 One can memory-map a pointer to a carefully crafted struct over the hardware
20 A more robust alternative to struct field definitions would be to extract the
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
44 perspective, bit 63 always means bit offset 7 of byte 7, albeit only
47 The following examples cover the memory layout of a packed u64 field.
48 The byte offsets in the packed buffer are always implicitly 0, 1, ... 7.
56 7 6 5 4
57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[all …]
/kernel/linux/linux-6.6/Documentation/core-api/
Dpacking.rst10 One can memory-map a pointer to a carefully crafted struct over the hardware
20 A more robust alternative to struct field definitions would be to extract the
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
44 perspective, bit 63 always means bit offset 7 of byte 7, albeit only
47 The following examples cover the memory layout of a packed u64 field.
48 The byte offsets in the packed buffer are always implicitly 0, 1, ... 7.
56 7 6 5 4
57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[all …]
/kernel/linux/linux-5.10/arch/m68k/fpsp040/
Dtbldo.S10 | index with a 10-bit index, with the first
11 | 7 bits the opcode, and the remaining 3
56 .long smovcr |$00-7 fmovecr all
65 .long serror |$01-7 fint ERROR
74 .long serror |$02-7 fsinh ERROR
83 .long serror |$03-7 fintrz ERROR
92 .long serror |$04-7 ERROR - illegal extension
101 .long serror |$05-7 ERROR - illegal extension
110 .long serror |$06-7 flognp1 ERROR
119 .long serror |$07-7 ERROR - illegal extension
[all …]
/kernel/linux/linux-6.6/arch/m68k/fpsp040/
Dtbldo.S10 | index with a 10-bit index, with the first
11 | 7 bits the opcode, and the remaining 3
56 .long smovcr |$00-7 fmovecr all
65 .long serror |$01-7 fint ERROR
74 .long serror |$02-7 fsinh ERROR
83 .long serror |$03-7 fintrz ERROR
92 .long serror |$04-7 ERROR - illegal extension
101 .long serror |$05-7 ERROR - illegal extension
110 .long serror |$06-7 flognp1 ERROR
119 .long serror |$07-7 ERROR - illegal extension
[all …]
/kernel/linux/linux-5.10/arch/powerpc/crypto/
Daes-tab-4k.S10 * crypto/aes_generic.c and are designed to be simply accessed by a combination
11 * of rlwimi/lwz instructions with a minimum of table registers (usually only
19 * This is a quite good tradeoff for low power devices (e.g. routers) without
25 #define R(a, b, c, d) \ argument
26 0x##a##b##c##d, 0x##d##a##b##c, 0x##c##d##a##b, 0x##b##c##d##a
33 .long R(c6, 63, 63, a5), R(f8, 7c, 7c, 84)
34 .long R(ee, 77, 77, 99), R(f6, 7b, 7b, 8d)
38 .long R(ce, 67, 67, a9), R(56, 2b, 2b, 7d)
40 .long R(4d, ab, ab, e6), R(ec, 76, 76, 9a)
42 .long R(89, c9, c9, 40), R(fa, 7d, 7d, 87)
[all …]

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