Home
last modified time | relevance | path

Searched +full:8 +full:mb (Results 1 – 25 of 1160) sorted by relevance

12345678910>>...47

/kernel/linux/linux-5.10/arch/parisc/include/asm/
Dassembly.h17 #define LDREGM ldd,mb
26 #define REG_SZ 8
112 addib,NUV,n -1,1,.+8
231 fstd,ma %fr0, 8(\regs)
232 fstd,ma %fr1, 8(\regs)
233 fstd,ma %fr2, 8(\regs)
234 fstd,ma %fr3, 8(\regs)
235 fstd,ma %fr4, 8(\regs)
236 fstd,ma %fr5, 8(\regs)
237 fstd,ma %fr6, 8(\regs)
[all …]
/kernel/linux/linux-6.6/arch/parisc/include/asm/
Dassembly.h16 #define REG_SZ 8
62 #define LDREGM ldd,mb
128 addib,NUV,n -1,1,.+8
278 fstd,ma %fr0, 8(\regs)
279 fstd,ma %fr1, 8(\regs)
280 fstd,ma %fr2, 8(\regs)
281 fstd,ma %fr3, 8(\regs)
282 fstd,ma %fr4, 8(\regs)
283 fstd,ma %fr5, 8(\regs)
284 fstd,ma %fr6, 8(\regs)
[all …]
/kernel/linux/linux-6.6/drivers/mailbox/
Drockchip-mailbox.c17 #define MAILBOX_A2B_CMD(x) (0x08 + (x) * 8)
18 #define MAILBOX_A2B_DAT(x) (0x0c + (x) * 8)
22 #define MAILBOX_B2A_CMD(x) (0x30 + (x) * 8)
23 #define MAILBOX_B2A_DAT(x) (0x34 + (x) * 8)
38 struct rockchip_mbox *mb; member
54 struct rockchip_mbox *mb = dev_get_drvdata(chan->mbox->dev); in rockchip_mbox_send_data() local
56 struct rockchip_mbox_chan *chans = mb->chans; in rockchip_mbox_send_data()
61 if (msg->rx_size > mb->buf_size) { in rockchip_mbox_send_data()
62 dev_err(mb->mbox.dev, "Transmit size over buf size(%d)\n", in rockchip_mbox_send_data()
63 mb->buf_size); in rockchip_mbox_send_data()
[all …]
/kernel/linux/linux-5.10/arch/alpha/kernel/
Dcore_apecs.c31 * NOTE: Herein lie back-to-back mb instructions. They are magic.
60 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
66 * 10:8 Function number
72 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
78 * 23:16 bus number (8 bits = 128 possible buses)
80 * 10:8 function number
115 addr = (device_fn << 8) | (where); in mk_conf_addr()
119 addr = (bus << 16) | (device_fn << 8) | (where); in mk_conf_addr()
140 mb(); in conf_read()
146 mb(); in conf_read()
[all …]
Dcore_mcpcia.c27 * NOTE: Herein lie back-to-back mb instructions. They are magic.
54 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
60 * 10:8 Function number
66 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
72 * 23:16 bus number (8 bits = 128 possible buses)
74 * 10:8 function number
104 mb(); in conf_read()
108 mb(); in conf_read()
113 mb(); in conf_read()
117 mb(); in conf_read()
[all …]
Dio.c20 mb(); in ioread8()
22 mb(); in ioread8()
29 mb(); in ioread16()
31 mb(); in ioread16()
38 mb(); in ioread32()
40 mb(); in ioread32()
46 mb(); in iowrite8()
52 mb(); in iowrite16()
58 mb(); in iowrite32()
158 mb(); in readb()
[all …]
Dcore_t2.c40 * floppy to DMA only via the scatter/gather window set up for 8MB
62 * NOTE: Herein lie back-to-back mb instructions. They are magic.
108 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
114 * 10:8 Function number
120 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
126 * 23:16 bus number (8 bits = 128 possible buses)
128 * 10:8 function number
156 if (device > 8) { in mk_conf_addr()
163 addr = (0x0800L << device) | ((device_fn & 7) << 8) | (where); in mk_conf_addr()
167 addr = (bus << 16) | (device_fn << 8) | (where); in mk_conf_addr()
[all …]
Dcore_cia.c34 * NOTE: Herein lie back-to-back mb instructions. They are magic.
57 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
63 * 10:8 Function number
69 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
75 * 23:16 bus number (8 bits = 128 possible buses)
77 * 10:8 function number
96 *pci_addr = (bus << 16) | (device_fn << 8) | where; in mk_conf_addr()
118 mb(); in conf_read()
125 mb(); in conf_read()
129 mb(); in conf_read()
[all …]
/kernel/linux/linux-6.6/arch/alpha/kernel/
Dcore_apecs.c31 * NOTE: Herein lie back-to-back mb instructions. They are magic.
60 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
66 * 10:8 Function number
72 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
78 * 23:16 bus number (8 bits = 128 possible buses)
80 * 10:8 function number
115 addr = (device_fn << 8) | (where); in mk_conf_addr()
119 addr = (bus << 16) | (device_fn << 8) | (where); in mk_conf_addr()
140 mb(); in conf_read()
146 mb(); in conf_read()
[all …]
Dcore_mcpcia.c27 * NOTE: Herein lie back-to-back mb instructions. They are magic.
54 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
60 * 10:8 Function number
66 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
72 * 23:16 bus number (8 bits = 128 possible buses)
74 * 10:8 function number
104 mb(); in conf_read()
108 mb(); in conf_read()
113 mb(); in conf_read()
117 mb(); in conf_read()
[all …]
Dio.c20 mb(); in ioread8()
22 mb(); in ioread8()
29 mb(); in ioread16()
31 mb(); in ioread16()
38 mb(); in ioread32()
40 mb(); in ioread32()
47 mb(); in ioread64()
49 mb(); in ioread64()
55 mb(); in iowrite8()
61 mb(); in iowrite16()
[all …]
Dcore_t2.c40 * floppy to DMA only via the scatter/gather window set up for 8MB
62 * NOTE: Herein lie back-to-back mb instructions. They are magic.
108 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
114 * 10:8 Function number
120 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
126 * 23:16 bus number (8 bits = 128 possible buses)
128 * 10:8 function number
156 if (device > 8) { in mk_conf_addr()
163 addr = (0x0800L << device) | ((device_fn & 7) << 8) | (where); in mk_conf_addr()
167 addr = (bus << 16) | (device_fn << 8) | (where); in mk_conf_addr()
[all …]
Dcore_cia.c34 * NOTE: Herein lie back-to-back mb instructions. They are magic.
57 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
63 * 10:8 Function number
69 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
75 * 23:16 bus number (8 bits = 128 possible buses)
77 * 10:8 function number
96 *pci_addr = (bus << 16) | (device_fn << 8) | where; in mk_conf_addr()
118 mb(); in conf_read()
125 mb(); in conf_read()
129 mb(); in conf_read()
[all …]
/kernel/linux/linux-5.10/drivers/mailbox/
Drockchip-mailbox.c17 #define MAILBOX_A2B_CMD(x) (0x08 + (x) * 8)
18 #define MAILBOX_A2B_DAT(x) (0x0c + (x) * 8)
22 #define MAILBOX_B2A_CMD(x) (0x30 + (x) * 8)
23 #define MAILBOX_B2A_DAT(x) (0x34 + (x) * 8)
38 struct rockchip_mbox *mb; member
54 struct rockchip_mbox *mb = dev_get_drvdata(chan->mbox->dev); in rockchip_mbox_send_data() local
56 struct rockchip_mbox_chan *chans = mb->chans; in rockchip_mbox_send_data()
61 if (msg->rx_size > mb->buf_size) { in rockchip_mbox_send_data()
62 dev_err(mb->mbox.dev, "Transmit size over buf size(%d)\n", in rockchip_mbox_send_data()
63 mb->buf_size); in rockchip_mbox_send_data()
[all …]
/kernel/linux/linux-6.6/drivers/scsi/qla2xxx/
Dqla_mbx.c95 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
161 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qla2x00_mailbox_command()
171 !is_rom_cmd(mcp->mb[0])) || ha->flags.eeh_busy) { in qla2x00_mailbox_command()
174 mcp->mb[0]); in qla2x00_mailbox_command()
188 mcp->mb[0]); in qla2x00_mailbox_command()
198 ha->flags.purge_mbox, ha->flags.eeh_busy, mcp->mb[0]); in qla2x00_mailbox_command()
208 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); in qla2x00_mailbox_command()
228 iptr = mcp->mb; in qla2x00_mailbox_command()
229 command = mcp->mb[0]; in qla2x00_mailbox_command()
235 if (IS_QLA2200(ha) && cnt == 8) in qla2x00_mailbox_command()
[all …]
/kernel/linux/linux-5.10/drivers/scsi/qla2xxx/
Dqla_mbx.c95 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
161 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qla2x00_mailbox_command()
172 !is_rom_cmd(mcp->mb[0])) { in qla2x00_mailbox_command()
175 mcp->mb[0]); in qla2x00_mailbox_command()
189 mcp->mb[0]); in qla2x00_mailbox_command()
204 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); in qla2x00_mailbox_command()
224 iptr = mcp->mb; in qla2x00_mailbox_command()
225 command = mcp->mb[0]; in qla2x00_mailbox_command()
231 if (IS_QLA2200(ha) && cnt == 8) in qla2x00_mailbox_command()
232 optr = MAILBOX_REG(ha, &reg->isp, 8); in qla2x00_mailbox_command()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/apple/
Dmacmace.c218 mp->chipid = mp->mace->chipid_hi << 8 | mp->mace->chipid_lo; in mace_probe()
221 * The PROM contains 8 bytes which total 0xFF when XOR'd in mace_probe()
234 for (; j < 8; ++j) { in mace_probe()
264 volatile struct mace *mb = mp->mace; in mace_reset() local
270 mb->biucc = SWRST; in mace_reset()
271 if (mb->biucc & SWRST) { in mace_reset()
282 mb->maccc = 0; /* turn off tx, rx */ in mace_reset()
283 mb->imr = 0xFF; /* disable all intrs for now */ in mace_reset()
284 i = mb->ir; in mace_reset()
286 mb->biucc = XMTSP_64; in mace_reset()
[all …]
Dmace.c32 #define N_RX_RING 8
36 #define RX_BUFLEN (ETH_FRAME_LEN + 8)
172 mp->chipid = (in_8(&mp->mace->chipid_hi) << 8) | in mace_probe()
250 mp->chipid >> 8, mp->chipid & 0xff); in mace_probe()
320 volatile struct mace __iomem *mb = mp->mace; in mace_reset() local
326 out_8(&mb->biucc, SWRST); in mace_reset()
327 if (in_8(&mb->biucc) & SWRST) { in mace_reset()
338 out_8(&mb->imr, 0xff); /* disable all intrs for now */ in mace_reset()
339 i = in_8(&mb->ir); in mace_reset()
340 out_8(&mb->maccc, 0); /* turn off tx, rx */ in mace_reset()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/apple/
Dmacmace.c219 mp->chipid = mp->mace->chipid_hi << 8 | mp->mace->chipid_lo; in mace_probe()
222 * The PROM contains 8 bytes which total 0xFF when XOR'd in mace_probe()
236 for (; j < 8; ++j) { in mace_probe()
266 volatile struct mace *mb = mp->mace; in mace_reset() local
272 mb->biucc = SWRST; in mace_reset()
273 if (mb->biucc & SWRST) { in mace_reset()
284 mb->maccc = 0; /* turn off tx, rx */ in mace_reset()
285 mb->imr = 0xFF; /* disable all intrs for now */ in mace_reset()
286 i = mb->ir; in mace_reset()
288 mb->biucc = XMTSP_64; in mace_reset()
[all …]
Dmace.c31 #define N_RX_RING 8
35 #define RX_BUFLEN (ETH_FRAME_LEN + 8)
173 mp->chipid = (in_8(&mp->mace->chipid_hi) << 8) | in mace_probe()
251 mp->chipid >> 8, mp->chipid & 0xff); in mace_probe()
321 volatile struct mace __iomem *mb = mp->mace; in mace_reset() local
327 out_8(&mb->biucc, SWRST); in mace_reset()
328 if (in_8(&mb->biucc) & SWRST) { in mace_reset()
339 out_8(&mb->imr, 0xff); /* disable all intrs for now */ in mace_reset()
340 i = in_8(&mb->ir); in mace_reset()
341 out_8(&mb->maccc, 0); /* turn off tx, rx */ in mace_reset()
[all …]
/kernel/linux/linux-5.10/arch/x86/kernel/cpu/
Dcacheinfo.c38 #define MB(x) ((x) * 1024) macro
45 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
48 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
52 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */
54 { 0x23, LVL_3, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */
55 { 0x25, LVL_3, MB(2) }, /* 8-way set assoc, sectored cache, 64 byte line size */
56 { 0x29, LVL_3, MB(4) }, /* 8-way set assoc, sectored cache, 64 byte line size */
57 { 0x2c, LVL_1_DATA, 32 }, /* 8-way set assoc, 64 byte line size */
58 { 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */
69 { 0x44, LVL_2, MB(1) }, /* 4-way set assoc, 32 byte line size */
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/sgi/
Dgio.h20 * There is 10MB of GIO address space for GIO64 slot devices
23 * 0 GFX 0x1f000000 - 0x1f3fffff 4MB
24 * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB
25 * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB
29 * - MISC 0x1fb00000 - 0x1fbfffff 1MB
32 * - RESERVED 0x18000000 - 0x1effffff 112MB
37 * read with an "ID" value. IDs are either 8 or 32 bits long. IDs less
38 * than 128 are 8 bits long, with the most significant 24 bits read from
43 * bit 7 0=GIO Product ID is 8 bits wide
45 * bits 8:15 manufacturer version for the product.
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/sgi/
Dgio.h20 * There is 10MB of GIO address space for GIO64 slot devices
23 * 0 GFX 0x1f000000 - 0x1f3fffff 4MB
24 * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB
25 * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB
29 * - MISC 0x1fb00000 - 0x1fbfffff 1MB
32 * - RESERVED 0x18000000 - 0x1effffff 112MB
37 * read with an "ID" value. IDs are either 8 or 32 bits long. IDs less
38 * than 128 are 8 bits long, with the most significant 24 bits read from
43 * bit 7 0=GIO Product ID is 8 bits wide
45 * bits 8:15 manufacturer version for the product.
[all …]
/kernel/linux/linux-5.10/Documentation/fb/
Dmatroxfb.rst49 8 0x100 0x101 0x180 0x103 0x188
64 8 0x105 0x190 0x107 0x198 0x11C
78 8x8 0x1C0 0x108 0x10A 0x10B 0x10C
79 8x16 2, 3, 7 0x109
94 architectures there are some glitches for 24bpp videomodes. 8, 16 and 32bpp
128 memory usable for on-screen display (i.e. max. 8 MB).
165 - 0 -> 2x128Kx32 chips, 2MB onboard, probably sgram
166 - 1 -> 2x128Kx32 chips, 4MB onboard, probably sgram
167 - 2 -> 2x256Kx32 chips, 4MB onboard, probably sgram
168 - 3 -> 2x256Kx32 chips, 8MB onboard, probably sgram
[all …]
/kernel/linux/linux-6.6/Documentation/fb/
Dmatroxfb.rst49 8 0x100 0x101 0x180 0x103 0x188
64 8 0x105 0x190 0x107 0x198 0x11C
78 8x8 0x1C0 0x108 0x10A 0x10B 0x10C
79 8x16 2, 3, 7 0x109
94 architectures there are some glitches for 24bpp videomodes. 8, 16 and 32bpp
128 memory usable for on-screen display (i.e. max. 8 MB).
165 - 0 -> 2x128Kx32 chips, 2MB onboard, probably sgram
166 - 1 -> 2x128Kx32 chips, 4MB onboard, probably sgram
167 - 2 -> 2x256Kx32 chips, 4MB onboard, probably sgram
168 - 3 -> 2x256Kx32 chips, 8MB onboard, probably sgram
[all …]

12345678910>>...47