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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dfsl,mu-msi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
16 for one processor (A side) to signal the other processor (B side) using
20 different clocks (from each side of the different peripheral buses).
21 Therefore, the MU must synchronize the accesses from one side to the
23 registers (Processor A-side, Processor B-side).
28 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
[all …]
/kernel/linux/linux-5.10/drivers/char/hw_random/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 To compile this driver as a module, choose M here: the
13 module will be called rng-core. This provides a device
28 This driver provides kernel-side support for a generic Random
29 Number Generator used by reading a 'dumb' iomem address that
30 is to be read no faster than, for example, once a second;
31 the default FPGA bitstream on the TS-7800 has such functionality.
33 To compile this driver as a module, choose M here: the
34 module will be called timeriomem-rng.
43 This driver provides kernel-side support for the Random Number
[all …]
/kernel/linux/linux-6.6/drivers/char/hw_random/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 To compile this driver as a module, choose M here: the
13 module will be called rng-core. This provides a device
28 This driver provides kernel-side support for a generic Random
29 Number Generator used by reading a 'dumb' iomem address that
30 is to be read no faster than, for example, once a second;
31 the default FPGA bitstream on the TS-7800 has such functionality.
33 To compile this driver as a module, choose M here: the
34 module will be called timeriomem-rng.
43 This driver provides kernel-side support for the Random Number
[all …]
/kernel/linux/linux-6.6/Documentation/locking/
Dseqlock.rst8 Sequence counters are a reader-writer consistency mechanism with
9 lockless readers (read-only retry loops), and no writer starvation. They
11 reader wants a consistent set of information and is willing to retry if
14 A data set is consistent when the sequence count at the beginning of the
15 read side critical section is even and the same sequence count value is
17 be copied out inside the read side critical section. If the sequence
24 the end of the write side critical section the sequence count becomes
27 A sequence counter write side critical section must never be preempted
28 or interrupted by read side sections. Otherwise the reader will spin for
30 interrupted writer. If that reader belongs to a real-time scheduling
[all …]
/kernel/linux/linux-5.10/Documentation/locking/
Dseqlock.rst8 Sequence counters are a reader-writer consistency mechanism with
9 lockless readers (read-only retry loops), and no writer starvation. They
11 reader wants a consistent set of information and is willing to retry if
14 A data set is consistent when the sequence count at the beginning of the
15 read side critical section is even and the same sequence count value is
17 be copied out inside the read side critical section. If the sequence
24 the end of the write side critical section the sequence count becomes
27 A sequence counter write side critical section must never be preempted
28 or interrupted by read side sections. Otherwise the reader will spin for
30 interrupted writer. If that reader belongs to a real-time scheduling
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/silvermont/
Dvirtual-memory.json13 …cDescription": "This event counts when a data (D) page walk is completed or started. Since a page…
19 "BriefDescription": "D-side page-walks",
23 … when a D-side (walks due to a load) page walk is in progress. Page walk duration divided by numbe…
29 "BriefDescription": "Duration of D-side page-walks in core cycles"
32 …when an instruction (I) page walk is completed or started. Since a page walk implies a TLB miss, …
38 "BriefDescription": "I-side page-walks",
42a I-side (walks due to an instruction fetch) page walk is in progress. Page walk duration divided …
48 "BriefDescription": "Duration of I-side page-walks in core cycles"
51 …This event counts when a data (D) page walk or an instruction (I) page walk is completed or starte…
57 "BriefDescription": "Total page walks that are completed (I-side and D-side)",
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/silvermont/
Dvirtual-memory.json12 "BriefDescription": "Total cycles for all the page walks. (I-side and D-side)",
15 … cycle when a data (D) page walk or instruction (I) page walk is in progress. Since a pagewalk im…
20 "BriefDescription": "Duration of D-side page-walks in core cycles",
23 … when a D-side (walks due to a load) page walk is in progress. Page walk duration divided by numbe…
28 "BriefDescription": "D-side page-walks",
32 …cDescription": "This event counts when a data (D) page walk is completed or started. Since a page…
37 "BriefDescription": "Duration of I-side page-walks in core cycles",
40a I-side (walks due to an instruction fetch) page walk is in progress. Page walk duration divided …
45 "BriefDescription": "I-side page-walks",
49 …when an instruction (I) page walk is completed or started. Since a page walk implies a TLB miss, …
[all …]
/kernel/linux/linux-5.10/Documentation/usb/
Dgadget_serial.rst7 (updated 8-May-2008 for v2.3)
11 ----------------------
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 You should have received a copy of the GNU General Public
25 MA 02111-1307 USA.
35 -------------
38 version 2.3 or later of the gadget serial driver in a 2.6
55 --------
56 The gadget serial driver is a Linux USB gadget driver, a USB device
57 side driver. It runs on a Linux system that has USB device side
[all …]
/kernel/linux/linux-6.6/Documentation/usb/
Dgadget_serial.rst7 (updated 8-May-2008 for v2.3)
11 ----------------------
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 You should have received a copy of the GNU General Public
25 MA 02111-1307 USA.
35 -------------
38 version 2.3 or later of the gadget serial driver in a 2.6
55 --------
56 The gadget serial driver is a Linux USB gadget driver, a USB device
57 side driver. It runs on a Linux system that has USB device side
[all …]
/kernel/linux/linux-5.10/Documentation/RCU/
Dchecklist.rst1 .. SPDX-License-Identifier: GPL-2.0
8 This document contains a checklist for producing and reviewing patches
10 result in the same sorts of problems that leaving out a locking primitive
12 over a rather long period of time, but improvements are always welcome!
14 0. Is RCU being applied to a read-mostly situation? If the data
18 tool for the job. Yes, RCU does reduce read-side overhead by
19 increasing write-side overhead, which is exactly why normal uses
23 provides a simpler implementation. An example of this situation
27 Yet another exception is where the low real-time latency of RCU's
28 read-side primitives is critically important.
[all …]
DwhatisRCU.rst3 What is RCU? -- "Read, Copy, Update"
20 RCU is a synchronization mechanism that was added to the Linux kernel
21 during the 2.5 development effort that is optimized for read-mostly
23 getting there can sometimes be a challenge. Part of the problem is that
40 :ref:`6. ANALOGY WITH READER-WRITER LOCKING <6_whatisRCU>`
46 People who prefer starting with a conceptual overview should focus on
58 everything, feel free to read the whole thing -- but if you are really
60 never need this document anyway. ;-)
65 ----------------
69 within a data structure (possibly by replacing them with references to
[all …]
Dlockdep.rst1 .. SPDX-License-Identifier: GPL-2.0
8 aware of when each task enters and leaves any flavor of RCU read-side
18 rcu_read_lock_bh_held() for RCU-bh.
19 rcu_read_lock_sched_held() for RCU-sched.
27 In addition, a separate kernel config parameter CONFIG_PROVE_RCU enables
31 Check for RCU read-side critical section.
33 Check for RCU-bh read-side critical section.
35 Check for RCU-sched read-side critical section.
37 Check for SRCU read-side critical section.
45 is invoked by both RCU-bh readers and updaters.
[all …]
/kernel/linux/linux-6.6/Documentation/RCU/
Dchecklist.rst1 .. SPDX-License-Identifier: GPL-2.0
8 This document contains a checklist for producing and reviewing patches
10 result in the same sorts of problems that leaving out a locking primitive
12 over a rather long period of time, but improvements are always welcome!
14 0. Is RCU being applied to a read-mostly situation? If the data
18 tool for the job. Yes, RCU does reduce read-side overhead by
19 increasing write-side overhead, which is exactly why normal uses
23 provides a simpler implementation. An example of this situation
27 Yet another exception is where the low real-time latency of RCU's
28 read-side primitives is critically important.
[all …]
DwhatisRCU.rst3 What is RCU? -- "Read, Copy, Update"
21 …ries: Fundamentals https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries
22 …Cases https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries-additional-use-cases
27 RCU is a synchronization mechanism that was added to the Linux kernel
28 during the 2.5 development effort that is optimized for read-mostly
47 :ref:`6. ANALOGY WITH READER-WRITER LOCKING <6_whatisRCU>`
55 People who prefer starting with a conceptual overview should focus on
67 everything, feel free to read the whole thing -- but if you are really
69 never need this document anyway. ;-)
74 ----------------
[all …]
Dlockdep.rst1 .. SPDX-License-Identifier: GPL-2.0
8 aware of when each task enters and leaves any flavor of RCU read-side
18 rcu_read_lock_bh_held() for RCU-bh.
19 rcu_read_lock_sched_held() for RCU-sched.
20 rcu_read_lock_any_held() for any of normal RCU, RCU-bh, and RCU-sched.
29 In addition, a separate kernel config parameter CONFIG_PROVE_RCU enables
33 Check for RCU read-side critical section.
35 Check for RCU-bh read-side critical section.
37 Check for RCU-sched read-side critical section.
39 Check for SRCU read-side critical section.
[all …]
/kernel/linux/linux-6.6/include/linux/
Dsrcu.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Sleepable Read-Copy Update mechanism for mutual exclusion
11 * For detailed explanation of Read-Copy Update mechanism see -
83 * srcu_read_lock_held - might we be in SRCU read-side critical section?
87 * read-side critical section. In absence of CONFIG_DEBUG_LOCK_ALLOC,
88 * this assumes we are in an SRCU read-side critical section unless it can
102 return lock_is_held(&ssp->dep_map); in srcu_read_lock_held()
109 * srcu_lock_sync(), which is basically an empty *write*-side critical section,
113 /* Annotates a srcu_read_lock() */
119 /* Annotates a srcu_read_lock() */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/devfreq/
Drk3399_dmc.txt4 - compatible: Must be "rockchip,rk3399-dmc".
5 - devfreq-events: Node to get DDR loading, Refer to
7 rockchip-dfi.txt
8 - clocks: Phandles for clock specified in "clock-names" property
9 - clock-names : The name of clock used by the DFI, must be
11 - operating-points-v2: Refer to Documentation/devicetree/bindings/opp/opp.txt
13 - center-supply: DMC supply node.
14 - status: Marks the node enabled/disabled.
17 - interrupts: The CPU interrupt number. The interrupt specifier
19 It should be a DCF interrupt. When DDR DVFS finishes
[all …]
/kernel/linux/linux-6.6/Documentation/RCU/Design/Requirements/
DRequirements.rst2 A Tour Through RCU's Requirements
16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
32 has this learning process been a lot of fun, but it has also been a
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/powerpc/power9/
Dtranslation.json15 …che was reloaded with Shared (S) data from another core's L2 on the same chip due to a demand load"
20 "BriefDescription": "Double-Precion or Quad-Precision instruction completed"
25 …escription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same No…
35A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on th…
45 …"BriefDescription": "Finish stall due to a vector fixed point instruction in the execution pipelin…
50 "BriefDescription": "LSU Finished a PPC instruction (up to 4 per cycle)"
60A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a
65 …"BriefDescription": "Completion stall due to a long latency vector fixed point instruction (divisi…
70 …on": "The processor's data cache was reloaded from a location other than the local core's L2 due t…
75 …n": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's…
[all …]
Dpipeline.json10 "BriefDescription": "Number of I-ERAT reloads"
15 …te that this count is per slice, so if a load spans multiple slices this event will increment mult…
25 …"BriefDescription": "Finish stall because the NTF instruction was a multi-cycle instruction issued…
30 …ded either shared or modified data from another core's L2/L3 on the same chip due to a marked load"
35 …ription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node o…
40 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without confl…
80 …ription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L…
90 …r's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a
95 …escription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core'…
100 …rbitration onto the issue pipe to another instruction (from the same thread or a different thread)"
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/powerpc/power9/
Dtranslation.json15 …che was reloaded with Shared (S) data from another core's L2 on the same chip due to a demand load"
20 "BriefDescription": "Double-Precion or Quad-Precision instruction completed"
25 …escription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same No…
35A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on th…
45 …"BriefDescription": "Finish stall due to a vector fixed point instruction in the execution pipelin…
50 "BriefDescription": "LSU Finished a PPC instruction (up to 4 per cycle)"
60A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a
65 …"BriefDescription": "Completion stall due to a long latency vector fixed point instruction (divisi…
70 …on": "The processor's data cache was reloaded from a location other than the local core's L2 due t…
75 …n": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's…
[all …]
Dpipeline.json10 "BriefDescription": "Number of I-ERAT reloads"
15 …te that this count is per slice, so if a load spans multiple slices this event will increment mult…
25 …"BriefDescription": "Finish stall because the NTF instruction was a multi-cycle instruction issued…
30 …ded either shared or modified data from another core's L2/L3 on the same chip due to a marked load"
35 …ription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node o…
40 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without confl…
80 …ription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L…
90 …r's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a
95 …escription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core'…
100 …rbitration onto the issue pipe to another instruction (from the same thread or a different thread)"
[all …]
/kernel/linux/linux-5.10/Documentation/RCU/Design/Requirements/
DRequirements.rst2 A Tour Through RCU's Requirements
16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
32 has this learning process been a lot of fun, but it has also been a
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
[all …]
/kernel/linux/linux-6.6/drivers/char/ipmi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate 'IPMI top-level message handler'
14 IPMI is a standard for managing sensors (temperature,
15 voltage, etc.) in a system.
17 See <file:Documentation/driver-api/ipmi.rst> for more details on the driver.
31 bool 'Generate a panic event to all BMCs on a panic'
33 When a panic occurs, this will cause the IPMI message handler to,
44 When a panic occurs, this will cause the IPMI message handler to,
46 address of the panic generator (byte 4 of the event), a sequence
66 Provides a driver for System Interfaces (KCS, SMIC, BT).
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/powerpc/power8/
Dfrontend.json5 …"BriefDescription": "Branch instruction completed with a target address less than current instruct…
41 "BriefDescription": "Cycles when a demand ifetch was pending",
47 "BriefDescription": "Number of I-ERAT reloads",
53 "BriefDescription": "IERAT Reloaded (Miss) for a 16M page",
60 "PublicDescription": "IERAT Reloaded (Miss) for a 4k page"
65 "BriefDescription": "IERAT Reloaded (Miss) for a 64k page",
89 …n cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Gr…
90 …n cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Gr…
95 …ion cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Gr…
96 …ion cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Gr…
[all …]

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