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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ti/
Dapll.txt1 Binding for Texas Instruments APLL clock.
6 register-mapped APLL with usually two selectable input clocks
10 modes (locked, low power stop etc.) APLL mostly behaves like
17 - compatible : shall be "ti,dra7-apll-clock" or "ti,omap2-apll-clock"
20 - reg : address and length of the register set for controlling the APLL.
34 compatible = "ti,dra7-apll-clock";
39 compatible = "ti,omap2-apll-clock";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ti/
Dapll.txt1 Binding for Texas Instruments APLL clock.
6 register-mapped APLL with usually two selectable input clocks
10 modes (locked, low power stop etc.) APLL mostly behaves like
17 - compatible : shall be "ti,dra7-apll-clock" or "ti,omap2-apll-clock"
20 - reg : address and length of the register set for controlling the APLL.
34 compatible = "ti,dra7-apll-clock";
39 compatible = "ti,omap2-apll-clock";
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Dcm2xxx.c99 * APLL control
136 /* Enable an APLL if off */
145 return 0; /* apll already enabled */ in _omap2xxx_apll_enable()
159 /* Stop APLL */
169 /* Enable an APLL if off */
176 /* Enable an APLL if off */
183 /* Stop APLL */
189 /* Stop APLL */
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8186/
Dmt8186-afe-clk.h14 /* APLL */
57 /* apll related mux */
97 int mt8186_get_apll_rate(struct mtk_base_afe *afe, int apll);
Dmt8186-dai-tdm.c22 unsigned int rate; /* for determine which apll to use */
222 /* which apll */ in mtk_afe_tdm_mclk_apll_connect()
253 /* which apll */ in mtk_afe_tdm_apll_connect()
256 /* choose APLL from tdm rate */ in mtk_afe_tdm_apll_connect()
339 int apll; in mtk_dai_tdm_cal_mclk() local
342 apll = mt8186_get_apll_by_rate(afe, freq); in mtk_dai_tdm_cal_mclk()
343 apll_rate = mt8186_get_apll_rate(afe, apll); in mtk_dai_tdm_cal_mclk()
353 "%s(), APLL cannot generate %d Hz", __func__, freq); in mtk_dai_tdm_cal_mclk()
358 tdm_priv->mclk_apll = apll; in mtk_dai_tdm_cal_mclk()
Dmt8186-afe-clk.c392 /* setting for APLL */ in mt8186_apll1_enable()
445 /* setting for APLL */ in mt8186_apll2_enable()
493 int mt8186_get_apll_rate(struct mtk_base_afe *afe, int apll) in mt8186_get_apll_rate() argument
495 return (apll == MT8186_APLL1) ? 180633600 : 196608000; in mt8186_get_apll_rate()
543 int apll = mt8186_get_apll_by_rate(afe, rate); in mt8186_mck_enable() local
544 int apll_clk_id = apll == MT8186_APLL1 ? in mt8186_mck_enable()
550 /* select apll */ in mt8186_mck_enable()
Dmt8186-dai-i2s.c43 int rate; /* for determine which apll to use */
508 /* apll */
586 /* which apll */ in mtk_afe_i2s_apll_connect()
588 /* choose APLL from i2s rate */ in mtk_afe_i2s_apll_connect()
627 /* which apll */ in mtk_afe_mclk_apll_connect()
1006 int apll; in mtk_dai_i2s_set_sysclk() local
1016 apll = mt8186_get_apll_by_rate(afe, freq); in mtk_dai_i2s_set_sysclk()
1017 apll_rate = mt8186_get_apll_rate(afe, apll); in mtk_dai_i2s_set_sysclk()
1020 dev_err(afe->dev, "%s(), freq > apll rate", __func__); in mtk_dai_i2s_set_sysclk()
1025 dev_err(afe->dev, "%s(), APLL cannot generate freq Hz", __func__); in mtk_dai_i2s_set_sysclk()
[all …]
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-imx7ulp.c26 static const char * const apll_sels[] = { "apll", "apll_pfd_sel", };
34 /* used by sosc/sirc/firc/ddr/spll/apll dividers */
81 hws[IMX7ULP_CLK_APLL] = imx_clk_hw_pllv4("apll", "apll_pre_div", base + 0x500); in imx7ulp_clk_scg1_init()
84 /* APLL PFDs */ in imx7ulp_clk_scg1_init()
85 hws[IMX7ULP_CLK_APLL_PFD0] = imx_clk_hw_pfdv2("apll_pfd0", "apll", base + 0x50c, 0); in imx7ulp_clk_scg1_init()
86 hws[IMX7ULP_CLK_APLL_PFD1] = imx_clk_hw_pfdv2("apll_pfd1", "apll", base + 0x50c, 1); in imx7ulp_clk_scg1_init()
87 hws[IMX7ULP_CLK_APLL_PFD2] = imx_clk_hw_pfdv2("apll_pfd2", "apll", base + 0x50c, 2); in imx7ulp_clk_scg1_init()
88 hws[IMX7ULP_CLK_APLL_PFD3] = imx_clk_hw_pfdv2("apll_pfd3", "apll", base + 0x50c, 3); in imx7ulp_clk_scg1_init()
/kernel/linux/linux-6.6/drivers/clk/imx/
Dclk-imx7ulp.c26 static const char * const apll_sels[] = { "apll", "apll_pfd_sel", };
34 /* used by sosc/sirc/firc/ddr/spll/apll dividers */
81 …hws[IMX7ULP_CLK_APLL] = imx_clk_hw_pllv4(IMX_PLLV4_IMX7ULP, "apll", "apll_pre_div", base + 0x500… in imx7ulp_clk_scg1_init()
84 /* APLL PFDs */ in imx7ulp_clk_scg1_init()
85 …hws[IMX7ULP_CLK_APLL_PFD0] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd0", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()
86 …hws[IMX7ULP_CLK_APLL_PFD1] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd1", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()
87 …hws[IMX7ULP_CLK_APLL_PFD2] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd2", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()
88 …hws[IMX7ULP_CLK_APLL_PFD3] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd3", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dimx7ulp-pcc-clock.yaml54 - description: apll pfd2
55 - description: apll pfd1
56 - description: apll pfd0
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c29 /* apll related mux */
230 /* apll */
384 /* setting for APLL */ in mt8183_apll1_enable()
438 /* setting for APLL */ in mt8183_apll2_enable()
487 int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll) in mt8183_get_apll_rate() argument
489 return (apll == MT8183_APLL1) ? 180633600 : 196608000; in mt8183_get_apll_rate()
545 int apll = mt8183_get_apll_by_rate(afe, rate); in mt8183_mck_enable() local
546 int apll_clk_id = apll == MT8183_APLL1 ? in mt8183_mck_enable()
556 /* select apll */ in mt8183_mck_enable()
Dmt8183-afe-clk.h12 /* APLL */
32 int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll);
Dmt8183-dai-i2s.c43 int rate; /* for determine which apll to use */
404 /* apll */
482 /* which apll */ in mtk_afe_i2s_apll_connect()
485 /* choose APLL from i2s rate */ in mtk_afe_i2s_apll_connect()
536 /* which apll */ in mtk_afe_mclk_apll_connect()
787 int apll; in mtk_dai_i2s_set_sysclk() local
800 apll = mt8183_get_apll_by_rate(afe, freq); in mtk_dai_i2s_set_sysclk()
801 apll_rate = mt8183_get_apll_rate(afe, apll); in mtk_dai_i2s_set_sysclk()
804 dev_warn(afe->dev, "%s(), freq > apll rate", __func__); in mtk_dai_i2s_set_sysclk()
809 dev_warn(afe->dev, "%s(), APLL cannot generate freq Hz", in mtk_dai_i2s_set_sysclk()
[all …]
/kernel/linux/linux-5.10/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c29 /* apll related mux */
230 /* apll */
384 /* setting for APLL */ in mt8183_apll1_enable()
438 /* setting for APLL */ in mt8183_apll2_enable()
487 int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll) in mt8183_get_apll_rate() argument
489 return (apll == MT8183_APLL1) ? 180633600 : 196608000; in mt8183_get_apll_rate()
545 int apll = mt8183_get_apll_by_rate(afe, rate); in mt8183_mck_enable() local
546 int apll_clk_id = apll == MT8183_APLL1 ? in mt8183_mck_enable()
556 /* select apll */ in mt8183_mck_enable()
Dmt8183-afe-clk.h12 /* APLL */
32 int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll);
Dmt8183-dai-i2s.c43 int rate; /* for determine which apll to use */
413 /* apll */
491 /* which apll */ in mtk_afe_i2s_apll_connect()
494 /* choose APLL from i2s rate */ in mtk_afe_i2s_apll_connect()
545 /* which apll */ in mtk_afe_mclk_apll_connect()
801 int apll; in mtk_dai_i2s_set_sysclk() local
816 apll = mt8183_get_apll_by_rate(afe, freq); in mtk_dai_i2s_set_sysclk()
817 apll_rate = mt8183_get_apll_rate(afe, apll); in mtk_dai_i2s_set_sysclk()
820 dev_warn(afe->dev, "%s(), freq > apll rate", __func__); in mtk_dai_i2s_set_sysclk()
825 dev_warn(afe->dev, "%s(), APLL cannot generate freq Hz", in mtk_dai_i2s_set_sysclk()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dimx7ulp-pcc-clock.yaml54 - description: apll pfd2
55 - description: apll pfd1
56 - description: apll pfd0
/kernel/linux/linux-6.6/drivers/clk/nuvoton/
Dclk-ma35d1.c89 { .fw_name = "apll", },
95 { .fw_name = "apll", },
294 { .fw_name = "apll", },
299 { .fw_name = "apll", },
304 { .fw_name = "apll", },
309 { .fw_name = "apll", },
314 { .fw_name = "apll", },
319 { .fw_name = "apll", },
323 { .fw_name = "apll", },
328 { .fw_name = "apll", },
[all …]
/kernel/linux/linux-6.6/drivers/clk/rockchip/
Dclk-rk3036.c21 apll, dpll, gpll, enumerator
117 PNAME(mux_armclk_p) = { "apll", "gpll_armclk" };
118 PNAME(mux_busclk_p) = { "apll", "dpll_cpu", "gpll_cpu" };
120 PNAME(mux_pll_src_3plls_p) = { "apll", "dpll", "gpll" };
123 PNAME(mux_pll_src_apll_dpll_gpll_usb480m_p) = { "apll", "dpll", "gpll", "usb480m" };
126 PNAME(mux_mmc_src_p) = { "apll", "dpll", "gpll", "xin24m" };
137 [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
/kernel/linux/linux-5.10/drivers/clk/rockchip/
Dclk-rk3036.c21 apll, dpll, gpll, enumerator
116 PNAME(mux_armclk_p) = { "apll", "gpll_armclk" };
117 PNAME(mux_busclk_p) = { "apll", "dpll_cpu", "gpll_cpu" };
119 PNAME(mux_pll_src_3plls_p) = { "apll", "dpll", "gpll" };
122 PNAME(mux_pll_src_apll_dpll_gpll_usb480m_p) = { "apll", "dpll", "gpll", "usb480m" };
124 PNAME(mux_mmc_src_p) = { "apll", "dpll", "gpll", "xin24m" };
135 [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8192/
Dmt8192-afe-clk.c290 /* setting for APLL */ in mt8192_apll1_enable()
340 /* setting for APLL */ in mt8192_apll2_enable()
385 int mt8192_get_apll_rate(struct mtk_base_afe *afe, int apll) in mt8192_get_apll_rate() argument
387 return (apll == MT8192_APLL1) ? 180633600 : 196608000; in mt8192_get_apll_rate()
565 int apll = mt8192_get_apll_by_rate(afe, rate); in mt8192_mck_enable() local
566 int apll_clk_id = apll == MT8192_APLL1 ? in mt8192_mck_enable()
572 /* select apll */ in mt8192_mck_enable()
Dmt8192-afe-clk.h165 /* APLL */
186 /* apll related mux */
233 int mt8192_get_apll_rate(struct mtk_base_afe *afe, int apll);
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8188/
Dmt8188-afe-clk.h14 /* APLL */
117 int mt8188_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll);
/kernel/linux/linux-5.10/drivers/cpufreq/
Ds5pv210-cpufreq.c87 /* APLL M,P,S values for 1G/800Mhz */
170 * { APLL, A2M, HCLK_MSYS, PCLK_MSYS,
286 * APLL should be changed in this level in s5pv210_target()
287 * APLL -> MPLL(for stable transition) -> APLL in s5pv210_target()
379 * 6. Turn on APLL in s5pv210_target()
422 /* 9. Change MPLL to APLL in MSYS_MUX */ in s5pv210_target()
/kernel/linux/linux-6.6/drivers/cpufreq/
Ds5pv210-cpufreq.c87 /* APLL M,P,S values for 1G/800Mhz */
170 * { APLL, A2M, HCLK_MSYS, PCLK_MSYS,
286 * APLL should be changed in this level in s5pv210_target()
287 * APLL -> MPLL(for stable transition) -> APLL in s5pv210_target()
379 * 6. Turn on APLL in s5pv210_target()
422 /* 9. Change MPLL to APLL in MSYS_MUX */ in s5pv210_target()

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