Home
last modified time | relevance | path

Searched full:axi (Results 1 – 25 of 949) sorted by relevance

12345678910>>...38

/kernel/linux/linux-5.10/drivers/bus/
Dbt1-axi.c8 * Baikal-T1 AXI-bus driver
35 * struct bt1_axi - Baikal-T1 AXI-bus private data
37 * @qos_regs: AXI Interconnect QoS tuning registers.
40 * @aclk: AXI reference clock.
41 * @arst: AXI Interconnect reset line.
60 struct bt1_axi *axi = data; in bt1_axi_isr() local
63 regmap_read(axi->sys_regs, BT1_AXI_WERRL, &low); in bt1_axi_isr()
64 regmap_read(axi->sys_regs, BT1_AXI_WERRH, &high); in bt1_axi_isr()
66 dev_crit_ratelimited(axi->dev, in bt1_axi_isr()
67 "AXI-bus fault %d: %s at 0x%x%08x\n", in bt1_axi_isr()
[all …]
/kernel/linux/linux-6.6/drivers/bus/
Dbt1-axi.c8 * Baikal-T1 AXI-bus driver
35 * struct bt1_axi - Baikal-T1 AXI-bus private data
37 * @qos_regs: AXI Interconnect QoS tuning registers.
40 * @aclk: AXI reference clock.
41 * @arst: AXI Interconnect reset line.
60 struct bt1_axi *axi = data; in bt1_axi_isr() local
63 regmap_read(axi->sys_regs, BT1_AXI_WERRL, &low); in bt1_axi_isr()
64 regmap_read(axi->sys_regs, BT1_AXI_WERRH, &high); in bt1_axi_isr()
66 dev_crit_ratelimited(axi->dev, in bt1_axi_isr()
67 "AXI-bus fault %d: %s at 0x%x%08x\n", in bt1_axi_isr()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dqcom,pcie.yaml267 - const: axi # AXI reset
292 - const: master_bus # Master AXI clock
293 - const: slave_bus # Slave AXI clock
315 - const: master_bus # Master AXI clock
316 - const: slave_bus # Slave AXI clock
322 - const: axi_m # AXI master reset
323 - const: axi_s # AXI slave reset
329 - const: axi_m_sticky # AXI sticky reset
351 - const: bus_master # Master AXI clock
352 - const: bus_slave # Slave AXI clock
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt1 Xilinx AXI VDMA engine, it does transfers between memory and video devices.
6 Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
14 Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
23 "xlnx,axi-mcdma-1.00.a"
47 Optional properties for AXI DMA and MCDMA:
53 Optional properties for AXI DMA:
[all …]
/kernel/linux/linux-6.6/drivers/staging/axis-fifo/
Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
22 - xlnx,axi-str-rxd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"
23 - xlnx,axi-str-rxd-tdata-width: Should be <0x20>
24 - xlnx,axi-str-txc-protocol: Should be "XIL_AXI_STREAM_ETH_CTRL"
25 - xlnx,axi-str-txc-tdata-width: Should be <0x20>
26 - xlnx,axi-str-txd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"
27 - xlnx,axi-str-txd-tdata-width: Should be <0x20>
28 - xlnx,axis-tdest-width: AXI-Stream TDEST width (ignored by the driver)
[all …]
DKconfig3 # "Xilinx AXI-Stream FIFO IP core driver"
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
12 to the AXI Ethernet without the need to use DMA.
/kernel/linux/linux-5.10/drivers/staging/axis-fifo/
Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
22 - xlnx,axi-str-rxd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"
23 - xlnx,axi-str-rxd-tdata-width: Should be <0x20>
24 - xlnx,axi-str-txc-protocol: Should be "XIL_AXI_STREAM_ETH_CTRL"
25 - xlnx,axi-str-txc-tdata-width: Should be <0x20>
26 - xlnx,axi-str-txd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"
27 - xlnx,axi-str-txd-tdata-width: Should be <0x20>
28 - xlnx,axis-tdest-width: AXI-Stream TDEST width (ignored by the driver)
[all …]
DKconfig3 # "Xilinx AXI-Stream FIFO IP core driver"
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
12 to the AXI Ethernet without the need to use DMA.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt1 Xilinx AXI VDMA engine, it does transfers between memory and video devices.
6 Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
14 Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
23 "xlnx,axi-mcdma-1.00.a"
47 Optional properties for AXI DMA and MCDMA:
61 For VDMA: It should be either "xlnx,axi-vdma-mm2s-channel" or
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/
Dsnps,dw-axi-dmac.yaml4 $id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml#
7 title: Synopsys DesignWare AXI DMA Controller
13 Synopsys DesignWare AXI DMA Controller DT Binding
21 - snps,axi-dma-1.01a
22 - intel,kmb-axi-dma
23 - starfive,jh7110-axi-dma
67 Number of AXI masters supported by the hardware.
73 AXI data width supported by hardware.
92 snps,axi-max-burst-len:
94 Restrict master AXI burst length by value specified in this property.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dxilinx_axienet.txt1 XILINX AXI ETHERNET Device Tree Bindings
4 Also called AXI 1G/2.5G Ethernet Subsystem, the xilinx axi ethernet IP core
10 Management configuration is done through the AXI interface, while payload is
11 sent and received through means of an AXI DMA controller. This driver
12 includes the DMA driver code, so this driver is incompatible with AXI DMA
18 - compatible : Must be one of "xlnx,axi-ethernet-1.00.a",
19 "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-2.01.a"
21 and length of the AXI DMA controller IO space, unless
41 - clocks : AXI bus clock for the device. Refer to common clock bindings.
47 for the AXI DMA controller used by this device.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-axi-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-axi-clk.yaml#
7 title: Allwinner A10 AXI Clock
21 - allwinner,sun4i-a10-axi-clk
22 - allwinner,sun8i-a23-axi-clk
44 axi@1c20054 {
46 compatible = "allwinner,sun4i-a10-axi-clk";
49 clock-output-names = "axi";
55 compatible = "allwinner,sun8i-a23-axi-clk";
58 clock-output-names = "axi";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-axi-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-axi-clk.yaml#
7 title: Allwinner A10 AXI Clock Device Tree Bindings
21 - allwinner,sun4i-a10-axi-clk
22 - allwinner,sun8i-a23-axi-clk
44 axi@1c20054 {
46 compatible = "allwinner,sun4i-a10-axi-clk";
49 clock-output-names = "axi";
55 compatible = "allwinner,sun8i-a23-axi-clk";
58 clock-output-names = "axi";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dqcom,pcie.txt101 - "bus_master" Master AXI clock
102 - "bus_slave" Slave AXI clock
111 - "bus_master" Master AXI clock
112 - "bus_slave" Slave AXI clock
119 - "axi_m" AXI Master clock
120 - "axi_s" AXI Slave clock
130 - "master_bus" AXI Master clock
131 - "slave_bus" AXI Slave clock
139 - "bus_master" Master AXI clock
140 - "bus_slave" Slave AXI clock
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dsnps,dw-axi-dmac.txt1 Synopsys DesignWare AXI DMA Controller
4 - compatible: "snps,axi-dma-1.01a"
9 - snps,dma-masters: Number of AXI masters supported by the hardware.
10 - snps,data-width: Maximum AXI data width supported by hardware.
19 - snps,axi-max-burst-len: Restrict master AXI burst length by value specified
20 in this property. If this property is missing the maximum AXI burst length
26 compatible = "snps,axi-dma-1.01a";
38 snps,axi-max-burst-len = <16>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dxlnx,axi-ethernet.yaml4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
7 title: AXI 1G/2.5G Ethernet Subsystem
10 Also called AXI 1G/2.5G Ethernet Subsystem, the xilinx axi ethernet IP core
16 Management configuration is done through the AXI interface, while payload is
17 sent and received through means of an AXI DMA controller. This driver
18 includes the DMA driver code, so this driver is incompatible with AXI DMA
27 - xlnx,axi-ethernet-1.00.a
28 - xlnx,axi-ethernet-1.01.a
29 - xlnx,axi-ethernet-2.01.a
34 and length of the AXI DMA controller IO space, unless
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/
Dbaikal,bt1-axi.yaml5 $id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
8 title: Baikal-T1 AXI-bus
16 cores. Traffic arbitration is done by means of DW AXI Interconnect (so
17 called AXI Main Interconnect) routing IO requests from one block to
21 an IRQ is raised and a faulty situation is reported to the AXI EHB
22 (Errors Handler Block) embedded on top of the DW AXI Interconnect and
31 const: baikal,bt1-axi
36 - description: Synopsys DesignWare AXI Interconnect QoS registers
37 - description: AXI EHB MMIO system controller registers
87 compatible = "baikal,bt1-axi", "simple-bus";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Dbaikal,bt1-axi.yaml5 $id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
8 title: Baikal-T1 AXI-bus
16 cores. Traffic arbitration is done by means of DW AXI Interconnect (so
17 called AXI Main Interconnect) routing IO requests from one block to
21 an IRQ is raised and a faulty situation is reported to the AXI EHB
22 (Errors Handler Block) embedded on top of the DW AXI Interconnect and
31 const: baikal,bt1-axi
36 - description: Synopsys DesignWare AXI Interconnect QoS registers
37 - description: AXI EHB MMIO system controller registers
87 compatible = "baikal,bt1-axi", "simple-bus";
/kernel/linux/linux-6.6/drivers/net/ethernet/xilinx/
Dxilinx_axienet.h3 * Definitions for Xilinx Axi Ethernet device driver.
72 /* Axi DMA Register definitions */
144 /* Axi Ethernet registers definition */
180 /* Bit Masks for Axi Ethernet RAF register */
199 /* Bit Masks for Axi Ethernet TPF and IFGP registers */
204 /* Bit Masks for Axi Ethernet IS, IE and IP registers, Same masks apply
224 /* Bit masks for Axi Ethernet VLAN TPID Word 0 register */
228 /* Bit masks for Axi Ethernet VLAN TPID Word 1 register */
232 /* Bit masks for Axi Ethernet RCW1 register */
248 /* Bit masks for Axi Ethernet TC register */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/can/
Dxilinx_can.txt1 Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings
7 - "xlnx,axi-can-1.00.a" for Axi CAN controllers
16 - "can_clk", "s_axi_aclk" (For AXI CAN and CAN FD).
19 - tx-fifo-depth : Can Tx fifo depth (Zynq, Axi CAN).
20 - rx-fifo-depth : Can Rx fifo depth (Zynq, Axi CAN, CAN FD in
40 For Axi CAN Dts file:
41 axi_can_0: axi-can@40000000 {
42 compatible = "xlnx,axi-can-1.00.a";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dadi,axi-spdif-tx.txt1 ADI AXI-SPDIF controller
4 - compatible : Must be "adi,axi-spdif-tx-1.00.a"
7 The controller expects two clocks, the clock used for the AXI interface and
9 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
24 compatible = "adi,axi-spdif-tx-1.00.a";
27 clock-names = "axi", "ref";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dadi,axi-spdif-tx.txt1 ADI AXI-SPDIF controller
4 - compatible : Must be "adi,axi-spdif-tx-1.00.a"
7 The controller expects two clocks, the clock used for the AXI interface and
9 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
24 compatible = "adi,axi-spdif-tx-1.00.a";
27 clock-names = "axi", "ref";
/kernel/linux/linux-5.10/sound/soc/adi/
DMakefile2 snd-soc-adi-axi-i2s-objs := axi-i2s.o
3 snd-soc-adi-axi-spdif-objs := axi-spdif.o
5 obj-$(CONFIG_SND_SOC_ADI_AXI_I2S) += snd-soc-adi-axi-i2s.o
6 obj-$(CONFIG_SND_SOC_ADI_AXI_SPDIF) += snd-soc-adi-axi-spdif.o
/kernel/linux/linux-6.6/sound/soc/adi/
DMakefile2 snd-soc-adi-axi-i2s-objs := axi-i2s.o
3 snd-soc-adi-axi-spdif-objs := axi-spdif.o
5 obj-$(CONFIG_SND_SOC_ADI_AXI_I2S) += snd-soc-adi-axi-i2s.o
6 obj-$(CONFIG_SND_SOC_ADI_AXI_SPDIF) += snd-soc-adi-axi-spdif.o
/kernel/linux/linux-5.10/drivers/net/ethernet/xilinx/
Dxilinx_axienet.h3 * Definitions for Xilinx Axi Ethernet device driver.
72 /* Axi DMA Register definitions */
144 /* Axi Ethernet registers definition */
179 /* Bit Masks for Axi Ethernet RAF register */
198 /* Bit Masks for Axi Ethernet TPF and IFGP registers */
203 /* Bit Masks for Axi Ethernet IS, IE and IP registers, Same masks apply
223 /* Bit masks for Axi Ethernet VLAN TPID Word 0 register */
227 /* Bit masks for Axi Ethernet VLAN TPID Word 1 register */
231 /* Bit masks for Axi Ethernet RCW1 register */
247 /* Bit masks for Axi Ethernet TC register */
[all …]

12345678910>>...38