| /kernel/linux/linux-6.6/lib/ |
| D | bch.c | 2 * Generic binary BCH encoding/decoding library
24 * Bose-Chaudhuri-Hocquenghem (BCH) codes.
33 * On systems supporting hw BCH features, intermediate results may be provided
40 * (m,t) are fixed and known in advance, e.g. when using BCH error correction
76 #include <linux/bch.h>
118 static u8 swap_bits(struct bch_control *bch, u8 in) in swap_bits() argument
120 if (!bch->swap_bits) in swap_bits()
129 static void bch_encode_unaligned(struct bch_control *bch, in bch_encode_unaligned() argument
135 const int l = BCH_ECC_WORDS(bch)-1; in bch_encode_unaligned()
138 u8 tmp = swap_bits(bch, *data++); in bch_encode_unaligned()
[all …]
|
| /kernel/linux/linux-5.10/lib/ |
| D | bch.c | 2 * Generic binary BCH encoding/decoding library
24 * Bose-Chaudhuri-Hocquenghem (BCH) codes.
33 * On systems supporting hw BCH features, intermediate results may be provided
40 * (m,t) are fixed and known in advance, e.g. when using BCH error correction
75 #include <linux/bch.h>
152 static u8 swap_bits(struct bch_control *bch, u8 in) in swap_bits() argument
154 if (!bch->swap_bits) in swap_bits()
163 static void bch_encode_unaligned(struct bch_control *bch, in bch_encode_unaligned() argument
169 const int l = BCH_ECC_WORDS(bch)-1; in bch_encode_unaligned()
172 u8 tmp = swap_bits(bch, *data++); in bch_encode_unaligned()
[all …]
|
| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ingenic/ |
| D | jz4725b_bch.c | 3 * JZ4725B BCH controller driver
59 /* Timeout for BCH calculation/correction. */
62 static inline void jz4725b_bch_config_set(struct ingenic_ecc *bch, u32 cfg) in jz4725b_bch_config_set() argument
64 writel(cfg, bch->base + BCH_BHCSR); in jz4725b_bch_config_set()
67 static inline void jz4725b_bch_config_clear(struct ingenic_ecc *bch, u32 cfg) in jz4725b_bch_config_clear() argument
69 writel(cfg, bch->base + BCH_BHCCR); in jz4725b_bch_config_clear()
72 static int jz4725b_bch_reset(struct ingenic_ecc *bch, in jz4725b_bch_reset() argument
78 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4725b_bch_reset()
80 /* Initialise and enable BCH. */ in jz4725b_bch_reset()
81 jz4725b_bch_config_clear(bch, 0x1f); in jz4725b_bch_reset()
[all …]
|
| D | jz4780_bch.c | 3 * JZ4780 BCH controller driver
59 /* Timeout for BCH calculation/correction. */
62 static void jz4780_bch_reset(struct ingenic_ecc *bch, in jz4780_bch_reset() argument
68 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_reset()
70 /* Set up BCH count register. */ in jz4780_bch_reset()
73 writel(reg, bch->base + BCH_BHCNT); in jz4780_bch_reset()
75 /* Initialise and enable BCH. */ in jz4780_bch_reset()
80 writel(reg, bch->base + BCH_BHCR); in jz4780_bch_reset()
83 static void jz4780_bch_disable(struct ingenic_ecc *bch) in jz4780_bch_disable() argument
85 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_disable()
[all …]
|
| D | Kconfig | 8 based boards, using the BCH controller for hardware error correction.
16 tristate "Hardware BCH support for JZ4740 SoC"
26 tristate "Hardware BCH support for JZ4725B SoC"
29 Enable this driver to support the BCH error-correction hardware
33 will be called jz4725b-bch.
36 tristate "Hardware BCH support for JZ4780 SoC"
39 Enable this driver to support the BCH error-correction hardware
43 will be called jz4780-bch.
|
| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ingenic/ |
| D | jz4725b_bch.c | 3 * JZ4725B BCH controller driver
59 /* Timeout for BCH calculation/correction. */
62 static inline void jz4725b_bch_config_set(struct ingenic_ecc *bch, u32 cfg) in jz4725b_bch_config_set() argument
64 writel(cfg, bch->base + BCH_BHCSR); in jz4725b_bch_config_set()
67 static inline void jz4725b_bch_config_clear(struct ingenic_ecc *bch, u32 cfg) in jz4725b_bch_config_clear() argument
69 writel(cfg, bch->base + BCH_BHCCR); in jz4725b_bch_config_clear()
72 static int jz4725b_bch_reset(struct ingenic_ecc *bch, in jz4725b_bch_reset() argument
78 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4725b_bch_reset()
80 /* Initialise and enable BCH. */ in jz4725b_bch_reset()
81 jz4725b_bch_config_clear(bch, 0x1f); in jz4725b_bch_reset()
[all …]
|
| D | jz4780_bch.c | 3 * JZ4780 BCH controller driver
59 /* Timeout for BCH calculation/correction. */
62 static void jz4780_bch_reset(struct ingenic_ecc *bch, in jz4780_bch_reset() argument
68 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_reset()
70 /* Set up BCH count register. */ in jz4780_bch_reset()
73 writel(reg, bch->base + BCH_BHCNT); in jz4780_bch_reset()
75 /* Initialise and enable BCH. */ in jz4780_bch_reset()
80 writel(reg, bch->base + BCH_BHCR); in jz4780_bch_reset()
83 static void jz4780_bch_disable(struct ingenic_ecc *bch) in jz4780_bch_disable() argument
85 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_disable()
[all …]
|
| D | Kconfig | 8 based boards, using the BCH controller for hardware error correction.
16 tristate "Hardware BCH support for JZ4740 SoC"
26 tristate "Hardware BCH support for JZ4725B SoC"
29 Enable this driver to support the BCH error-correction hardware
33 will be called jz4725b-bch.
36 tristate "Hardware BCH support for JZ4780 SoC"
39 Enable this driver to support the BCH error-correction hardware
43 will be called jz4780-bch.
|
| /kernel/linux/linux-6.6/drivers/isdn/mISDN/ |
| D | hwchannel.c | 39 struct bchannel *bch = container_of(ws, struct bchannel, workq); in bchannel_bh() local
43 if (test_and_clear_bit(FLG_RECVQUEUE, &bch->Flags)) { in bchannel_bh()
44 while ((skb = skb_dequeue(&bch->rqueue))) { in bchannel_bh()
45 bch->rcount--; in bchannel_bh()
46 if (likely(bch->ch.peer)) { in bchannel_bh()
47 err = bch->ch.recv(bch->ch.peer, skb); in bchannel_bh()
156 mISDN_ctrl_bchannel(struct bchannel *bch, struct mISDN_ctrl_req *cq) in mISDN_ctrl_bchannel() argument
167 memset(bch->fill, cq->p2 & 0xff, MISDN_BCH_FILL_SIZE); in mISDN_ctrl_bchannel()
168 test_and_set_bit(FLG_FILLEMPTY, &bch->Flags); in mISDN_ctrl_bchannel()
170 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); in mISDN_ctrl_bchannel()
[all …]
|
| /kernel/linux/linux-5.10/drivers/isdn/mISDN/ |
| D | hwchannel.c | 39 struct bchannel *bch = container_of(ws, struct bchannel, workq); in bchannel_bh() local
43 if (test_and_clear_bit(FLG_RECVQUEUE, &bch->Flags)) { in bchannel_bh()
44 while ((skb = skb_dequeue(&bch->rqueue))) { in bchannel_bh()
45 bch->rcount--; in bchannel_bh()
46 if (likely(bch->ch.peer)) { in bchannel_bh()
47 err = bch->ch.recv(bch->ch.peer, skb); in bchannel_bh()
156 mISDN_ctrl_bchannel(struct bchannel *bch, struct mISDN_ctrl_req *cq) in mISDN_ctrl_bchannel() argument
167 memset(bch->fill, cq->p2 & 0xff, MISDN_BCH_FILL_SIZE); in mISDN_ctrl_bchannel()
168 test_and_set_bit(FLG_FILLEMPTY, &bch->Flags); in mISDN_ctrl_bchannel()
170 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); in mISDN_ctrl_bchannel()
[all …]
|
| /kernel/linux/linux-5.10/drivers/isdn/hardware/mISDN/ |
| D | avmfritz.c | 130 struct bchannel bch[2]; member
141 card->bch[0].debug = debug; in _set_debug()
142 card->bch[1].debug = debug; in _set_debug()
250 if (test_bit(FLG_ACTIVE, &fc->bch[0].Flags) && in Sel_BCS()
251 (fc->bch[0].nr & channel)) in Sel_BCS()
252 return &fc->bch[0]; in Sel_BCS()
253 else if (test_bit(FLG_ACTIVE, &fc->bch[1].Flags) && in Sel_BCS()
254 (fc->bch[1].nr & channel)) in Sel_BCS()
255 return &fc->bch[1]; in Sel_BCS()
275 write_ctrl(struct bchannel *bch, int which) { in write_ctrl() argument
[all …]
|
| D | mISDNisar.c | 68 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { in send_mbox()
97 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { in rcv_mbox()
174 u32 saved_debug = isar->ch[0].bch.debug; in load_firmware()
193 isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO; in load_firmware()
280 isar->ch[0].bch.debug = saved_debug; in load_firmware()
392 isar->ch[0].bch.debug = saved_debug; in load_firmware()
404 _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC); in deliver_status()
418 if (test_bit(FLG_RX_OFF, &ch->bch.Flags)) { in isar_rcv_frame()
419 ch->bch.dropcnt += ch->is->clsb; in isar_rcv_frame()
423 switch (ch->bch.state) { in isar_rcv_frame()
[all …]
|
| D | netjet.c | 42 struct bchannel bch; member
96 card->bc[0].bch.debug = debug; in _set_debug()
97 card->bc[1].bch.debug = debug; in _set_debug()
177 struct tiger_hw *card = bc->bch.hw; in fill_mem()
181 bc->bch.nr, fill, cnt, idx, card->send.idx); in fill_mem()
182 if (bc->bch.nr & 2) { in fill_mem()
200 struct tiger_hw *card = bc->bch.hw; in mode_tiger()
203 bc->bch.nr, bc->bch.state, protocol); in mode_tiger()
206 if (bc->bch.state == ISDN_P_NONE) in mode_tiger()
209 bc->bch.state = protocol; in mode_tiger()
[all …]
|
| D | w6692.c | 45 struct bchannel bch; member
83 card->bc[0].bch.debug = debug; in _set_debug()
84 card->bc[1].bch.debug = debug; in _set_debug()
447 struct w6692_hw *card = wch->bch.hw; in W6692_empty_Bfifo()
452 if (unlikely(wch->bch.state == ISDN_P_NONE)) { in W6692_empty_Bfifo()
455 if (wch->bch.rx_skb) in W6692_empty_Bfifo()
456 skb_trim(wch->bch.rx_skb, 0); in W6692_empty_Bfifo()
459 if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) { in W6692_empty_Bfifo()
460 wch->bch.dropcnt += count; in W6692_empty_Bfifo()
464 maxlen = bchannel_get_rxbuf(&wch->bch, count); in W6692_empty_Bfifo()
[all …]
|
| D | hfcpci.c | 134 struct bchannel bch[2]; member
309 if (test_bit(FLG_ACTIVE, &hc->bch[0].Flags) && in Sel_BCS()
310 (hc->bch[0].nr & channel)) in Sel_BCS()
311 return &hc->bch[0]; in Sel_BCS()
312 else if (test_bit(FLG_ACTIVE, &hc->bch[1].Flags) && in Sel_BCS()
313 (hc->bch[1].nr & channel)) in Sel_BCS()
314 return &hc->bch[1]; in Sel_BCS()
367 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
381 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
393 hfcpci_empty_bfifo(struct bchannel *bch, struct bzfifo *bz, in hfcpci_empty_bfifo() argument
[all …]
|
| D | mISDNipac.c | 885 pr_debug("%s: B%1d CEC %d us\n", hx->ip->name, hx->bch.nr, in waitforCEC()
888 pr_info("%s: B%1d CEC timeout\n", hx->ip->name, hx->bch.nr); in waitforCEC()
905 pr_debug("%s: B%1d XFW %d us\n", hx->ip->name, hx->bch.nr, in waitforXFW()
908 pr_info("%s: B%1d XFW timeout\n", hx->ip->name, hx->bch.nr); in waitforXFW()
928 pr_debug("%s: B%1d %d\n", hscx->ip->name, hscx->bch.nr, count); in hscx_empty_fifo()
929 if (test_bit(FLG_RX_OFF, &hscx->bch.Flags)) { in hscx_empty_fifo()
930 hscx->bch.dropcnt += count; in hscx_empty_fifo()
934 maxlen = bchannel_get_rxbuf(&hscx->bch, count); in hscx_empty_fifo()
937 if (hscx->bch.rx_skb) in hscx_empty_fifo()
938 skb_trim(hscx->bch.rx_skb, 0); in hscx_empty_fifo()
[all …]
|
| D | hfcsusb.c | 47 static int hfcsusb_setup_bch(struct bchannel *bch, int protocol);
48 static void deactivate_bchannel(struct bchannel *bch);
198 struct bchannel *bch = container_of(ch, struct bchannel, ch); in hfcusb_l2l1B() local
199 struct hfcsusb *hw = bch->hw; in hfcusb_l2l1B()
210 ret = bchannel_senddata(bch, skb); in hfcusb_l2l1B()
219 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) { in hfcusb_l2l1B()
220 hfcsusb_start_endpoint(hw, bch->nr - 1); in hfcusb_l2l1B()
221 ret = hfcsusb_setup_bch(bch, ch->protocol); in hfcusb_l2l1B()
229 deactivate_bchannel(bch); in hfcusb_l2l1B()
251 phi = kzalloc(struct_size(phi, bch, dch->dev.nrbchan), GFP_ATOMIC); in hfcsusb_ph_info()
[all …]
|
| /kernel/linux/linux-6.6/drivers/isdn/hardware/mISDN/ |
| D | avmfritz.c | 130 struct bchannel bch[2]; member
141 card->bch[0].debug = debug; in _set_debug()
142 card->bch[1].debug = debug; in _set_debug()
250 if (test_bit(FLG_ACTIVE, &fc->bch[0].Flags) && in Sel_BCS()
251 (fc->bch[0].nr & channel)) in Sel_BCS()
252 return &fc->bch[0]; in Sel_BCS()
253 else if (test_bit(FLG_ACTIVE, &fc->bch[1].Flags) && in Sel_BCS()
254 (fc->bch[1].nr & channel)) in Sel_BCS()
255 return &fc->bch[1]; in Sel_BCS()
275 write_ctrl(struct bchannel *bch, int which) { in write_ctrl() argument
[all …]
|
| D | mISDNisar.c | 68 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { in send_mbox()
97 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { in rcv_mbox()
174 u32 saved_debug = isar->ch[0].bch.debug; in load_firmware()
193 isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO; in load_firmware()
280 isar->ch[0].bch.debug = saved_debug; in load_firmware()
392 isar->ch[0].bch.debug = saved_debug; in load_firmware()
404 _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC); in deliver_status()
418 if (test_bit(FLG_RX_OFF, &ch->bch.Flags)) { in isar_rcv_frame()
419 ch->bch.dropcnt += ch->is->clsb; in isar_rcv_frame()
423 switch (ch->bch.state) { in isar_rcv_frame()
[all …]
|
| D | netjet.c | 42 struct bchannel bch; member
96 card->bc[0].bch.debug = debug; in _set_debug()
97 card->bc[1].bch.debug = debug; in _set_debug()
177 struct tiger_hw *card = bc->bch.hw; in fill_mem()
181 bc->bch.nr, fill, cnt, idx, card->send.idx); in fill_mem()
182 if (bc->bch.nr & 2) { in fill_mem()
200 struct tiger_hw *card = bc->bch.hw; in mode_tiger()
203 bc->bch.nr, bc->bch.state, protocol); in mode_tiger()
206 if (bc->bch.state == ISDN_P_NONE) in mode_tiger()
209 bc->bch.state = protocol; in mode_tiger()
[all …]
|
| D | w6692.c | 45 struct bchannel bch; member
83 card->bc[0].bch.debug = debug; in _set_debug()
84 card->bc[1].bch.debug = debug; in _set_debug()
447 struct w6692_hw *card = wch->bch.hw; in W6692_empty_Bfifo()
452 if (unlikely(wch->bch.state == ISDN_P_NONE)) { in W6692_empty_Bfifo()
455 if (wch->bch.rx_skb) in W6692_empty_Bfifo()
456 skb_trim(wch->bch.rx_skb, 0); in W6692_empty_Bfifo()
459 if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) { in W6692_empty_Bfifo()
460 wch->bch.dropcnt += count; in W6692_empty_Bfifo()
464 maxlen = bchannel_get_rxbuf(&wch->bch, count); in W6692_empty_Bfifo()
[all …]
|
| D | hfcpci.c | 134 struct bchannel bch[2]; member
309 if (test_bit(FLG_ACTIVE, &hc->bch[0].Flags) && in Sel_BCS()
310 (hc->bch[0].nr & channel)) in Sel_BCS()
311 return &hc->bch[0]; in Sel_BCS()
312 else if (test_bit(FLG_ACTIVE, &hc->bch[1].Flags) && in Sel_BCS()
313 (hc->bch[1].nr & channel)) in Sel_BCS()
314 return &hc->bch[1]; in Sel_BCS()
367 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
381 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
393 hfcpci_empty_bfifo(struct bchannel *bch, struct bzfifo *bz, in hfcpci_empty_bfifo() argument
[all …]
|
| D | mISDNipac.c | 885 pr_debug("%s: B%1d CEC %d us\n", hx->ip->name, hx->bch.nr, in waitforCEC()
888 pr_info("%s: B%1d CEC timeout\n", hx->ip->name, hx->bch.nr); in waitforCEC()
905 pr_debug("%s: B%1d XFW %d us\n", hx->ip->name, hx->bch.nr, in waitforXFW()
908 pr_info("%s: B%1d XFW timeout\n", hx->ip->name, hx->bch.nr); in waitforXFW()
928 pr_debug("%s: B%1d %d\n", hscx->ip->name, hscx->bch.nr, count); in hscx_empty_fifo()
929 if (test_bit(FLG_RX_OFF, &hscx->bch.Flags)) { in hscx_empty_fifo()
930 hscx->bch.dropcnt += count; in hscx_empty_fifo()
934 maxlen = bchannel_get_rxbuf(&hscx->bch, count); in hscx_empty_fifo()
937 if (hscx->bch.rx_skb) in hscx_empty_fifo()
938 skb_trim(hscx->bch.rx_skb, 0); in hscx_empty_fifo()
[all …]
|
| D | hfcsusb.c | 47 static int hfcsusb_setup_bch(struct bchannel *bch, int protocol);
48 static void deactivate_bchannel(struct bchannel *bch);
198 struct bchannel *bch = container_of(ch, struct bchannel, ch); in hfcusb_l2l1B() local
199 struct hfcsusb *hw = bch->hw; in hfcusb_l2l1B()
210 ret = bchannel_senddata(bch, skb); in hfcusb_l2l1B()
219 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) { in hfcusb_l2l1B()
220 hfcsusb_start_endpoint(hw, bch->nr - 1); in hfcusb_l2l1B()
221 ret = hfcsusb_setup_bch(bch, ch->protocol); in hfcusb_l2l1B()
229 deactivate_bchannel(bch); in hfcusb_l2l1B()
251 phi = kzalloc(struct_size(phi, bch, dch->dev.nrbchan), GFP_ATOMIC); in hfcsusb_ph_info()
[all …]
|
| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | nand_bch.c | 4 * using binary BCH codes. It relies on the generic BCH library lib/bch.c.
17 #include <linux/bch.h>
20 * struct nand_bch_control - private NAND BCH control structure
21 * @bch: BCH control structure
26 struct bch_control *bch; member
44 bch_encode(nbc->bch, buf, chip->ecc.size, code); in nand_bch_calculate_ecc()
70 count = bch_decode(nbc->bch, NULL, chip->ecc.size, read_ecc, calc_ecc, in nand_bch_correct_data()
91 * nand_bch_init - [NAND Interface] Initialize NAND BCH error correction
95 * a pointer to a new NAND BCH control structure, or NULL upon failure
97 * Initialize NAND BCH error correction. Parameters @eccsize and @eccbytes
[all …]
|