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Searched full:c0 (Results 1 – 25 of 1256) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...51

/kernel/linux/linux-6.6/arch/arm/include/asm/hardware/
D	cp14.h	`45 #define RCP14_DBGDIDR() MRC14(0, c0, c0, 0) 46 #define RCP14_DBGDSCRint() MRC14(0, c0, c1, 0) 47 #define RCP14_DBGDTRRXint() MRC14(0, c0, c5, 0) 48 #define RCP14_DBGWFAR() MRC14(0, c0, c6, 0) 49 #define RCP14_DBGVCR() MRC14(0, c0, c7, 0) 50 #define RCP14_DBGECR() MRC14(0, c0, c9, 0) 51 #define RCP14_DBGDSCCR() MRC14(0, c0, c10, 0) 52 #define RCP14_DBGDSMCR() MRC14(0, c0, c11, 0) 53 #define RCP14_DBGDTRRXext() MRC14(0, c0, c0, 2) 54 #define RCP14_DBGDSCRext() MRC14(0, c0, c2, 2) [all …]`
/kernel/linux/linux-5.10/arch/arm/include/asm/hardware/
D	cp14.h	`45 #define RCP14_DBGDIDR() MRC14(0, c0, c0, 0) 46 #define RCP14_DBGDSCRint() MRC14(0, c0, c1, 0) 47 #define RCP14_DBGDTRRXint() MRC14(0, c0, c5, 0) 48 #define RCP14_DBGWFAR() MRC14(0, c0, c6, 0) 49 #define RCP14_DBGVCR() MRC14(0, c0, c7, 0) 50 #define RCP14_DBGECR() MRC14(0, c0, c9, 0) 51 #define RCP14_DBGDSCCR() MRC14(0, c0, c10, 0) 52 #define RCP14_DBGDSMCR() MRC14(0, c0, c11, 0) 53 #define RCP14_DBGDTRRXext() MRC14(0, c0, c0, 2) 54 #define RCP14_DBGDSCRext() MRC14(0, c0, c2, 2) [all …]`
/kernel/linux/linux-6.6/tools/testing/selftests/hid/tests/
D	test_multitouch.py	492 …c0 c0 05 0d 09 06 15 00 26 ff 00 a1 01 85 02 75 08 95 3f 09 00 82 02 01 95 3f 09 00 92 02 01 c0 05… 1112 …c0 a1 02 15 00 26 ff 00 09 01 95 39 75 08 81 01 c0 c0 05 0d 09 0e a1 01 85 11 09 23 a1 02 09 52 09… 1123 …c0 a1 02 15 00 26 ff 00 09 01 95 39 75 08 81 03 c0 c0 05 0d 09 0e a1 01 85 11 09 23 a1 02 09 52 09… 1134 …c0 a1 02 05 0d 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 09 47 81 02 95 05 81 03 09 51 75 08… 1171 …c0 09 22 a1 02 05 0d 35 00 45 00 55 00 65 00 09 42 25 01 75 01 81 02 09 32 81 02 09 47 81 02 75 05… 1181 …c0 a1 02 05 0d 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 09 47 81 02 95 05 81 03 09 51 75 08… 1190 …6 0a 26 ff 0f 09 30 81 02 46 b2 05 26 ff 0f 09 31 81 02 05 0d 75 08 85 02 09 55 25 10 b1 02 c0 c0", 1199 …c0 a1 02 05 0d 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 95 06 81 03 75 08 09 51 95 01 81 02… 1208 …c0 a1 02 05 0d 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 09 47 81 02 95 05 81 03 09 51 75 08… 1217 …c0 05 01 09 02 a1 01 09 01 a1 00 85 01 05 09 19 01 29 03 15 00 25 01 95 03 75 01 81 02 95 01 75 05… [all …]
D	test_tablet.py	703 …c0 c0 05 01 09 01 a1 01 85 01 09 01 a1 00 05 09 19 01 29 02 15 00 25 01 95 02 75 01 81 02 95 01 75… 711 …c0 c0 05 01 09 01 a1 01 85 01 09 01 a1 00 05 09 19 01 29 02 15 00 25 01 95 02 75 01 81 02 95 01 75… 719 …c0 c0 05 01 09 01 a1 01 85 01 09 01 a1 00 05 09 19 01 29 02 15 00 25 01 95 02 75 01 81 02 95 01 75… 727 …c0 c0 05 01 09 01 a1 01 85 01 09 01 a1 00 05 09 19 01 29 02 15 00 25 01 95 02 75 01 81 02 95 01 75… 735 …c0 c0 05 01 09 01 a1 01 85 01 09 01 a1 00 05 09 19 01 29 02 15 00 25 01 95 02 75 01 81 02 95 01 75… 743 …c0 c0 05 01 09 01 a1 01 85 01 09 01 a1 00 05 09 19 01 29 02 15 00 25 01 95 02 75 01 81 02 95 01 75… 751 …c0 c0 05 0d 09 04 a1 01 85 30 09 22 a1 02 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 09 47 81… 759 …c0 a1 02 05 0d 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 95 06 81 03 75 08 09 51 95 01 81 02… 768 …c0 a1 02 05 0d 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 95 06 81 03 75 08 09 51 95 01 81 02… 777 …c0 a1 02 05 0d 09 42 15 00 25 01 75 01 95 01 81 02 09 32 81 02 95 06 81 03 75 08 09 51 95 01 81 02… [all …]
/kernel/liteos_a/arch/arm/arm/include/
D	arm.h	42 __asm__ volatile("mrc p15, 0, %0, c1,c0,0" : "=r"(val)); in OsArmReadSctlr() 48 __asm__ volatile("mcr p15, 0, %0, c1,c0,0" ::"r"(val)); in OsArmWriteSctlr() 55 __asm__ volatile("mrc p15, 0, %0, c1,c0,1" : "=r"(val)); in OsArmReadActlr() 61 __asm__ volatile("mcr p15, 0, %0, c1,c0,1" ::"r"(val)); in OsArmWriteActlr() 68 __asm__ volatile("mrc p15, 0, %0, c1,c0,2" : "=r"(val)); in OsArmReadCpacr() 74 __asm__ volatile("mcr p15, 0, %0, c1,c0,2" ::"r"(val)); in OsArmWriteCpacr() 81 __asm__ volatile("mrc p15, 0, %0, c2,c0,0" : "=r"(val)); in OsArmReadTtbr() 87 __asm__ volatile("mcr p15, 0, %0, c2,c0,0" ::"r"(val)); in OsArmWriteTtbr() 94 __asm__ volatile("mrc p15, 0, %0, c2,c0,0" : "=r"(val)); in OsArmReadTtbr0() 100 __asm__ volatile("mcr p15, 0, %0, c2,c0,0" ::"r"(val)); in OsArmWriteTtbr0() [all …]
D	los_hw_cpu.h	90 * Identification registers (c0) 92 #define MIDR CP15_REG(c0, 0, c0, 0) /* Main ID Register / 93 #define MPIDR CP15_REG(c0, 0, c0, 5) / Multiprocessor Affinity Register / 94 #define CCSIDR CP15_REG(c0, 1, c0, 0) / Cache Size ID Registers / 95 #define CLIDR CP15_REG(c0, 1, c0, 1) / Cache Level ID Register / 96 #define VPIDR CP15_REG(c0, 4, c0, 0) / Virtualization Processor ID Register / 97 #define VMPIDR CP15_REG(c0, 4, c0, 5) / Virtualization Multiprocessor ID Register … 102 #define SCTLR CP15_REG(c1, 0, c0, 0) /* System Control Register / 103 #define ACTLR CP15_REG(c1, 0, c0, 1) / Auxiliary Control Register / 104 #define CPACR CP15_REG(c1, 0, c0, 2) / Coprocessor Access Control Register */ [all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
D	g98.fuc0s	`514 cxsin $c0 515 cxsout $c0 525 cxsin $c0 526 cenc $c0 $c0 527 cxsout $c0 533 cxsin $c0 534 cdec $c0 $c0 535 cxsout $c0 540 cxsin $c0 541 cxor $c6 $c0 [all …]`
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
D	g98.fuc0s	`514 cxsin $c0 515 cxsout $c0 525 cxsin $c0 526 cenc $c0 $c0 527 cxsout $c0 533 cxsin $c0 534 cdec $c0 $c0 535 cxsout $c0 540 cxsin $c0 541 cxor $c6 $c0 [all …]`
/kernel/linux/linux-5.10/arch/arm/mm/
D	proc-v7.S	`32 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 35 mcr p15, 0, r0, c1, c0, 0 @ disable caches 55 mrc p15, 0, r2, c1, c0, 0 @ ctrl register 58 mcr p15, 0, r2, c1, c0, 0 @ disable MMU 134 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 135 mrc p15, 0, r5, c13, c0, 3 @ User r/o thread ID 138 mrc p15, 0, r6, c3, c0, 0 @ Domain ID 142 mrc p15, 0, r7, c2, c0, 1 @ TTB 1 144 mrc p15, 0, r11, c2, c0, 2 @ TTB control register 146 mrc p15, 0, r8, c1, c0, 0 @ Control register [all …]`
D	proc-v6.S	`39 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 42 mcr p15, 0, r0, c1, c0, 0 @ disable caches 57 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 59 mcr p15, 0, r1, c1, c0, 0 @ disable MMU 76 mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt 104 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 106 mrc p15, 0, r2, c13, c0, 1 @ read current context ID 111 mcr p15, 0, r1, c13, c0, 1 @ set context ID 139 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 141 mrc p15, 0, r5, c3, c0, 0 @ Domain ID [all …]`
D	proc-sa1100.S	`42 mcr p15, 0, r0, c9, c0, 5 @ Allow read-buffer operations from userland 54 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 57 mcr p15, 0, r0, c1, c0, 0 @ disable caches 78 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 81 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 147 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB 148 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 175 mrc p15, 0, r4, c3, c0, 0 @ domain ID 176 mrc p15, 0, r5, c13, c0, 0 @ PID 177 mrc p15, 0, r6, c1, c0, 0 @ control reg [all …]`
D	proc-arm740.S	`37 mrc p15, 0, r0, c1, c0, 0 40 mcr p15, 0, r0, c1, c0, 0 @ disable caches 51 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache 52 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register 54 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 62 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches 71 mcr p15, 0, r0, c6, c0 @ set area 0, default 97 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable 103 mcr p15, 0, r0, c3, c0 107 mcr p15, 0, r0, c5, c0 @ all read/write access [all …]`
/kernel/linux/linux-6.6/arch/arm/mm/
D	proc-v7.S	`34 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 37 mcr p15, 0, r0, c1, c0, 0 @ disable caches 57 mrc p15, 0, r2, c1, c0, 0 @ ctrl register 60 mcr p15, 0, r2, c1, c0, 0 @ disable MMU 136 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 137 mrc p15, 0, r5, c13, c0, 3 @ User r/o thread ID 140 mrc p15, 0, r6, c3, c0, 0 @ Domain ID 144 mrc p15, 0, r7, c2, c0, 1 @ TTB 1 146 mrc p15, 0, r11, c2, c0, 2 @ TTB control register 148 mrc p15, 0, r8, c1, c0, 0 @ Control register [all …]`
D	proc-v6.S	`41 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 44 mcr p15, 0, r0, c1, c0, 0 @ disable caches 59 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 61 mcr p15, 0, r1, c1, c0, 0 @ disable MMU 78 mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt 106 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 108 mrc p15, 0, r2, c13, c0, 1 @ read current context ID 113 mcr p15, 0, r1, c13, c0, 1 @ set context ID 141 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 143 mrc p15, 0, r5, c3, c0, 0 @ Domain ID [all …]`
D	proc-sa1100.S	`42 mcr p15, 0, r0, c9, c0, 5 @ Allow read-buffer operations from userland 54 mrc p15, 0, r0, c1, c0, 0 @ ctrl register 57 mcr p15, 0, r0, c1, c0, 0 @ disable caches 78 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 81 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 147 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB 148 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 175 mrc p15, 0, r4, c3, c0, 0 @ domain ID 176 mrc p15, 0, r5, c13, c0, 0 @ PID 177 mrc p15, 0, r6, c1, c0, 0 @ control reg [all …]`
/kernel/linux/linux-5.10/arch/arm/include/debug/
D	icedcc.S	`16 mcr p14, 0, \rd, c0, c5, 0 21 mrc p14, 0, \rx, c0, c1, 0 34 mrc p14, 0, \rx, c0, c1, 0 43 mcr p14, 0, \rd, c8, c0, 0 48 mrc p14, 0, \rx, c14, c0, 0 61 mrc p14, 0, \rx, c14, c0, 0 70 mcr p14, 0, \rd, c1, c0, 0 75 mrc p14, 0, \rx, c0, c0, 0 89 mrc p14, 0, \rx, c0, c0, 0`
/kernel/linux/linux-6.6/arch/arm/include/debug/
D	icedcc.S	`16 mcr p14, 0, \rd, c0, c5, 0 21 mrc p14, 0, \rx, c0, c1, 0 34 mrc p14, 0, \rx, c0, c1, 0 43 mcr p14, 0, \rd, c8, c0, 0 48 mrc p14, 0, \rx, c14, c0, 0 61 mrc p14, 0, \rx, c14, c0, 0 70 mcr p14, 0, \rd, c1, c0, 0 75 mrc p14, 0, \rx, c0, c0, 0 89 mrc p14, 0, \rx, c0, c0, 0`
/kernel/linux/linux-6.6/arch/s390/crypto/
D	chacha-s390.S	`442 #define C0 %v2 macro 514 VLR C0,K2 545 VAF C0,C0,D0 551 VX B0,B0,C0 583 VAF C0,C0,D0 589 VX B0,B0,C0 602 VSLDB C0,C0,C0,8 640 VAF C0,C0,D0 646 VX B0,B0,C0 678 VAF C0,C0,D0 [all …]`
/kernel/linux/linux-5.10/arch/arm/kernel/
D	hyp-stub.S	`114 mcr p15, 4, r7, c12, c0, 0 @ set hypervisor vector base (HVBAR) 124 mcr p15, 4, r7, c1, c0, 0 @ HSCTLR 131 mrc p15, 0, r7, c1, c0, 0 @ SCTLR 135 mcr p15, 0, r7, c1, c0, 0 @ SCTLR 137 mrc p15, 0, r7, c0, c0, 0 @ MIDR 138 mcr p15, 4, r7, c0, c0, 0 @ VPIDR 140 mrc p15, 0, r7, c0, c0, 5 @ MPIDR 141 mcr p15, 4, r7, c0, c0, 5 @ VMPIDR 145 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 164 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 [all …]`
/kernel/linux/linux-6.6/arch/arm/kernel/
D	hyp-stub.S	`116 mcr p15, 4, r7, c12, c0, 0 @ set hypervisor vector base (HVBAR) 126 mcr p15, 4, r7, c1, c0, 0 @ HSCTLR 133 mrc p15, 0, r7, c1, c0, 0 @ SCTLR 137 mcr p15, 0, r7, c1, c0, 0 @ SCTLR 139 mrc p15, 0, r7, c0, c0, 0 @ MIDR 140 mcr p15, 4, r7, c0, c0, 0 @ VPIDR 142 mrc p15, 0, r7, c0, c0, 5 @ MPIDR 143 mcr p15, 4, r7, c0, c0, 5 @ VMPIDR 147 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 166 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 [all …]`
/kernel/linux/linux-5.10/drivers/gpu/drm/tidss/
D	tidss_scale_coefs.c	19 .c0 = { 192, 192, 192, 190, 188, 186, 184, 182, 180, }, 25 .c0 = { 200, 202, 204, 202, 200, 196, 192, 188, 184, }, 31 .c0 = { 216, 216, 216, 214, 212, 208, 204, 198, 192, }, 37 .c0 = { 232, 232, 232, 226, 220, 218, 216, 208, 200, }, 43 .c0 = { 264, 262, 260, 254, 248, 242, 236, 226, 216, }, 49 .c0 = { 288, 286, 284, 280, 276, 266, 256, 244, 232, }, 55 .c0 = { 312, 308, 304, 298, 292, 282, 272, 258, 244, }, 61 .c0 = { 336, 332, 328, 320, 312, 300, 288, 272, 256, }, 67 .c0 = { 368, 364, 360, 350, 340, 326, 312, 292, 272, }, 73 .c0 = { 400, 398, 396, 384, 372, 354, 336, 312, 288, }, [all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/tidss/
D	tidss_scale_coefs.c	19 .c0 = { 192, 192, 192, 190, 188, 186, 184, 182, 180, }, 25 .c0 = { 200, 202, 204, 202, 200, 196, 192, 188, 184, }, 31 .c0 = { 216, 216, 216, 214, 212, 208, 204, 198, 192, }, 37 .c0 = { 232, 232, 232, 226, 220, 218, 216, 208, 200, }, 43 .c0 = { 264, 262, 260, 254, 248, 242, 236, 226, 216, }, 49 .c0 = { 288, 286, 284, 280, 276, 266, 256, 244, 232, }, 55 .c0 = { 312, 308, 304, 298, 292, 282, 272, 258, 244, }, 61 .c0 = { 336, 332, 328, 320, 312, 300, 288, 272, 256, }, 67 .c0 = { 368, 364, 360, 350, 340, 326, 312, 292, 272, }, 73 .c0 = { 400, 398, 396, 384, 372, 354, 336, 312, 288, }, [all …]
/kernel/linux/linux-6.6/arch/arm/boot/compressed/
D	head.S	`38 mcr p14, 0, \ch, c0, c5, 0 44 mcr p14, 0, \ch, c8, c0, 0 50 mcr p14, 0, \ch, c1, c0, 0 141 mrc p15, 0, \reg, c1, c0, 0 @ read SCTLR 145 mcr p15, 0, \reg, c1, c0, 0 @ write SCTLR 696 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr 735 mcr p15, 0, r0, c2, c0, 0 @ D-cache on 736 mcr p15, 0, r0, c2, c0, 1 @ I-cache on 737 mcr p15, 0, r0, c3, c0, 0 @ write-buffer on 740 mcr p15, 0, r0, c5, c0, 1 @ I-access permission [all …]`
/kernel/linux/linux-5.10/arch/arm/mach-sunxi/
D	headsmp.S	`25 mrc p15, 0, r1, c0, c0, 0 37 mrc p15, 1, r1, c15, c0, 4 39 mcr p15, 1, r1, c15, c0, 4 42 mrc p15, 1, r1, c15, c0, 0 47 mcr p15, 1, r1, c15, c0, 0 50 mrc p15, 1, r1, c9, c0, 2 53 mcr p15, 1, r1, c9, c0, 2`
/kernel/linux/linux-6.6/arch/arm/mach-sunxi/
D	headsmp.S	`25 mrc p15, 0, r1, c0, c0, 0 37 mrc p15, 1, r1, c15, c0, 4 39 mcr p15, 1, r1, c15, c0, 4 42 mrc p15, 1, r1, c15, c0, 0 47 mcr p15, 1, r1, c15, c0, 0 50 mrc p15, 1, r1, c9, c0, 2 53 mcr p15, 1, r1, c9, c0, 2`

12 3 4 5 6 7 8 9 10 >>...51