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Searched full:clk_top_apll12_div3 (Results 1 – 25 of 30) sorted by relevance

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/kernel/linux/linux-6.6/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c47 CLK_TOP_APLL12_DIV3, enumerator
86 [CLK_TOP_APLL12_DIV3] = "top_apll12_div3",
526 .div_clk_id = CLK_TOP_APLL12_DIV3,
/kernel/linux/linux-5.10/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c47 CLK_TOP_APLL12_DIV3, enumerator
86 [CLK_TOP_APLL12_DIV3] = "top_apll12_div3",
526 .div_clk_id = CLK_TOP_APLL12_DIV3,
/kernel/linux/linux-6.6/include/dt-bindings/clock/
Dmt8516-clk.h154 #define CLK_TOP_APLL12_DIV3 122 macro
Dmt6765-clk.h116 #define CLK_TOP_APLL12_DIV3 81 macro
Dmt8183-clk.h161 #define CLK_TOP_APLL12_DIV3 125 macro
Dmt6779-clk.h141 #define CLK_TOP_APLL12_DIV3 131 macro
Dmt8192-clk.h157 #define CLK_TOP_APLL12_DIV3 145 macro
Dmt8195-clk.h233 #define CLK_TOP_APLL12_DIV3 221 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dmt8516-clk.h154 #define CLK_TOP_APLL12_DIV3 122 macro
Dmt6765-clk.h116 #define CLK_TOP_APLL12_DIV3 81 macro
Dmt8183-clk.h161 #define CLK_TOP_APLL12_DIV3 125 macro
Dmt6779-clk.h141 #define CLK_TOP_APLL12_DIV3 131 macro
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dmt8195-afe-pcm.yaml166 <&topckgen 236>, //CLK_TOP_APLL12_DIV3
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8192/
Dmt8192-afe-clk.h209 CLK_TOP_APLL12_DIV3, enumerator
Dmt8192-afe-clk.c52 [CLK_TOP_APLL12_DIV3] = "top_apll12_div3",
461 .div_clk_id = CLK_TOP_APLL12_DIV3,
/kernel/linux/linux-6.6/drivers/clk/mediatek/
Dclk-mt8516.c635 GATE_TOP5(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll12_ck_div3", 3),
Dclk-mt8167.c853 GATE_TOP5(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll12_ck_div3", 3),
Dclk-mt6765.c519 GATE_TOP2(CLK_TOP_APLL12_DIV3, "apll12_div3", "aud_1_ck", 5),
Dclk-mt8183.c628 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll_i2s3_sel", 0x320, 5, 0x324, 8, 24),
Dclk-mt8192.c703 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll_i2s3_m_sel", 0x320, 3, 0x328, 8, 24),
Dclk-mt6779.c833 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "i2s3_m_ck_sel",
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8516.c669 GATE_TOP5(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll12_ck_div3", 3),
Dclk-mt8167.c915 GATE_TOP5(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll12_ck_div3", 3),
Dclk-mt6765.c534 GATE_TOP2(CLK_TOP_APLL12_DIV3, "apll12_div3", "aud_1_ck", 5),
Dclk-mt6779.c833 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "i2s3_m_ck_sel",

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