| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/x86/ |
| D | ce4100.txt | 2 ---------------------------
5 format: <vendor>,<chip>-<device>.
10 The CPU nodes
11 -------------
14 #address-cells = <1>;
15 #size-cells = <0>;
17 cpu@0 {
18 device_type = "cpu";
23 cpu@2 {
24 device_type = "cpu";
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/x86/ |
| D | ce4100.txt | 2 ---------------------------
5 format: <vendor>,<chip>-<device>.
10 The CPU nodes
11 -------------
14 #address-cells = <1>;
15 #size-cells = <0>;
17 cpu@0 {
18 device_type = "cpu";
23 cpu@2 {
24 device_type = "cpu";
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/loongson2ef/common/ |
| D | pci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/pci.h>
8 #include <pci.h>
12 .name = "pci memory space",
19 .name = "pci io space",
36 * local to PCI mapping for CPU accessing PCI space in setup_pcimap()
37 * CPU address space [256M,448M] is window for accessing pci space in setup_pcimap()
38 * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M] in setup_pcimap()
49 * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M] in setup_pcimap()
51 LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */ in setup_pcimap()
[all …]
|
| /kernel/linux/linux-6.6/arch/mips/loongson2ef/common/ |
| D | pci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/pci.h>
8 #include <pci.h>
12 .name = "pci memory space",
19 .name = "pci io space",
36 * local to PCI mapping for CPU accessing PCI space in setup_pcimap()
37 * CPU address space [256M,448M] is window for accessing pci space in setup_pcimap()
38 * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M] in setup_pcimap()
49 * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M] in setup_pcimap()
51 LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */ in setup_pcimap()
[all …]
|
| /kernel/linux/linux-6.6/arch/x86/hyperv/ |
| D | irqdomain.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Irqdomain for Linux to run as the root partition on Microsoft Hypervisor.
11 #include <linux/pci.h>
16 int cpu, int vector, struct hv_interrupt_entry *entry) in hv_map_interrupt() argument
30 intr_desc = &input->interrupt_descriptor; in hv_map_interrupt()
32 input->partition_id = hv_current_partition_id; in hv_map_interrupt()
33 input->device_id = device_id.as_uint64; in hv_map_interrupt()
34 intr_desc->interrupt_type = HV_X64_INTERRUPT_TYPE_FIXED; in hv_map_interrupt()
35 intr_desc->vector_count = 1; in hv_map_interrupt()
36 intr_desc->target.vector = vector; in hv_map_interrupt()
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlxsw/ |
| D | pci_hw.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
74 MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
79 * For Ethernet EMAD (Direct Route and non Direct Route) -
81 * For InfiniBand CTL - must be set if packet destination is local device
86 MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
91 MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
94 * Size of i-th scatter/gather entry, 0 if entry is unused.
96 MLXSW_ITEM16_INDEXED(pci, wqe, byte_count, 0x02, 0, 14, 0x02, 0x00, false);
99 * Physical address of i-th scatter/gather entry.
[all …]
|
| /kernel/linux/linux-6.6/block/ |
| D | blk-mq-pci.c | 1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/blk-mq-pci.h>
8 #include <linux/pci.h>
11 #include "blk-mq.h"
14 * blk_mq_pci_map_queues - provide a default queue mapping for PCI device
15 * @qmap: CPU to hardware queue map.
16 * @pdev: PCI device associated with @set.
17 * @offset: Offset to use for the pci irq vector
19 * This function assumes the PCI device @pdev has at least as many available
21 * corresponding to each queue for it's affinity mask and built queue mapping
[all …]
|
| /kernel/linux/linux-5.10/block/ |
| D | blk-mq-pci.c | 1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/blk-mq.h>
8 #include <linux/blk-mq-pci.h>
9 #include <linux/pci.h>
12 #include "blk-mq.h"
15 * blk_mq_pci_map_queues - provide a default queue mapping for PCI device
16 * @qmap: CPU to hardware queue map.
17 * @pdev: PCI device associated with @set.
18 * @offset: Offset to use for the pci irq vector
20 * This function assumes the PCI device @pdev has at least as many available
[all …]
|
| /kernel/linux/linux-6.6/arch/mips/include/asm/mach-loongson2ef/ |
| D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
18 * we use address window2 to map cpu address space to pci space
19 * window2: cpu [1G, 2G] -> pci [1G, 2G]
20 * why not use window 0 & 1? because they are used by cpu when booting.
21 * window0: cpu [0, 256M] -> ddr [0, 256M]
22 * window1: cpu [256M, 512M] -> pci [256M, 512M]
30 #define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */
32 #define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \
37 /* this pci memory space is mapped by pcimap in pci.c */
|
| /kernel/linux/linux-5.10/arch/mips/include/asm/mach-loongson2ef/ |
| D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
18 * we use address window2 to map cpu address space to pci space
19 * window2: cpu [1G, 2G] -> pci [1G, 2G]
20 * why not use window 0 & 1? because they are used by cpu when booting.
21 * window0: cpu [0, 256M] -> ddr [0, 256M]
22 * window1: cpu [256M, 512M] -> pci [256M, 512M]
30 #define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */
32 #define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \
37 /* this pci memory space is mapped by pcimap in pci.c */
|
| /kernel/linux/linux-6.6/Documentation/driver-api/ |
| D | edac.rst | 5 ----------------------------------------
7 There are several things to be aware of that aren't at all obvious, like
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
21 typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.
37 A memory controller channel, responsible to communicate with a group of
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
47 some performance penalty. Also, it is generally not possible to point to
49 is calculated using two DIMMs instead of one. Due to that, it is capable
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
[all …]
|
| D | device-io.rst | 10 Bus-Independent Device Accesses
20 and devices, allowing device drivers to be written independently of bus
26 Getting Access to the Device
27 ----------------------------
30 part of the CPU's address space is interpreted not as accesses to
31 memory, but as accesses to a device. Some architectures define devices
32 to be at a fixed address, but most have some method of discovering
33 devices. The PCI bus walk is a good example of such a scheme. This
34 document does not cover how to receive such an address, but assumes you
37 This address should not be used directly. Instead, to get an address
[all …]
|
| /kernel/linux/linux-6.6/arch/alpha/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
12 select DMA_OPS if PCI
14 select PCI_DOMAINS if PCI
15 select PCI_SYSCALL if PCI
42 The Alpha is a 64-bit general-purpose processor designed and
44 now Hewlett-Packard. The Alpha Linux project has a home page at
87 To find out what type of Alpha system you have, you may want to
91 Alcor/Alpha-XLT AS 600, AS 500, XL-300, XL-366
92 Alpha-XL XL-233, XL-266
102 LX164 AlphaPC164-LX
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/tremontx/ |
| D | uncore-other.json | 11 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.…
73 …"BriefDescription": "PCI Express bandwidth reading at IIO. Derived from unc_iio_data_req_of_cpu.me…
89 …"BriefDescription": "PCI Express bandwidth writing at IIO. Derived from unc_iio_data_req_of_cpu.me…
105 "BriefDescription": "PCI Express bandwidth writing at IIO, part 1",
118 "BriefDescription": "PCI Express bandwidth writing at IIO, part 2",
131 "BriefDescription": "PCI Express bandwidth writing at IIO, part 3",
144 "BriefDescription": "PCI Express bandwidth reading at IIO, part 1",
157 "BriefDescription": "PCI Express bandwidth reading at IIO, part 2",
170 "BriefDescription": "PCI Express bandwidth reading at IIO, part 3",
289 "BriefDescription": "Data requested of the CPU : Card reading from DRAM",
[all …]
|
| /kernel/linux/linux-5.10/arch/sparc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "64-bit kernel" if "$(ARCH)" = "sparc"
10 Say yes to build a 64-bit kernel - formerly known as sparc64
11 Say no to build a 32-bit kernel - formerly known as sparc
16 select ARCH_MIGHT_HAVE_PC_PARPORT if SPARC64 && PCI
46 select PCI_SYSCALL if PCI
99 select PCI_DOMAINS if PCI
165 bool "Symmetric multi-processing support"
167 This enables support for systems with more than one CPU. If you have
168 a system with only one CPU, say N. If you have a system with more
[all …]
|
| /kernel/linux/linux-6.6/arch/sparc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "64-bit kernel" if "$(ARCH)" = "sparc"
10 Say yes to build a 64-bit kernel - formerly known as sparc64
11 Say no to build a 32-bit kernel - formerly known as sparc
16 select ARCH_MIGHT_HAVE_PC_PARPORT if SPARC64 && PCI
42 select PCI_SYSCALL if PCI
102 select PCI_DOMAINS if PCI
157 bool "Symmetric multi-processing support"
159 This enables support for systems with more than one CPU. If you have
160 a system with only one CPU, say N. If you have a system with more
[all …]
|
| /kernel/linux/linux-5.10/arch/alpha/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
10 select DMA_OPS if PCI
12 select PCI_DOMAINS if PCI
13 select PCI_SYSCALL if PCI
24 select GENERIC_PCI_IOMAP if PCI
44 The Alpha is a 64-bit general-purpose processor designed and
46 now Hewlett-Packard. The Alpha Linux project has a home page at
93 To find out what type of Alpha system you have, you may want to
97 Alcor/Alpha-XLT AS 600, AS 500, XL-300, XL-366
98 Alpha-XL XL-233, XL-266
[all …]
|
| /kernel/linux/linux-6.6/arch/mips/txx9/rbtx4927/ |
| D | setup.c | 7 * Copyright 2001-2002 MontaVista Software Inc.
9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
20 * Copyright (C) 2000-2001 Toshiba Corporation
31 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
42 * with this program; if not, write to the Free Software Foundation, Inc.,
57 #include <asm/txx9/pci.h>
64 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB); in tx4927_pci_setup()
69 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) in tx4927_pci_setup()
74 /* Reset PCI Bus */ in tx4927_pci_setup()
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/txx9/rbtx4927/ |
| D | setup.c | 7 * Copyright 2001-2002 MontaVista Software Inc.
9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
20 * Copyright (C) 2000-2001 Toshiba Corporation
31 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
42 * with this program; if not, write to the Free Software Foundation, Inc.,
57 #include <asm/txx9/pci.h>
64 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB); in tx4927_pci_setup()
69 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) in tx4927_pci_setup()
74 /* Reset PCI Bus */ in tx4927_pci_setup()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/PCI/ |
| D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 How To Write Linux PCI Drivers
7 :Authors: - Martin Mares <mj@ucw.cz>
8 - Grant Grundler <grundler@parisc-linux.org>
10 The world of PCI is vast and full of (mostly unpleasant) surprises.
11 Since each CPU architecture implements different chip-sets and PCI devices
12 have different requirements (erm, "features"), the result is the PCI support
14 tries to introduce all potential driver authors to Linux APIs for
15 PCI device drivers.
18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
[all …]
|
| /kernel/linux/linux-5.10/Documentation/PCI/ |
| D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 How To Write Linux PCI Drivers
7 :Authors: - Martin Mares <mj@ucw.cz>
8 - Grant Grundler <grundler@parisc-linux.org>
10 The world of PCI is vast and full of (mostly unpleasant) surprises.
11 Since each CPU architecture implements different chip-sets and PCI devices
12 have different requirements (erm, "features"), the result is the PCI support
14 tries to introduce all potential driver authors to Linux APIs for
15 PCI device drivers.
18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/common/saa7146/ |
| D | saa7146_core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 saa7146.o - driver for generic saa7146-based hardware
5 Copyright (C) 1998-2003 Michael Hunold <michael@mihu.de>
11 #include <media/drv-intf/saa7146.h>
55 /* wait for registers to be programmed */ in saa7146_wait_for_debi_done_sleep()
63 dev->name, __func__); in saa7146_wait_for_debi_done_sleep()
64 return -ETIMEDOUT; in saa7146_wait_for_debi_done_sleep()
69 /* wait for transfer to complete */ in saa7146_wait_for_debi_done_sleep()
78 dev->name, __func__); in saa7146_wait_for_debi_done_sleep()
79 return -ETIMEDOUT; in saa7146_wait_for_debi_done_sleep()
[all …]
|
| /kernel/linux/linux-6.6/drivers/media/common/saa7146/ |
| D | saa7146_core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 saa7146.o - driver for generic saa7146-based hardware
5 Copyright (C) 1998-2003 Michael Hunold <michael@mihu.de>
11 #include <media/drv-intf/saa7146.h>
56 /* wait for registers to be programmed */ in saa7146_wait_for_debi_done_sleep()
64 dev->name, __func__); in saa7146_wait_for_debi_done_sleep()
65 return -ETIMEDOUT; in saa7146_wait_for_debi_done_sleep()
70 /* wait for transfer to complete */ in saa7146_wait_for_debi_done_sleep()
79 dev->name, __func__); in saa7146_wait_for_debi_done_sleep()
80 return -ETIMEDOUT; in saa7146_wait_for_debi_done_sleep()
[all …]
|
| /kernel/linux/linux-5.10/arch/x86/kernel/apic/ |
| D | msi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * Convert to hierarchical irqdomain
13 #include <linux/pci.h>
28 msg->address_hi = MSI_ADDR_BASE_HI; in __irq_msi_compose_msg()
31 msg->address_hi |= MSI_ADDR_EXT_DEST_ID(cfg->dest_apicid); in __irq_msi_compose_msg()
33 msg->address_lo = in __irq_msi_compose_msg()
35 ((apic->irq_dest_mode == 0) ? in __irq_msi_compose_msg()
39 MSI_ADDR_DEST_ID(cfg->dest_apicid); in __irq_msi_compose_msg()
41 msg->data = in __irq_msi_compose_msg()
45 MSI_DATA_VECTOR(cfg->vector); in __irq_msi_compose_msg()
[all …]
|
| /kernel/linux/linux-6.6/drivers/virt/nitro_enclaves/ |
| D | ne_misc_dev.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/pci.h>
20 * struct ne_mem_region - Entry in the enclave user space memory regions list.
36 * struct ne_enclave - Per-enclave data used for enclave lifetime management.
39 * @eventq: Wait queue used for out-of-band event notifications
40 * triggered from the PCI device event handler to
42 * @has_event: Variable used to determine if the out-of-band event
51 * total number of CPU cores available on the
53 * @nr_threads_per_core: The number of threads that a full CPU core has.
56 * @slot_uid: Slot unique id mapped to the enclave.
[all …]
|