| /kernel/linux/linux-6.6/block/ |
| D | disk-events.c | 18 unsigned int clearing; /* events being cleared */ member 159 ev->clearing |= mask; in disk_flush_events() 188 unsigned int clearing = *clearing_ptr; in disk_check_events() local 193 events = disk->fops->check_events(disk, clearing); in disk_check_events() 200 *clearing_ptr &= ~clearing; in disk_check_events() 231 unsigned int clearing = mask; in disk_clear_events() local 239 * store the union of mask and ev->clearing on the stack so that the in disk_clear_events() 240 * race with disk_flush_events does not cause ambiguity (ev->clearing in disk_clear_events() 244 clearing |= ev->clearing; in disk_clear_events() 245 ev->clearing = 0; in disk_clear_events() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/opal/ |
| D | sensor-groups.txt | 17 operations like clearing the min/max history of all 26 sensor groups like clearing min/max, enabling/disabling sensor
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/opal/ |
| D | sensor-groups.txt | 17 operations like clearing the min/max history of all 26 sensor groups like clearing min/max, enabling/disabling sensor
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| /kernel/linux/linux-6.6/Documentation/arch/x86/ |
| D | mds.rst | 81 clearing. Either the modified VERW instruction or via the L1D Flush 94 The kernel provides a function to invoke the buffer clearing: 179 sibling threads are offline CPU buffer clearing is not required. 181 The idle clearing is enabled on CPUs which are only affected by MSBDS 185 idle clearing would be a window dressing exercise and is therefore not
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| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | mds.rst | 81 clearing. Either the modified VERW instruction or via the L1D Flush 94 The kernel provides a function to invoke the buffer clearing: 179 sibling threads are offline CPU buffer clearing is not required. 181 The idle clearing is enabled on CPUs which are only affected by MSBDS 185 idle clearing would be a window dressing exercise and is therefore not
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| /kernel/linux/linux-6.6/drivers/net/ipa/ |
| D | ipa_interrupt.c | 61 * away, "to avoid clearing unhandled interrupts." in ipa_interrupt_process() 68 /* Clearing the SUSPEND_TX interrupt also clears the in ipa_interrupt_process() 70 * caused the interrupt, so defer clearing until after in ipa_interrupt_process() 120 dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n", in ipa_isr_thread()
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| /kernel/linux/linux-6.6/drivers/net/wwan/iosm/ |
| D | iosm_ipc_pm.c | 99 /* Complete all memory stores before clearing bit */ in ipc_pm_wait_for_device_active() 107 /* Complete all memory stores after clearing bit */ in ipc_pm_wait_for_device_active() 319 /* Complete all memory stores before clearing bit */ in ipc_pm_init() 324 /* Complete all memory stores after clearing bit */ in ipc_pm_init()
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| /kernel/linux/linux-6.6/fs/btrfs/ |
| D | fs.c | 46 "clearing incompat feature flag for %s (0x%llx)", in __btrfs_clear_fs_incompat() 92 "clearing compat-ro feature flag for %s (0x%llx)", in __btrfs_clear_fs_compat_ro()
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| /kernel/linux/linux-5.10/Documentation/vm/ |
| D | mmu_notifier.rst | 6 When clearing a pte/pmd we are given a choice to notify the event through 13 those secondary TLB while holding page table lock when clearing a pte/pmd: 29 If clearing the page table entry is not followed by a notify before setting
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| /kernel/linux/linux-6.6/Documentation/mm/ |
| D | mmu_notifier.rst | 4 When clearing a pte/pmd we are given a choice to notify the event through 11 those secondary TLB while holding page table lock when clearing a pte/pmd: 27 If clearing the page table entry is not followed by a notify before setting
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| /kernel/linux/linux-5.10/arch/arm/mach-berlin/ |
| D | platsmp.c | 20 * There are two reset registers, one with self-clearing (SC) 21 * reset and one with non-self-clearing reset (NON_SC).
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| /kernel/linux/linux-6.6/arch/arm/mach-berlin/ |
| D | platsmp.c | 20 * There are two reset registers, one with self-clearing (SC) 21 * reset and one with non-self-clearing reset (NON_SC).
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| /kernel/linux/linux-5.10/arch/x86/kvm/mmu/ |
| D | tdp_mmu.c | 889 * AD bits are enabled, this will involve clearing the dirty bit on each SPTE. 890 * If AD bits are not enabled, this will require clearing the writable bit on 928 * AD bits are enabled, this will involve clearing the dirty bit on each SPTE. 929 * If AD bits are not enabled, this will require clearing the writable bit on 955 * clearing the dirty status will involve clearing the dirty bit on each SPTE 956 * or, if AD bits are not enabled, clearing the writable bit on each SPTE. 995 * clearing the dirty status will involve clearing the dirty bit on each SPTE 996 * or, if AD bits are not enabled, clearing the writable bit on each SPTE.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/ |
| D | gpio-mmio.yaml | 57 will turn that line into an output line. Conversely, clearing a bit 61 will turn that line into an input line. Conversely, clearing a bit
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| /kernel/linux/linux-6.6/arch/riscv/kvm/ |
| D | main.c | 57 * After clearing the hideleg CSR, the host kernel will receive in kvm_arch_hardware_disable() 60 * hvip CSR and vsie CSR must be cleared before clearing hideleg CSR. in kvm_arch_hardware_disable()
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | dm-log-userspace.h | 88 * dm_ulog_request to the kernel - setting the 'error' field and clearing 220 * dm_ulog_request to the kernel - setting the 'error' field and clearing 239 * dm_ulog_request to the kernel - setting the 'error' field and clearing 258 * dm_ulog_request to the kernel - setting the 'error' field and clearing 295 * dm_ulog_request to the kernel - setting the 'error' field and clearing
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | dm-log-userspace.h | 88 * dm_ulog_request to the kernel - setting the 'error' field and clearing 220 * dm_ulog_request to the kernel - setting the 'error' field and clearing 239 * dm_ulog_request to the kernel - setting the 'error' field and clearing 258 * dm_ulog_request to the kernel - setting the 'error' field and clearing 295 * dm_ulog_request to the kernel - setting the 'error' field and clearing
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| /kernel/linux/linux-5.10/drivers/net/ethernet/qualcomm/emac/ |
| D | emac-sgmii.c | 113 /* After set the IRQ_GLOBAL_CLEAR bit, the status clearing must in emac_sgmii_irq_clear() 114 * be confirmed before clearing the bits in other registers. in emac_sgmii_irq_clear() 126 /* Finalize clearing procedure */ in emac_sgmii_irq_clear() 130 /* Ensure that clearing procedure finalization is written to HW */ in emac_sgmii_irq_clear()
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| /kernel/linux/linux-6.6/fs/xfs/scrub/ |
| D | bitmap.c | 81 /* overlaps with the entire clearing range */ 95 /* overlaps with the left side of the clearing range */ 100 /* overlaps with the right side of the clearing range */ 106 /* in the middle of the clearing range */
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| /kernel/linux/linux-6.6/drivers/net/ethernet/qualcomm/emac/ |
| D | emac-sgmii.c | 115 /* After set the IRQ_GLOBAL_CLEAR bit, the status clearing must in emac_sgmii_irq_clear() 116 * be confirmed before clearing the bits in other registers. in emac_sgmii_irq_clear() 128 /* Finalize clearing procedure */ in emac_sgmii_irq_clear() 132 /* Ensure that clearing procedure finalization is written to HW */ in emac_sgmii_irq_clear()
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| /kernel/linux/linux-6.6/arch/x86/lib/ |
| D | clear_page_64.S | 117 * so we can just go to the tail clearing to 120 * The unrolled case might end up clearing
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| /kernel/linux/linux-5.10/drivers/net/ipa/ |
| D | ipa_interrupt.c | 59 * "to avoid clearing unhandled interrupts." in ipa_interrupt_process() 67 /* Clearing the SUSPEND_TX interrupt also clears the register in ipa_interrupt_process() 69 * so defer clearing until after the handler has been called. in ipa_interrupt_process()
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| /kernel/linux/linux-5.10/arch/x86/events/amd/ |
| D | ibs.c | 51 * between clearing STARTED and clearing the EN bit (in fact multiple NMIs 55 * If, however, we clear STARTED late, an NMI can hit between clearing the 56 * EN bit and clearing STARTED, still see STARTED set and process the event. 61 * So what we do is set STOPPING before clearing EN to avoid the pmu::stop() 63 * the clearing of the EN bit. 476 * clearing the EN bit might think it a spurious NMI and not in perf_ibs_stop() 479 * Clearing it after, however, creates the problem of the NMI in perf_ibs_stop()
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| /kernel/linux/linux-6.6/include/linux/ |
| D | rmap.h | 38 * the reference is responsible for clearing up the 311 * Conceptually, PageAnonExclusive clearing consists of: in page_try_share_anon_rmap() 317 * When clearing PageAnonExclusive, we cannot possibly map the page in page_try_share_anon_rmap() 338 * Consequently, when clearing PageAnonExclusive(), we have to make in page_try_share_anon_rmap() 344 * clearing/invalidating the PTE (A1) and before restoring the PTE (A4), in page_try_share_anon_rmap()
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| /kernel/linux/linux-5.10/drivers/net/can/ |
| D | pch_can.c | 296 /* Clearing the MsgVal and RxIE/TxIE bits */ in pch_can_set_rxtx() 410 /* Clearing all the message object buffers. */ in pch_can_init() 440 /* Setting CMASK for clearing the reception interrupts. */ in pch_can_int_clr() 444 /* Clearing the Dir bit. */ in pch_can_int_clr() 447 /* Clearing NewDat & IntPnd */ in pch_can_int_clr() 454 * Setting CMASK for clearing interrupts for frame transmission. in pch_can_int_clr() 464 /* Clearing NewDat, TxRqst & IntPnd */ in pch_can_int_clr() 588 /* Clearing the Dir bit. */ in pch_fifo_thresh() 591 /* Clearing NewDat & IntPnd */ in pch_fifo_thresh() 962 /* Clearing the IE, SIE and EIE bits of Can control register. */ in pch_can_set_int_custom()
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