| /kernel/linux/linux-6.6/drivers/greybus/ |
| D | control.c | 3 * Greybus CPort control protocol.
14 /* Highest control-protocol version supported */
18 static int gb_control_get_version(struct gb_control *control) in gb_control_get_version() argument
20 struct gb_interface *intf = control->connection->intf; in gb_control_get_version()
28 ret = gb_operation_sync(control->connection, in gb_control_get_version()
34 "failed to get control-protocol version: %d\n", in gb_control_get_version()
41 "unsupported major control-protocol version (%u > %u)\n", in gb_control_get_version()
46 control->protocol_major = response.major; in gb_control_get_version()
47 control->protocol_minor = response.minor; in gb_control_get_version()
55 static int gb_control_get_bundle_version(struct gb_control *control, in gb_control_get_bundle_version() argument
[all …]
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| /kernel/linux/linux-5.10/drivers/greybus/ |
| D | control.c | 3 * Greybus CPort control protocol.
14 /* Highest control-protocol version supported */
18 static int gb_control_get_version(struct gb_control *control) in gb_control_get_version() argument
20 struct gb_interface *intf = control->connection->intf; in gb_control_get_version()
28 ret = gb_operation_sync(control->connection, in gb_control_get_version()
34 "failed to get control-protocol version: %d\n", in gb_control_get_version()
41 "unsupported major control-protocol version (%u > %u)\n", in gb_control_get_version()
46 control->protocol_major = response.major; in gb_control_get_version()
47 control->protocol_minor = response.minor; in gb_control_get_version()
55 static int gb_control_get_bundle_version(struct gb_control *control, in gb_control_get_bundle_version() argument
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| /kernel/linux/linux-6.6/arch/sh/include/mach-common/mach/ |
| D | highlander.h | 13 #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
14 #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
19 #define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */
20 #define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */
21 #define PA_PCICD (PA_BCR+0x0010) /* PCI Connector detect control */
22 #define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */
23 #define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */
24 #define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */
25 #define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */
26 #define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */
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| /kernel/linux/linux-5.10/arch/sh/include/mach-common/mach/ |
| D | highlander.h | 13 #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
14 #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
19 #define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */
20 #define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */
21 #define PA_PCICD (PA_BCR+0x0010) /* PCI Connector detect control */
22 #define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */
23 #define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */
24 #define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */
25 #define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */
26 #define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */
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| /kernel/linux/linux-5.10/include/media/ |
| D | v4l2-ctrls.h | 17 * Include the stateless codec compound control definitions.
39 * union v4l2_ctrl_ptr - A pointer to a control value.
101 * struct v4l2_ctrl_ops - The control operations that the driver has to provide.
103 * @g_volatile_ctrl: Get a new value for this control. Generally only relevant
104 * for volatile (and usually read-only) controls such as a control
108 * @try_ctrl: Test whether the control's value is valid. Only relevant when
110 * @s_ctrl: Actually set the new control value. s_ctrl is compulsory. The
121 * struct v4l2_ctrl_type_ops - The control type operations that the driver
143 * that should be called when a control value has changed.
146 * @priv: control private data
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| /kernel/linux/linux-6.6/drivers/pinctrl/renesas/ |
| D | Kconfig | 9 bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH)
57 This enables pin control drivers for Renesas SuperH and ARM platforms
65 This enables common pin control functionality for EMMA Mobile, R-Car,
73 This enables pin control and GPIO drivers for SH/SH Mobile platforms
82 bool "pin control support for Emma Mobile EV2" if COMPILE_TEST
86 bool "pin control support for R-Car D3" if COMPILE_TEST
90 bool "pin control support for R-Car E2" if COMPILE_TEST
94 bool "pin control support for R-Car E3" if COMPILE_TEST
98 bool "pin control support for R-Car H1" if COMPILE_TEST
102 bool "pin control support for R-Car H2" if COMPILE_TEST
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| /kernel/linux/linux-6.6/include/media/ |
| D | v4l2-ctrls.h | 29 * union v4l2_ctrl_ptr - A pointer to a control value.
109 * struct v4l2_ctrl_ops - The control operations that the driver has to provide.
111 * @g_volatile_ctrl: Get a new value for this control. Generally only relevant
112 * for volatile (and usually read-only) controls such as a control
116 * @try_ctrl: Test whether the control's value is valid. Only relevant when
118 * @s_ctrl: Actually set the new control value. s_ctrl is compulsory. The
129 * struct v4l2_ctrl_type_ops - The control type operations that the driver
149 * that should be called when a control value has changed.
152 * @priv: control private data
160 * struct v4l2_ctrl - The control structure.
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| /kernel/linux/linux-5.10/drivers/pinctrl/renesas/ |
| D | Kconfig | 9 bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH)
53 This enables pin control drivers for Renesas SuperH and ARM platforms
61 This enables common pin control functionality for EMMA Mobile, R-Car,
69 This enables pin control and GPIO drivers for SH/SH Mobile platforms
78 bool "pin control support for Emma Mobile EV2" if COMPILE_TEST
82 bool "pin control support for R-Car D3" if COMPILE_TEST
86 bool "pin control support for R-Car E2" if COMPILE_TEST
90 bool "pin control support for R-Car E3" if COMPILE_TEST
94 bool "pin control support for R-Car H1" if COMPILE_TEST
98 bool "pin control support for R-Car H2" if COMPILE_TEST
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ras_eeprom.c | 128 * add to control->i2c_address, and then tell I2C layer to read
171 struct amdgpu_ras_eeprom_control *control) in __get_eeprom_i2c_addr() argument
176 if (!control) in __get_eeprom_i2c_addr()
189 control->i2c_address = ((u32) i2c_addr) << 16; in __get_eeprom_i2c_addr()
198 control->i2c_address = EEPROM_I2C_MADDR_0; in __get_eeprom_i2c_addr()
202 control->i2c_address = EEPROM_I2C_MADDR_0; in __get_eeprom_i2c_addr()
204 control->i2c_address = EEPROM_I2C_MADDR_4; in __get_eeprom_i2c_addr()
207 control->i2c_address = EEPROM_I2C_MADDR_0; in __get_eeprom_i2c_addr()
212 control->i2c_address = EEPROM_I2C_MADDR_4; in __get_eeprom_i2c_addr()
214 control->i2c_address = EEPROM_I2C_MADDR_0; in __get_eeprom_i2c_addr()
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| /kernel/linux/linux-6.6/include/sound/ |
| D | seq_midi_emul.h | 35 unsigned char control[128]; /* Current value of all controls */ member
73 void (*control)(void *private_data, int type, struct snd_midi_channel *chan); member
94 #define gm_bank_select control[0]
95 #define gm_modulation control[1]
96 #define gm_breath control[2]
97 #define gm_foot_pedal control[4]
98 #define gm_portamento_time control[5]
99 #define gm_data_entry control[6]
100 #define gm_volume control[7]
101 #define gm_balance control[8]
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| /kernel/linux/linux-5.10/include/sound/ |
| D | seq_midi_emul.h | 35 unsigned char control[128]; /* Current value of all controls */ member
73 void (*control)(void *private_data, int type, struct snd_midi_channel *chan); member
94 #define gm_bank_select control[0]
95 #define gm_modulation control[1]
96 #define gm_breath control[2]
97 #define gm_foot_pedal control[4]
98 #define gm_portamento_time control[5]
99 #define gm_data_entry control[6]
100 #define gm_volume control[7]
101 #define gm_balance control[8]
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| /kernel/linux/linux-5.10/Documentation/userspace-api/media/drivers/ |
| D | uvcvideo.rst | 28 control enumeration.
37 Control mappings
41 control mappings at runtime. These allow for individual XU controls or byte
45 triggers a read or write of the associated XU control.
47 The ioctl used to create these control mappings is called UVCIOC_CTRL_MAP.
49 beforehand (UVCIOC_CTRL_ADD) to pass XU control information to the UVC driver.
57 3. Driver specific XU control interface
65 directly map to the low-level UVC control requests.
67 In order to make such a request the UVC unit ID of the control's extension unit
68 and the control selector need to be known. This information either needs to be
[all …]
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| /kernel/linux/linux-6.6/Documentation/userspace-api/media/drivers/ |
| D | uvcvideo.rst | 28 control enumeration.
37 Control mappings
41 control mappings at runtime. These allow for individual XU controls or byte
45 triggers a read or write of the associated XU control.
47 The ioctl used to create these control mappings is called UVCIOC_CTRL_MAP.
49 beforehand (UVCIOC_CTRL_ADD) to pass XU control information to the UVC driver.
57 3. Driver specific XU control interface
65 directly map to the low-level UVC control requests.
67 In order to make such a request the UVC unit ID of the control's extension unit
68 and the control selector need to be known. This information either needs to be
[all …]
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| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | motorola-cpcap.h | 47 #define CPCAP_REG_VERSC1 0x0048 /* Version Control 1 */
48 #define CPCAP_REG_VERSC2 0x004c /* Version Control 2 */
54 #define CPCAP_REG_UCC1 0x0210 /* UC Control 1 */
55 #define CPCAP_REG_UCC2 0x0214 /* UC Control 2 */
60 #define CPCAP_REG_PGC 0x0228 /* Power Gate and Control */
66 #define CPCAP_REG_SCC 0x0400 /* System Clock Control */
80 #define CPCAP_REG_SI2CC1 0x0604 /* Switcher I2C Control 1 */
81 #define CPCAP_REG_Si2CC2 0x0608 /* Switcher I2C Control 2 */
82 #define CPCAP_REG_S1C1 0x060c /* Switcher 1 Control 1 */
83 #define CPCAP_REG_S1C2 0x0610 /* Switcher 1 Control 2 */
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | motorola-cpcap.h | 47 #define CPCAP_REG_VERSC1 0x0048 /* Version Control 1 */
48 #define CPCAP_REG_VERSC2 0x004c /* Version Control 2 */
54 #define CPCAP_REG_UCC1 0x0210 /* UC Control 1 */
55 #define CPCAP_REG_UCC2 0x0214 /* UC Control 2 */
60 #define CPCAP_REG_PGC 0x0228 /* Power Gate and Control */
66 #define CPCAP_REG_SCC 0x0400 /* System Clock Control */
80 #define CPCAP_REG_SI2CC1 0x0604 /* Switcher I2C Control 1 */
81 #define CPCAP_REG_Si2CC2 0x0608 /* Switcher I2C Control 2 */
82 #define CPCAP_REG_S1C1 0x060c /* Switcher 1 Control 1 */
83 #define CPCAP_REG_S1C2 0x0610 /* Switcher 1 Control 2 */
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| /kernel/linux/linux-6.6/drivers/tty/vt/ |
| D | defkeymap.map | 7 # altgr control keycode 83 = Boot
8 # altgr control keycode 111 = Boot
20 control keycode 3 = nul
21 shift control keycode 3 = nul
24 control keycode 4 = Escape
27 control keycode 5 = Control_backslash
30 control keycode 6 = Control_bracketright
33 control keycode 7 = Control_asciicircum
36 control keycode 8 = Control_underscore
39 control keycode 9 = Delete
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| /kernel/linux/linux-5.10/drivers/tty/vt/ |
| D | defkeymap.map | 7 # altgr control keycode 83 = Boot
8 # altgr control keycode 111 = Boot
20 control keycode 3 = nul
21 shift control keycode 3 = nul
24 control keycode 4 = Escape
27 control keycode 5 = Control_backslash
30 control keycode 6 = Control_bracketright
33 control keycode 7 = Control_asciicircum
36 control keycode 8 = Control_underscore
39 control keycode 9 = Delete
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | micrel-ksz90x1.txt | 14 All skew control options are specified in picoseconds. The minimum
48 - rxc-skew-ps : Skew control of RXC pad
49 - rxdv-skew-ps : Skew control of RX CTL pad
50 - txc-skew-ps : Skew control of TXC pad
51 - txen-skew-ps : Skew control of TX CTL pad
52 - rxd0-skew-ps : Skew control of RX data 0 pad
53 - rxd1-skew-ps : Skew control of RX data 1 pad
54 - rxd2-skew-ps : Skew control of RX data 2 pad
55 - rxd3-skew-ps : Skew control of RX data 3 pad
56 - txd0-skew-ps : Skew control of TX data 0 pad
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ras_eeprom.c | 134 static int __update_table_header(struct amdgpu_ras_eeprom_control *control, in __update_table_header() argument
138 struct amdgpu_device *adev = to_amdgpu_device(control); in __update_table_header()
148 __encode_table_header_to_buff(&control->tbl_hdr, buff + EEPROM_ADDRESS_SIZE); in __update_table_header()
150 msg.addr = control->i2c_address; in __update_table_header()
159 static uint32_t __calc_hdr_byte_sum(struct amdgpu_ras_eeprom_control *control) in __calc_hdr_byte_sum() argument
165 for (i = 0; i < sizeof(control->tbl_hdr) - sizeof(control->tbl_hdr.checksum); i++) in __calc_hdr_byte_sum()
166 tbl_sum += *(((unsigned char *)&control->tbl_hdr) + i); in __calc_hdr_byte_sum()
189 static inline uint32_t __calc_tbl_byte_sum(struct amdgpu_ras_eeprom_control *control, in __calc_tbl_byte_sum() argument
192 return __calc_hdr_byte_sum(control) + __calc_recs_byte_sum(records, num); in __calc_tbl_byte_sum()
196 static void __update_tbl_checksum(struct amdgpu_ras_eeprom_control *control, in __update_tbl_checksum() argument
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| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/b43/ |
| D | phy_lp.h | 36 #define B43_LPPHY_TSSI_CTL B43_PHY_CCK(0x28) /* TSSI Control */
80 #define B43_LPPHY_FINEDIGIGAIN_CTL B43_PHY_CCK(0x67) /* FineDigiGain Control */
106 #define B43_LPPHY_CRSGAIN_CTL B43_PHY_OFDM(0x10) /* crsgain Control */
117 #define B43_LPPHY_LTRN_CTL B43_PHY_OFDM(0x1B) /* LTRN Control */
123 #define B43_LPPHY_OFDMSYNCTIMER_CTL B43_PHY_OFDM(0x21) /* ofdmSyncTimer Control */
141 #define B43_LPPHY_PHASE_SHIFT_CTL B43_PHY_OFDM(0x33) /* phase shift Control */
143 #define B43_LPPHY_OFDM_SYNC_CTL B43_PHY_OFDM(0x35) /* ofdm sync Control */
144 #define B43_LPPHY_AFE_ADC_CTL_0 B43_PHY_OFDM(0x36) /* Afe ADC Control 0 */
145 #define B43_LPPHY_AFE_ADC_CTL_1 B43_PHY_OFDM(0x37) /* Afe ADC Control 1 */
146 #define B43_LPPHY_AFE_ADC_CTL_2 B43_PHY_OFDM(0x38) /* Afe ADC Control 2 */
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
| D | phy_lp.h | 36 #define B43_LPPHY_TSSI_CTL B43_PHY_CCK(0x28) /* TSSI Control */
80 #define B43_LPPHY_FINEDIGIGAIN_CTL B43_PHY_CCK(0x67) /* FineDigiGain Control */
106 #define B43_LPPHY_CRSGAIN_CTL B43_PHY_OFDM(0x10) /* crsgain Control */
117 #define B43_LPPHY_LTRN_CTL B43_PHY_OFDM(0x1B) /* LTRN Control */
123 #define B43_LPPHY_OFDMSYNCTIMER_CTL B43_PHY_OFDM(0x21) /* ofdmSyncTimer Control */
141 #define B43_LPPHY_PHASE_SHIFT_CTL B43_PHY_OFDM(0x33) /* phase shift Control */
143 #define B43_LPPHY_OFDM_SYNC_CTL B43_PHY_OFDM(0x35) /* ofdm sync Control */
144 #define B43_LPPHY_AFE_ADC_CTL_0 B43_PHY_OFDM(0x36) /* Afe ADC Control 0 */
145 #define B43_LPPHY_AFE_ADC_CTL_1 B43_PHY_OFDM(0x37) /* Afe ADC Control 1 */
146 #define B43_LPPHY_AFE_ADC_CTL_2 B43_PHY_OFDM(0x38) /* Afe ADC Control 2 */
[all …]
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| /kernel/linux/linux-6.6/include/linux/greybus/ |
| D | control.h | 3 * Greybus CPort control protocol
33 int gb_control_enable(struct gb_control *control);
34 void gb_control_disable(struct gb_control *control);
35 int gb_control_suspend(struct gb_control *control);
36 int gb_control_resume(struct gb_control *control);
37 int gb_control_add(struct gb_control *control);
38 void gb_control_del(struct gb_control *control);
39 struct gb_control *gb_control_get(struct gb_control *control);
40 void gb_control_put(struct gb_control *control);
42 int gb_control_get_bundle_versions(struct gb_control *control);
[all …]
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| /kernel/linux/linux-5.10/include/linux/greybus/ |
| D | control.h | 3 * Greybus CPort control protocol
33 int gb_control_enable(struct gb_control *control);
34 void gb_control_disable(struct gb_control *control);
35 int gb_control_suspend(struct gb_control *control);
36 int gb_control_resume(struct gb_control *control);
37 int gb_control_add(struct gb_control *control);
38 void gb_control_del(struct gb_control *control);
39 struct gb_control *gb_control_get(struct gb_control *control);
40 void gb_control_put(struct gb_control *control);
42 int gb_control_get_bundle_versions(struct gb_control *control);
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| /kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | vidioc-queryctrl.rst | 13 VIDIOC_QUERYCTRL - VIDIOC_QUERY_EXT_CTRL - VIDIOC_QUERYMENU - Enumerate controls and menu control i…
41 To query the attributes of a control applications set the ``id`` field
49 exclusive ``V4L2_CID_LASTP1``. Drivers may return ``EINVAL`` if a control in
56 in the ``flags`` field this control is permanently disabled and should
60 driver returns the next supported non-compound control, or ``EINVAL`` if
63 type ≥ ``V4L2_CTRL_COMPOUND_TYPES`` and/or array control, in other words
71 control information that cannot be returned in struct
95 See also the examples in :ref:`control`.
110 - Identifies the control, set by the application. See
111 :ref:`control-id` for predefined IDs. When the ID is ORed with
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| /kernel/linux/linux-6.6/drivers/pinctrl/mediatek/ |
| D | Kconfig | 51 bool "MediaTek MT7620 pin control"
58 bool "MediaTek MT7621 pin control"
65 bool "MediaTek MT76X8 pin control"
72 bool "Ralink RT2880 pin control"
79 bool "Ralink RT305X pin control"
86 bool "Ralink RT3883 pin control"
94 bool "MediaTek MT2701 pin control"
101 bool "MediaTek MT7623 pin control with generic binding"
108 bool "MediaTek MT7629 pin control"
115 bool "MediaTek MT8135 pin control"
[all …]
|