| /kernel/linux/linux-6.6/arch/arm64/lib/ |
| D | strcmp.S | 36 #define data3 x7 macro 137 ldr data3, [src2], 8 139 rev data3, data3 142 orr data3, data3, tmp 143 sub has_nul, data3, zeroones 144 orr tmp, data3, REP8_7f 153 ldr data3, [src1, off1] 156 rev data3, data3 158 sub has_nul, data3, zeroones 159 orr tmp, data3, REP8_7f [all …]
|
| /kernel/linux/linux-5.10/drivers/phy/rockchip/ |
| D | phy-rockchip-inno-dsidphy.c | 100 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg05 */ 103 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg06 */ 106 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg07 */ 109 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg08 */ 112 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg09 */ 115 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0a */ 118 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0c */ 124 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0d */ 127 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0e */ 130 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg10 */ [all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/fw/ |
| D | dump.c | 40 u32 data3; /* error-specific data */ member 94 u32 data3; /* error-specific data */ member 162 IWL_ERR(fwrt, "0x%08X | umac data3\n", table.data3); in iwl_fwrt_dump_umac_error_log() 242 IWL_ERR(fwrt, "0x%08X | data3\n", table.data3); in iwl_fwrt_dump_lmac_error_log() 283 u32 data1, data2, data3; member 325 IWL_ERR(fwrt, "0x%08X | tcm data3\n", table.data3); in iwl_fwrt_dump_tcm_error_log() 352 u32 data1, data2, data3; member 398 IWL_ERR(fwrt, "0x%08X | rcm data3\n", table.data3); in iwl_fwrt_dump_rcm_error_log()
|
| /kernel/linux/linux-5.10/arch/ia64/kernel/ |
| D | err_inject.c | 50 u64 data3; member 94 err_data_buffer[cpu].data3); in show() 169 err_data_buffer[cpu].data3); in store() 184 err_data_buffer[cpu].data3, in store_err_data_buffer() 190 &err_data_buffer[cpu].data3); in store_err_data_buffer()
|
| /kernel/linux/linux-6.6/arch/ia64/kernel/ |
| D | err_inject.c | 50 u64 data3; member 94 err_data_buffer[cpu].data3); in show() 169 err_data_buffer[cpu].data3); in store() 184 err_data_buffer[cpu].data3, in store_err_data_buffer() 190 &err_data_buffer[cpu].data3); in store_err_data_buffer()
|
| /kernel/linux/linux-6.6/drivers/phy/rockchip/ |
| D | phy-rockchip-inno-dsidphy.c | 117 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg05 */ 120 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg06 */ 125 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg07 */ 128 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg08 */ 131 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg09 */ 134 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0a */ 137 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0c */ 143 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0d */ 146 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0e */ 149 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg10 */ [all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/ |
| D | mt76_connac3_mac.c | 127 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[9]) | in mt76_connac3_mac_decode_he_radiotap() 145 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[8]) | in mt76_connac3_mac_decode_he_radiotap() 153 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[5]); in mt76_connac3_mac_decode_he_radiotap() 159 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[5]); in mt76_connac3_mac_decode_he_radiotap()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_vf_error.c | 54 u32 data1, data2, data3; in amdgpu_vf_error_trans_all() local 80 data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF; in amdgpu_vf_error_trans_all() 82 adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3); in amdgpu_vf_error_trans_all()
|
| D | uvd_v5_0.c | 602 uint32_t data1, data3, suvd_flags; in uvd_v5_0_enable_clock_gating() local 605 data3 = RREG32(mmUVD_CGC_GATE); in uvd_v5_0_enable_clock_gating() 614 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v5_0_enable_clock_gating() 634 data3 |= UVD_CGC_GATE__VCPU_MASK; in uvd_v5_0_enable_clock_gating() 635 data3 &= ~UVD_CGC_GATE__REGS_MASK; in uvd_v5_0_enable_clock_gating() 638 data3 = 0; in uvd_v5_0_enable_clock_gating() 643 WREG32(mmUVD_CGC_GATE, data3); in uvd_v5_0_enable_clock_gating()
|
| D | uvd_v6_0.c | 1253 uint32_t data1, data3; in uvd_v6_0_enable_clock_gating() local 1256 data3 = RREG32(mmUVD_CGC_GATE); in uvd_v6_0_enable_clock_gating() 1273 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v6_0_enable_clock_gating() 1295 data3 |= UVD_CGC_GATE__VCPU_MASK; in uvd_v6_0_enable_clock_gating() 1297 data3 &= ~UVD_CGC_GATE__REGS_MASK; in uvd_v6_0_enable_clock_gating() 1299 data3 = 0; in uvd_v6_0_enable_clock_gating() 1303 WREG32(mmUVD_CGC_GATE, data3); in uvd_v6_0_enable_clock_gating()
|
| /kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh3/ |
| D | probe.c | 18 unsigned long addr0, addr1, data0, data1, data2, data3; in cpu_probe() local 42 data3 = __raw_readl(addr0); in cpu_probe() 59 if (data0 == data1 && data2 == data3) { /* Shadow */ in cpu_probe()
|
| /kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh3/ |
| D | probe.c | 18 unsigned long addr0, addr1, data0, data1, data2, data3; in cpu_probe() local 42 data3 = __raw_readl(addr0); in cpu_probe() 59 if (data0 == data1 && data2 == data3) { /* Shadow */ in cpu_probe()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_vf_error.c | 54 u32 data1, data2, data3; in amdgpu_vf_error_trans_all() local 80 data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF; in amdgpu_vf_error_trans_all() 82 adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3); in amdgpu_vf_error_trans_all()
|
| D | uvd_v5_0.c | 631 uint32_t data1, data3, suvd_flags; in uvd_v5_0_enable_clock_gating() local 634 data3 = RREG32(mmUVD_CGC_GATE); in uvd_v5_0_enable_clock_gating() 643 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v5_0_enable_clock_gating() 663 data3 |= UVD_CGC_GATE__VCPU_MASK; in uvd_v5_0_enable_clock_gating() 664 data3 &= ~UVD_CGC_GATE__REGS_MASK; in uvd_v5_0_enable_clock_gating() 667 data3 = 0; in uvd_v5_0_enable_clock_gating() 672 WREG32(mmUVD_CGC_GATE, data3); in uvd_v5_0_enable_clock_gating()
|
| D | uvd_v6_0.c | 1279 uint32_t data1, data3; in uvd_v6_0_enable_clock_gating() local 1282 data3 = RREG32(mmUVD_CGC_GATE); in uvd_v6_0_enable_clock_gating() 1299 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v6_0_enable_clock_gating() 1321 data3 |= UVD_CGC_GATE__VCPU_MASK; in uvd_v6_0_enable_clock_gating() 1323 data3 &= ~UVD_CGC_GATE__REGS_MASK; in uvd_v6_0_enable_clock_gating() 1325 data3 = 0; in uvd_v6_0_enable_clock_gating() 1329 WREG32(mmUVD_CGC_GATE, data3); in uvd_v6_0_enable_clock_gating()
|
| /kernel/linux/linux-6.6/drivers/usb/misc/sisusbvga/ |
| D | sisusb.h | 256 __u32 data3; /* operation dependent */ member 260 #define SUCMD_GET 0x01 /* for all: data0 = index, data3 = port */ 267 #define SUCMD_CLRSCR 0x07 /* data0:1:2 = length, data3 = address */ 271 #define SUCMD_SETMODE 0x09 /* Set a display mode (data3 = SiS mode) */ 272 #define SUCMD_SETVESAMODE 0x0a /* Set a display mode (data3 = VESA mode) */
|
| /kernel/linux/linux-5.10/drivers/usb/misc/sisusbvga/ |
| D | sisusb.h | 277 __u32 data3; /* operation dependent */ member 281 #define SUCMD_GET 0x01 /* for all: data0 = index, data3 = port */ 288 #define SUCMD_CLRSCR 0x07 /* data0:1:2 = length, data3 = address */ 292 #define SUCMD_SETMODE 0x09 /* Set a display mode (data3 = SiS mode) */ 293 #define SUCMD_SETVESAMODE 0x0a /* Set a display mode (data3 = VESA mode) */
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ |
| D | lvds.yaml | 61 DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__>< 73 DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/panel/ |
| D | lvds.yaml | 72 DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__>< 84 DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
|
| /kernel/linux/linux-5.10/drivers/media/usb/gspca/ |
| D | t613.c | 88 const u8 data3[9]; member 150 .data3 = 172 .data3 = 194 .data3 = 213 .data3 = {0x40, 0x80, 0xc0, 0x50, 0xa0, 0xf0, 0x53, 0xa6, 644 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3); in sd_init() 666 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3); in sd_init()
|
| /kernel/linux/linux-6.6/drivers/media/usb/gspca/ |
| D | t613.c | 88 const u8 data3[9]; member 150 .data3 = 172 .data3 = 194 .data3 = 213 .data3 = {0x40, 0x80, 0xc0, 0x50, 0xa0, 0xf0, 0x53, 0xa6, 644 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3); in sd_init() 666 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3); in sd_init()
|
| /kernel/linux/linux-6.6/drivers/media/dvb-frontends/cxd2880/ |
| D | cxd2880_tnrdmd_dvbt2.c | 159 const u8 *data3 = NULL; in x_tune_dvbt2_demod_setting() local 263 data3 = clk_mode_settings_a3; in x_tune_dvbt2_demod_setting() 268 data3 = clk_mode_settings_b3; in x_tune_dvbt2_demod_setting() 273 data3 = clk_mode_settings_c3; in x_tune_dvbt2_demod_setting() 337 0x3c, &data3[0], 2); in x_tune_dvbt2_demod_setting() 343 0x56, &data3[2], 3); in x_tune_dvbt2_demod_setting()
|
| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/cxd2880/ |
| D | cxd2880_tnrdmd_dvbt2.c | 159 const u8 *data3 = NULL; in x_tune_dvbt2_demod_setting() local 263 data3 = clk_mode_settings_a3; in x_tune_dvbt2_demod_setting() 268 data3 = clk_mode_settings_b3; in x_tune_dvbt2_demod_setting() 273 data3 = clk_mode_settings_c3; in x_tune_dvbt2_demod_setting() 337 0x3c, &data3[0], 2); in x_tune_dvbt2_demod_setting() 343 0x56, &data3[2], 3); in x_tune_dvbt2_demod_setting()
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | stih407-pinctrl.dtsi | 735 DATA3 = <&pio11 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 763 DATA3 = <&pio12 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 791 DATA3 = <&pio14 0 ALT2 IN SE_NICLK_IO 0 CLK_A>; 864 DATA3 = <&pio12 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 904 DATA3 = <&pio11 0 ALT3 IN SE_NICLK_IO 0 CLK_A>; 1101 data3 = <&pio34 2 ALT1 OUT>; 1124 data3 = <&pio33 2 ALT1 IN>;
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | stih407-pinctrl.dtsi | 735 DATA3 = <&pio11 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 763 DATA3 = <&pio12 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 791 DATA3 = <&pio14 0 ALT2 IN SE_NICLK_IO 0 CLK_A>; 864 DATA3 = <&pio12 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 904 DATA3 = <&pio11 0 ALT3 IN SE_NICLK_IO 0 CLK_A>; 1101 data3 = <&pio34 2 ALT1 OUT>; 1124 data3 = <&pio33 2 ALT1 IN>;
|