Home
last modified time | relevance | path

Searched full:dcs (Results 1 – 25 of 145) sorted by relevance

123456

/kernel/linux/linux-5.10/fs/
Ddcookies.c54 static inline unsigned long dcookie_value(struct dcookie_struct * dcs) in dcookie_value() argument
56 return (unsigned long)dcs->path.dentry; in dcookie_value()
69 struct dcookie_struct * dcs; in find_dcookie() local
76 dcs = list_entry(pos, struct dcookie_struct, hash_list); in find_dcookie()
77 if (dcookie_value(dcs) == dcookie) { in find_dcookie()
78 found = dcs; in find_dcookie()
87 static void hash_dcookie(struct dcookie_struct * dcs) in hash_dcookie() argument
89 struct list_head * list = dcookie_hashtable + dcookie_hash(dcookie_value(dcs)); in hash_dcookie()
90 list_add(&dcs->hash_list, list); in hash_dcookie()
96 struct dcookie_struct *dcs = kmem_cache_alloc(dcookie_cache, in alloc_dcookie() local
[all …]
/kernel/linux/linux-5.10/include/video/
Dmipi_display.h4 * Display Working Group standards: DSI, DCS, DBI, DPI
78 /* MIPI DCS commands */
111 MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */
128 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
129 MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
130 MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
131 MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */
132 MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
133 MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */
134 MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /* MIPI DCS 1.3 */
[all …]
/kernel/linux/linux-6.6/include/video/
Dmipi_display.h4 * Display Working Group standards: DSI, DCS, DBI, DPI
78 /* MIPI DCS commands */
111 MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */
128 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
129 MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
130 MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
131 MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */
132 MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
133 MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */
134 MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /* MIPI DCS 1.3 */
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/panel/
Dpanel-samsung-s6e63m0-dsi.c27 dev_err(dev, "could not read DCS CMD %02x\n", cmd); in s6e63m0_dsi_dcs_read()
47 dev_dbg(dev, "DSI writing dcs seq: %*ph\n", (int)len, data); in s6e63m0_dsi_dcs_write()
49 /* Pick out and skip past the DCS command */ in s6e63m0_dsi_dcs_write()
61 dev_err(dev, "error sending DCS command seq cmd %02x\n", cmd); in s6e63m0_dsi_dcs_write()
Dpanel-visionox-rm69299.c73 /* 120ms delay required here as per DCS spec */ in visionox_rm69299_unprepare()
131 /* Per DSI spec wait 120ms after sending exit sleep DCS command */ in visionox_rm69299_prepare()
140 /* Per DSI spec wait 120ms after sending set_display_on DCS command */ in visionox_rm69299_prepare()
Dpanel-lg-lg4573.c71 static int lg4573_spi_write_dcs(struct lg4573 *ctx, u8 dcs) in lg4573_spi_write_dcs() argument
73 return lg4573_spi_write_u16(ctx, (0x70 << 8 | dcs)); in lg4573_spi_write_dcs()
/kernel/linux/linux-5.10/drivers/gpu/drm/panel/
Dpanel-samsung-s6e63m0-dsi.c26 dev_err(dev, "could not read DCS CMD %02x\n", cmd); in s6e63m0_dsi_dcs_read()
45 dev_info(dev, "DSI writing dcs seq: %*ph\n", (int)len, data); in s6e63m0_dsi_dcs_write()
47 /* Pick out and skip past the DCS command */ in s6e63m0_dsi_dcs_write()
59 dev_err(dev, "error sending DCS command seq cmd %02x\n", cmd); in s6e63m0_dsi_dcs_write()
Dpanel-samsung-s6e63m0-spi.c17 * FIXME: implement reading DCS commands over SPI so we can in s6e63m0_spi_dcs_read()
44 dev_dbg(dev, "SPI writing dcs seq: %*ph\n", (int)len, data); in s6e63m0_spi_dcs_write()
53 dev_err(dev, "SPI error %d writing dcs seq: %*ph\n", ret, in s6e63m0_spi_dcs_write()
Dpanel-visionox-rm69299.c73 /* 120ms delay required here as per DCS spec */ in visionox_rm69299_unprepare()
131 /* Per DSI spec wait 120ms after sending exit sleep DCS command */ in visionox_rm69299_prepare()
140 /* Per DSI spec wait 120ms after sending set_display_on DCS command */ in visionox_rm69299_prepare()
Dpanel-lg-lg4573.c71 static int lg4573_spi_write_dcs(struct lg4573 *ctx, u8 dcs) in lg4573_spi_write_dcs() argument
73 return lg4573_spi_write_u16(ctx, (0x70 << 8 | dcs)); in lg4573_spi_write_dcs()
/kernel/linux/linux-6.6/drivers/video/fbdev/omap/
DKconfig34 bool "MIPI DBI-C/DCS compatible LCD support"
38 the Mobile Industry Processor Interface DBI-C/DCS
/kernel/linux/linux-5.10/drivers/video/fbdev/omap/
DKconfig36 bool "MIPI DBI-C/DCS compatible LCD support"
40 the Mobile Industry Processor Interface DBI-C/DCS
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
Dsmu11_driver_if_sienna_cichlid.h725 uint16_t GfxDcsFopt; // Optimal GFXCLK for DCS in Mhz
726 uint16_t GfxDcsFclkFopt; // Optimal FCLK for DCS in Mhz
727 uint16_t GfxDcsUclkFopt; // Optimal UCLK for DCS in Mhz
729 …uint16_t DcsGfxOffVoltage; //Voltage in mV(Q2) applied to VDDGFX when entering DCS GFXO…
731 …t DcsMinGfxOffTime; //Minimum amount of time PMFW shuts GFX OFF as part of GFX DCS phase
732 …OffTime; //Maximum amount of time PMFW can shut GFX OFF as part of GFX DCS phase at a stretch.
734 …inCreditAccum; //Min amount of positive credit accumulation before waking GFX up as part of DCS.
736 …f time power credit accumulator should have a value > 0 before SMU exits the DCS throttling phase.
1085 uint16_t GfxDcsFopt; // Optimal GFXCLK for DCS in Mhz
1086 uint16_t GfxDcsFclkFopt; // Optimal FCLK for DCS in Mhz
[all …]
Dsmu13_driver_if_v13_0_7.h1075 uint16_t GfxclkThrottleClock; //Used primarily in DCS
1100 // GFX DCS
1102 …uint16_t DcsGfxOffVoltage; //Voltage in mV(Q2) applied to VDDGFX when entering DCS GFXO…
1105 …t DcsMinGfxOffTime; //Minimum amount of time PMFW shuts GFX OFF as part of GFX DCS phase
1106 …OffTime; //Maximum amount of time PMFW can shut GFX OFF as part of GFX DCS phase at a stretch.
1108 …inCreditAccum; //Min amount of positive credit accumulation before waking GFX up as part of DCS.
1110 …of time power credit accumulator should have a value > 0 before SMU exits the DCS throttling phase.
Dsmu13_driver_if_v13_0_0.h1066 uint16_t GfxclkThrottleClock; //Used primarily in DCS
1096 // GFX DCS
1098 …uint16_t DcsGfxOffVoltage; //Voltage in mV(Q2) applied to VDDGFX when entering DCS GFXO…
1101 …t DcsMinGfxOffTime; //Minimum amount of time PMFW shuts GFX OFF as part of GFX DCS phase
1102 …OffTime; //Maximum amount of time PMFW can shut GFX OFF as part of GFX DCS phase at a stretch.
1104 …inCreditAccum; //Min amount of positive credit accumulation before waking GFX up as part of DCS.
1106 …of time power credit accumulator should have a value > 0 before SMU exits the DCS throttling phase.
/kernel/linux/linux-5.10/drivers/dma/
Ddma-jz4780.c673 uint32_t dcs; in jz4780_dma_chan_irq() local
678 dcs = jz4780_dma_chn_readl(jzdma, jzchan->id, JZ_DMA_REG_DCS); in jz4780_dma_chan_irq()
681 if (dcs & JZ_DMA_DCS_AR) { in jz4780_dma_chan_irq()
683 "address error (DCS=0x%x)\n", dcs); in jz4780_dma_chan_irq()
686 if (dcs & JZ_DMA_DCS_HLT) { in jz4780_dma_chan_irq()
688 "channel halt (DCS=0x%x)\n", dcs); in jz4780_dma_chan_irq()
692 jzchan->desc->status = dcs; in jz4780_dma_chan_irq()
694 if ((dcs & (JZ_DMA_DCS_AR | JZ_DMA_DCS_HLT)) == 0) { in jz4780_dma_chan_irq()
699 } else if (dcs & JZ_DMA_DCS_TT) { in jz4780_dma_chan_irq()
/kernel/linux/linux-6.6/drivers/dma/
Ddma-jz4780.c681 u32 dcs; in jz4780_dma_chan_irq() local
686 dcs = jz4780_dma_chn_readl(jzdma, jzchan->id, JZ_DMA_REG_DCS); in jz4780_dma_chan_irq()
689 if (dcs & JZ_DMA_DCS_AR) { in jz4780_dma_chan_irq()
691 "address error (DCS=0x%x)\n", dcs); in jz4780_dma_chan_irq()
694 if (dcs & JZ_DMA_DCS_HLT) { in jz4780_dma_chan_irq()
696 "channel halt (DCS=0x%x)\n", dcs); in jz4780_dma_chan_irq()
700 jzchan->desc->status = dcs; in jz4780_dma_chan_irq()
702 if ((dcs & (JZ_DMA_DCS_AR | JZ_DMA_DCS_HLT)) == 0) { in jz4780_dma_chan_irq()
707 } else if (dcs & JZ_DMA_DCS_TT) { in jz4780_dma_chan_irq()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/
Dsmu11_driver_if_sienna_cichlid.h697 uint16_t GfxDcsFopt; // Optimal GFXCLK for DCS in Mhz
698 uint16_t GfxDcsFclkFopt; // Optimal FCLK for DCS in Mhz
699 uint16_t GfxDcsUclkFopt; // Optimal UCLK for DCS in Mhz
701 …uint16_t DcsGfxOffVoltage; //Voltage in mV(Q2) applied to VDDGFX when entering DCS GFXO…
703 …t DcsMinGfxOffTime; //Minimum amount of time PMFW shuts GFX OFF as part of GFX DCS phase
704 …OffTime; //Maximum amount of time PMFW can shut GFX OFF as part of GFX DCS phase at a stretch.
706 …inCreditAccum; //Min amount of positive credit accumulation before waking GFX up as part of DCS.
708 …f time power credit accumulator should have a value > 0 before SMU exits the DCS throttling phase.
/kernel/linux/linux-5.10/include/drm/
Ddrm_mipi_dbi.h172 * mipi_dbi_command - MIPI DCS command with optional parameter(s)
177 * Send MIPI DCS command to the controller. Use mipi_dbi_command_read() for
/kernel/linux/linux-5.10/drivers/net/wireless/intersil/prism54/
Disl_oid.h219 * DCS MIN|MAX backoff used */
384 DOT11_OID_CWMIN, /* MIN DCS backoff */
385 DOT11_OID_CWMAX, /* MAX DCS backoff */
/kernel/linux/linux-6.6/drivers/gpu/drm/
Ddrm_mipi_dsi.c48 * subset of the MIPI DCS command set.
787 * mipi_dsi_dcs_write_buffer() - transmit a DCS command with payload
829 * mipi_dsi_dcs_write() - send DCS write command
831 * @cmd: DCS command
858 /* concatenate the DCS command byte and the payload */ in mipi_dsi_dcs_write()
873 * mipi_dsi_dcs_read() - send DCS read request command
875 * @cmd: DCS command
898 * mipi_dsi_dcs_nop() - send DCS nop packet
/kernel/linux/linux-5.10/drivers/gpu/drm/
Ddrm_mipi_dsi.c47 * subset of the MIPI DCS command set.
705 * mipi_dsi_dcs_write_buffer() - transmit a DCS command with payload
747 * mipi_dsi_dcs_write() - send DCS write command
749 * @cmd: DCS command
776 /* concatenate the DCS command byte and the payload */ in mipi_dsi_dcs_write()
791 * mipi_dsi_dcs_read() - send DCS read request command
793 * @cmd: DCS command
816 * mipi_dsi_dcs_nop() - send DCS nop packet
/kernel/linux/linux-6.6/include/drm/
Ddrm_mipi_dbi.h198 * mipi_dbi_command - MIPI DCS command with optional parameter(s)
203 * Send MIPI DCS command to the controller. Use mipi_dbi_command_read() for
/kernel/linux/linux-6.6/sound/soc/codecs/
Dwm_hubs.c232 WARN(1, "Unknown DCS readback method\n"); in wm_hubs_read_dc_servo()
261 dev_dbg(component->dev, "Using cached DCS offset %x for %d,%d\n", in enable_dc_servo()
287 dev_dbg(component->dev, "DCS input: %x %x\n", reg_l, reg_r); in enable_dc_servo()
297 dev_dbg(component->dev, "DCS right %d->%d\n", offset, in enable_dc_servo()
304 dev_dbg(component->dev, "DCS left %d->%d\n", offset, in enable_dc_servo()
309 dev_dbg(component->dev, "DCS result: %x\n", dcs_cfg); in enable_dc_servo()
/kernel/linux/linux-5.10/sound/soc/codecs/
Dwm_hubs.c232 WARN(1, "Unknown DCS readback method\n"); in wm_hubs_read_dc_servo()
261 dev_dbg(component->dev, "Using cached DCS offset %x for %d,%d\n", in enable_dc_servo()
287 dev_dbg(component->dev, "DCS input: %x %x\n", reg_l, reg_r); in enable_dc_servo()
297 dev_dbg(component->dev, "DCS right %d->%d\n", offset, in enable_dc_servo()
304 dev_dbg(component->dev, "DCS left %d->%d\n", offset, in enable_dc_servo()
309 dev_dbg(component->dev, "DCS result: %x\n", dcs_cfg); in enable_dc_servo()

123456