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/kernel/linux/linux-6.6/drivers/infiniband/hw/mlx5/
Dqpc.c13 struct mlx5_core_dct *dct);
95 struct mlx5_core_dct *dct; in dct_event_notifier() local
99 qpn = be32_to_cpu(eqe->data.dct.dctn) & 0xFFFFFF; in dct_event_notifier()
101 dct = xa_load(&dev->qp_table.dct_xa, qpn); in dct_event_notifier()
102 if (dct) in dct_event_notifier()
103 complete(&dct->drained); in dct_event_notifier()
210 struct mlx5_core_dct *dct) in _mlx5_core_destroy_dct() argument
213 struct mlx5_core_qp *qp = &dct->mqp; in _mlx5_core_destroy_dct()
221 int mlx5_core_create_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct, in mlx5_core_create_dct() argument
224 struct mlx5_core_qp *qp = &dct->mqp; in mlx5_core_create_dct()
[all …]
Dqp.h31 int mlx5_core_destroy_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct);
34 int mlx5_core_dct_query(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct,
Dqp.c2741 qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); in create_dct()
2742 if (!qp->dct.in) in create_dct()
2745 MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); in create_dct()
2746 dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); in create_dct()
2769 if (attr->qp_type == IB_QPT_DRIVER && !MLX5_CAP_GEN(dev->mdev, dct)) in check_qp_type()
3195 err = mlx5_core_destroy_dct(dev, &mqp->dct.mdct); in mlx5_ib_destroy_dct()
3197 mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); in mlx5_ib_destroy_dct()
3202 kfree(mqp->dct.in); in mlx5_ib_destroy_dct()
4488 /* mlx5_ib_modify_dct: modify a DCT QP
4512 dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); in mlx5_ib_modify_dct()
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/hw/mlx5/
Dqpc.c13 struct mlx5_core_dct *dct);
96 struct mlx5_core_dct *dct; in rsc_event_notifier() local
105 rsn = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff; in rsc_event_notifier()
140 dct = (struct mlx5_core_dct *)common; in rsc_event_notifier()
142 complete(&dct->drained); in rsc_event_notifier()
190 struct mlx5_core_dct *dct, bool need_cleanup) in _mlx5_core_destroy_dct() argument
193 struct mlx5_core_qp *qp = &dct->mqp; in _mlx5_core_destroy_dct()
196 err = mlx5_core_drain_dct(dev, dct); in _mlx5_core_destroy_dct()
203 wait_for_completion(&dct->drained); in _mlx5_core_destroy_dct()
206 destroy_resource_common(dev, &dct->mqp); in _mlx5_core_destroy_dct()
[all …]
Dqp.h21 int mlx5_core_destroy_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct);
24 int mlx5_core_dct_query(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct,
Dqp.c2414 qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); in create_dct()
2415 if (!qp->dct.in) in create_dct()
2418 MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); in create_dct()
2419 dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); in create_dct()
2443 if (attr->qp_type == IB_QPT_DRIVER && !MLX5_CAP_GEN(dev->mdev, dct)) in check_qp_type()
2857 err = mlx5_core_destroy_dct(dev, &mqp->dct.mdct); in mlx5_ib_destroy_dct()
2859 mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); in mlx5_ib_destroy_dct()
2864 kfree(mqp->dct.in); in mlx5_ib_destroy_dct()
4152 /* mlx5_ib_modify_dct: modify a DCT QP
4176 dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); in mlx5_ib_modify_dct()
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/kernel/linux/linux-5.10/drivers/staging/media/hantro/
Dhantro_g1_vp8_dec.c19 /* DCT partition base address regs */
72 /* DCT partition start bits regs */
208 * set control partition and DCT partition regs
218 * | tag 3B | extra 7B | hdr | mb_data | DCT sz | DCT part0 | ... | DCT partn |
224 * DCT size part
229 * 3. number of DCT parts is 1, 2, 4 or 8
286 * Calculate DCT partition info in cfg_parts()
287 * @dct_size_part_size: Containing sizes of DCT part, every DCT part in cfg_parts()
289 * DCT part in cfg_parts()
290 * @dct_part_offset: bytes offset of DCT parts from src_dma base addr in cfg_parts()
[all …]
Drk3399_vpu_hw_vp8_dec.c388 * Calculate DCT partition info in cfg_parts()
389 * @dct_size_part_size: Containing sizes of DCT part, every DCT part in cfg_parts()
391 * DCT part in cfg_parts()
392 * @dct_part_offset: bytes offset of DCT parts from src_dma base addr in cfg_parts()
393 * @dct_part_total_len: total size of all DCT parts in cfg_parts()
402 /* Number of DCT partitions */ in cfg_parts()
406 /* DCT partition length */ in cfg_parts()
409 /* DCT partitions base address */ in cfg_parts()
/kernel/linux/linux-6.6/drivers/media/platform/verisilicon/
Dhantro_g1_vp8_dec.c18 /* DCT partition base address regs */
71 /* DCT partition start bits regs */
207 * set control partition and DCT partition regs
217 * | tag 3B | extra 7B | hdr | mb_data | DCT sz | DCT part0 | ... | DCT partn |
223 * DCT size part
228 * 3. number of DCT parts is 1, 2, 4 or 8
285 * Calculate DCT partition info in cfg_parts()
286 * @dct_size_part_size: Containing sizes of DCT part, every DCT part in cfg_parts()
288 * DCT part in cfg_parts()
289 * @dct_part_offset: bytes offset of DCT parts from src_dma base addr in cfg_parts()
[all …]
Drockchip_vpu2_hw_vp8_dec.c387 * Calculate DCT partition info in cfg_parts()
388 * @dct_size_part_size: Containing sizes of DCT part, every DCT part in cfg_parts()
390 * DCT part in cfg_parts()
391 * @dct_part_offset: bytes offset of DCT parts from src_dma base addr in cfg_parts()
392 * @dct_part_total_len: total size of all DCT parts in cfg_parts()
401 /* Number of DCT partitions */ in cfg_parts()
405 /* DCT partition length */ in cfg_parts()
408 /* DCT partitions base address */ in cfg_parts()
/kernel/linux/linux-5.10/drivers/edac/
Damd64_edac.c87 * Select DCT to which PCI cfg accesses are routed
89 static void f15h_select_dct(struct amd64_pvt *pvt, u8 dct) in f15h_select_dct() argument
95 reg |= dct; in f15h_select_dct()
101 * Depending on the family, F2 DCT reads need special handling:
103 * K8: has a single DCT only and no address offsets >= 0x100
105 * F10h: each DCT has its own set of regs
109 * F16h: has only 1 DCT
111 * F15h: we select which DCT we access using F1x10C[DctCfgSel]
113 static inline int amd64_read_dct_pci_cfg(struct amd64_pvt *pvt, u8 dct, in amd64_read_dct_pci_cfg() argument
118 if (dct || offset >= 0x100) in amd64_read_dct_pci_cfg()
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Damd64_edac.h178 #define csrow_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases[(i)] & DCSB_CS_ENABLE) argument
179 #define csrow_sec_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases_sec[(i)] & DCSB_CS_ENABLE) argument
324 /* A DCT chip selects collection */
369 /* one for each DCT/UMC */
481 int (*dbam_to_cs) (struct amd64_pvt *pvt, u8 dct,
/kernel/linux/linux-6.6/drivers/edac/
Damd64_edac.c100 * Select DCT to which PCI cfg accesses are routed
102 static void f15h_select_dct(struct amd64_pvt *pvt, u8 dct) in f15h_select_dct() argument
108 reg |= dct; in f15h_select_dct()
114 * Depending on the family, F2 DCT reads need special handling:
116 * K8: has a single DCT only and no address offsets >= 0x100
118 * F10h: each DCT has its own set of regs
122 * F16h: has only 1 DCT
124 * F15h: we select which DCT we access using F1x10C[DctCfgSel]
126 static inline int amd64_read_dct_pci_cfg(struct amd64_pvt *pvt, u8 dct, in amd64_read_dct_pci_cfg() argument
131 if (dct || offset >= 0x100) in amd64_read_dct_pci_cfg()
[all …]
Damd64_edac.h166 #define csrow_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases[(i)] & DCSB_CS_ENABLE) argument
167 #define csrow_sec_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases_sec[(i)] & DCSB_CS_ENABLE) argument
296 /* A DCT chip selects collection */
353 /* one for each DCT/UMC */
467 int (*dbam_to_cs)(struct amd64_pvt *pvt, u8 dct,
/kernel/linux/linux-5.10/drivers/media/v4l2-core/
Dv4l2-jpeg.c174 * Baseline DCT only supports 8-bit precision. in jpeg_parse_frame_header()
175 * Extended sequential DCT also supports 12-bit precision. in jpeg_parse_frame_header()
311 /* Lq = 2 + n * 65 (for baseline DCT), n >= 1 */ in jpeg_parse_quantization_tables()
328 * sequential DCT with 12-bit sample precision also supports in jpeg_parse_quantization_tables()
384 /* only two Huffman tables for baseline DCT */ in jpeg_parse_huffman_tables()
482 /* baseline DCT, extended sequential DCT */ in v4l2_jpeg_parse_header()
/kernel/linux/linux-6.6/drivers/media/v4l2-core/
Dv4l2-jpeg.c175 * Baseline DCT only supports 8-bit precision. in jpeg_parse_frame_header()
176 * Extended sequential DCT also supports 12-bit precision. in jpeg_parse_frame_header()
312 /* Lq = 2 + n * 65 (for baseline DCT), n >= 1 */ in jpeg_parse_quantization_tables()
329 * sequential DCT with 12-bit sample precision also supports in jpeg_parse_quantization_tables()
385 /* only two Huffman tables for baseline DCT */ in jpeg_parse_huffman_tables()
516 /* baseline DCT, extended sequential DCT */ in v4l2_jpeg_parse_header()
/kernel/linux/linux-6.6/drivers/i3c/master/mipi-i3c-hci/
Ddct.h7 * Common DCT related stuff
Ddct_v1.c14 #include "dct.h"
/kernel/linux/linux-6.6/drivers/media/pci/bt8xx/
Ddst.c463 } else if (!strncmp(state->fw_name, "DCT-CI", 6)) { in dst_set_symbolrate()
495 else if (!strncmp(state->fw_name, "DCT-CI", 6)) in dst_set_modulation()
644 .fw_name = "DCT-CI"
651 .fw_name = "DCT-CI"
658 .fw_name = "DCT-CI"
720 VP-2030 DCT-CI, Samsung, TS=204
721 VP-2021 DCT-CI, Unknown, TS=204
722 VP-2031 DCT-CI, Philips, TS=188
723 VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
724 VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
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/kernel/linux/linux-5.10/drivers/media/pci/bt8xx/
Ddst.c463 } else if (!strncmp(state->fw_name, "DCT-CI", 6)) { in dst_set_symbolrate()
495 else if (!strncmp(state->fw_name, "DCT-CI", 6)) in dst_set_modulation()
644 .fw_name = "DCT-CI"
651 .fw_name = "DCT-CI"
658 .fw_name = "DCT-CI"
720 VP-2030 DCT-CI, Samsung, TS=204
721 VP-2021 DCT-CI, Unknown, TS=204
722 VP-2031 DCT-CI, Philips, TS=188
723 VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
724 VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Dnxp,imx8-jpeg.yaml15 and Extended Sequential DCT modes.
/kernel/linux/linux-5.10/Documentation/admin-guide/media/
Divtv-cardlist.rst86 - Digital Cowboy DCT-MTVP1
/kernel/linux/linux-6.6/Documentation/admin-guide/media/
Divtv-cardlist.rst86 - Digital Cowboy DCT-MTVP1
/kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/
Dext-ctrls-jpeg.rst11 progressive baseline DCT compression process with Huffman entropy
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dext-ctrls-jpeg.rst11 progressive baseline DCT compression process with Huffman entrophy

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