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/kernel/linux/linux-6.6/drivers/clk/samsung/
Dclk-exynos-audss.c25 * access to audss registers. Typically a child of EPLL.
29 static struct clk *epll; variable
142 epll = ERR_PTR(-ENODEV); in exynos_audss_clk_probe()
162 epll = pll_in; in exynos_audss_clk_probe()
164 ret = clk_prepare_enable(epll); in exynos_audss_clk_probe()
167 "failed to prepare the epll clock\n"); in exynos_audss_clk_probe()
264 if (!IS_ERR(epll)) in exynos_audss_clk_probe()
265 clk_disable_unprepare(epll); in exynos_audss_clk_probe()
277 if (!IS_ERR(epll)) in exynos_audss_clk_remove()
278 clk_disable_unprepare(epll); in exynos_audss_clk_remove()
Dclk-exynos5410.c64 apll, cpll, epll, mpll, enumerator
247 [epll] = PLL(pll_2650x, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK,
275 exynos5410_plls[epll].rate_table = exynos5410_pll2550x_24mhz_tbl; in exynos5410_clk_init()
Dclk-s5pv210.c70 epll, enumerator
720 [epll] = PLL(pll_4600, FOUT_EPLL, "fout_epll", "fin_pll",
732 [epll] = PLL(pll_4500, FOUT_EPLL, "fout_epll", "fin_pll",
Dclk-exynos4.c150 apll, mpll, epll, vpll, enumerator
1155 [epll] = PLL(pll_4600, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
1166 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
1297 exynos4210_plls[epll].rate_table = in exynos4_clk_init()
1311 exynos4x12_plls[epll].rate_table = in exynos4_clk_init()
Dclk-exynos5250.c108 apll, mpll, cpll, epll, vpll, gpll, bpll, enumerator
746 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK,
813 exynos5250_plls[epll].rate_table = epll_24mhz_tbl; in exynos5250_clk_init()
/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk-exynos-audss.c26 * access to audss registers. Typically a child of EPLL.
30 static struct clk *epll; variable
145 epll = ERR_PTR(-ENODEV); in exynos_audss_clk_probe()
165 epll = pll_in; in exynos_audss_clk_probe()
167 ret = clk_prepare_enable(epll); in exynos_audss_clk_probe()
170 "failed to prepare the epll clock\n"); in exynos_audss_clk_probe()
267 if (!IS_ERR(epll)) in exynos_audss_clk_probe()
268 clk_disable_unprepare(epll); in exynos_audss_clk_probe()
280 if (!IS_ERR(epll)) in exynos_audss_clk_remove()
281 clk_disable_unprepare(epll); in exynos_audss_clk_remove()
Dclk-s3c2443.c64 PNAME(esysclk_p) = { "epllref", "epll" };
149 ALIAS(EPLL, NULL, "epll"),
183 PLL(pll_6553, EPLL, "epll", "epllref", LOCKCON1, EPLLCON, NULL),
235 PLL(pll_2126, EPLL, "epll", "epllref", LOCKCON1, EPLLCON, NULL),
Dclk-s3c2410-dclk.c161 static const char *dclk_s3c2443_p[] = { "pclk", "epll" };
162 static const char *clkout0_s3c2443_p[] = { "xti", "epll", "armclk", "hclk", "pclk",
164 static const char *clkout1_s3c2443_p[] = { "dummy", "epll", "rtc_clkout",
Dclk-exynos5410.c61 apll, cpll, epll, mpll, enumerator
244 [epll] = PLL(pll_2650x, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK,
272 exynos5410_plls[epll].rate_table = exynos5410_pll2550x_24mhz_tbl; in exynos5410_clk_init()
Dclk-s5pv210.c70 epll, enumerator
720 [epll] = PLL(pll_4600, FOUT_EPLL, "fout_epll", "fin_pll",
732 [epll] = PLL(pll_4500, FOUT_EPLL, "fout_epll", "fin_pll",
Dclk-exynos4.c146 apll, mpll, epll, vpll, enumerator
1151 [epll] = PLL(pll_4600, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
1162 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
1260 exynos4210_plls[epll].rate_table = in exynos4_clk_init()
1274 exynos4x12_plls[epll].rate_table = in exynos4_clk_init()
Dclk-exynos5250.c105 apll, mpll, cpll, epll, vpll, gpll, bpll, enumerator
743 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK,
805 exynos5250_plls[epll].rate_table = epll_24mhz_tbl; in exynos5250_clk_init()
/kernel/linux/linux-6.6/include/dt-bindings/clock/
Dnuvoton,ma35d1-clk.h23 #define EPLL 12 macro
25 /* EPLL divider */
/kernel/linux/linux-5.10/sound/soc/samsung/
Darndale.c73 * We add 1 to the frequency value to ensure proper EPLL setting in arndale_wm1811_hw_params()
75 * samsung/clk-exynos5250.c for list of available EPLL rates). in arndale_wm1811_hw_params()
/kernel/linux/linux-6.6/sound/soc/samsung/
Darndale.c73 * We add 1 to the frequency value to ensure proper EPLL setting in arndale_wm1811_hw_params()
75 * samsung/clk-exynos5250.c for list of available EPLL rates). in arndale_wm1811_hw_params()
Dodroid.c91 * frequency values due to the EPLL output frequency not being exact in odroid_card_be_hw_params()
/kernel/linux/linux-6.6/arch/arm64/boot/dts/nuvoton/
Dma35d1-iot-512m.dts44 <&clk EPLL>,
Dma35d1-som-256m.dts44 <&clk EPLL>,
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dnuvoton,ma35d1-clk.yaml37 EPLL, and VPLL in sequential.
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Ds3c2443.h27 #define EPLL 8 macro
/kernel/linux/linux-6.6/drivers/clk/nuvoton/
Dclk-ma35d1.c104 { .fw_name = "epll", },
508 hws[EPLL] = ma35d1_reg_clk_pll(dev, EPLL, pllmode[3], "epll", in ma35d1_clocks_probe()
513 hws[EPLL_DIV2] = ma35d1_clk_fixed_factor(dev, "epll_div2", "epll", 1, 2); in ma35d1_clocks_probe()
514 hws[EPLL_DIV4] = ma35d1_clk_fixed_factor(dev, "epll_div4", "epll", 1, 4); in ma35d1_clocks_probe()
515 hws[EPLL_DIV8] = ma35d1_clk_fixed_factor(dev, "epll_div8", "epll", 1, 8); in ma35d1_clocks_probe()
Dclk-ma35d1-pll.c237 case EPLL: in ma35d1_clk_pll_recalc_rate()
269 case EPLL: in ma35d1_clk_pll_round_rate()
/kernel/linux/linux-5.10/drivers/clk/
Dclk-ast2600.c77 /* From dpll/epll/40mhz usb p1 phy/gpioc6/dp phy pll */
173 /* For hpll/dpll/epll/mpll */
437 "epll",
625 hw = clk_hw_register_divider_table(dev, "bclk", "epll", 0, in aspeed_g6_clk_probe()
729 aspeed_g6_clk_data->hws[ASPEED_CLK_EPLL] = ast2600_calc_pll("epll", val); in aspeed_g6_cc()
/kernel/linux/linux-6.6/drivers/clk/
Dclk-ast2600.c116 /* From dpll/epll/40mhz usb p1 phy/gpioc6/dp phy pll */
211 /* For hpll/dpll/epll/mpll */
475 "epll",
663 hw = clk_hw_register_divider_table(dev, "bclk", "epll", 0, in aspeed_g6_clk_probe()
770 aspeed_g6_clk_data->hws[ASPEED_CLK_EPLL] = ast2600_calc_pll("epll", val); in aspeed_g6_cc()
/kernel/linux/linux-5.10/drivers/clk/ingenic/
Djz4780-cgu.c305 "epll", CGU_CLK_PLL,
307 .pll = DEF_PLL(EPLL),

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