Searched full:exclk (Results 1 – 14 of 14) sorted by relevance
| /kernel/linux/linux-5.10/arch/mips/boot/dts/ingenic/ |
| D | x1000.dtsi | 43 exclk: ext { label
60 clocks = <&exclk>, <&rtclk>;
178 clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
191 clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
204 clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
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| D | x1830.dtsi | 43 exclk: ext { label
60 clocks = <&exclk>, <&rtclk>;
178 clocks = <&exclk>, <&cgu X1830_CLK_UART0>;
191 clocks = <&exclk>, <&cgu X1830_CLK_UART1>;
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| D | cu1830-neo.dts | 42 &exclk {
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| D | cu1000-neo.dts | 42 &exclk {
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/ingenic/ |
| D | x1000.dtsi | 43 exclk: ext { label
63 clocks = <&exclk>, <&rtclk>;
230 clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
243 clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
256 clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
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| D | x1830.dtsi | 43 exclk: ext { label
63 clocks = <&exclk>, <&rtclk>;
225 clocks = <&exclk>, <&cgu X1830_CLK_UART0>;
238 clocks = <&exclk>, <&cgu X1830_CLK_UART1>;
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| D | cu1830-neo.dts | 42 &exclk {
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| D | cu1000-neo.dts | 42 &exclk {
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | renesas,rzg2l-cpg.yaml | 40 Clock source to CPG can be either from external clock input (EXCLK) or
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/ |
| D | r9a09g011.dtsi | 16 /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */
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| D | r9a07g043.dtsi | 36 /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */
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| D | r9a07g054.dtsi | 37 /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */
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| D | r9a07g044.dtsi | 37 /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */
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| /kernel/linux/linux-6.6/drivers/clk/ingenic/ |
| D | x1000-cgu.c | 381 * Therefore, the divider is disabled when EXCLK is selected.
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