Searched full:elba (Results 1 – 7 of 7) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/ |
| D | snps,dw-apb-ssi.yaml | 44 const: amd,pensando-elba-spi
47 - amd,pensando-elba-syscon
50 amd,pensando-elba-syscon: false
79 - description: AMD Pensando Elba SoC SPI Controller
80 const: amd,pensando-elba-spi
154 amd,pensando-elba-syscon:
157 Block address to control SPI chip-selects. The Elba SoC system controller
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| D | cdns,qspi-nor.yaml | 53 const: amd,pensando-elba-qspi
70 - amd,pensando-elba-qspi
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | cdns,sdhci.yaml | 16 - amd,pensando-elba-sd4hc
128 const: amd,pensando-elba-sd4hc
134 - description: Elba byte-lane enable register for writes
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| /kernel/linux/linux-6.6/drivers/spi/ |
| D | spi-dw-mmio.c | 57 * Elba SoC does not use ssi, pin override is used for cs 0,1 and
304 "amd,pensando-elba-syscon"); in dw_spi_elba_init()
434 { .compatible = "amd,pensando-elba-spi", .data = dw_spi_elba_init},
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| D | spi-cadence-quadspi.c | 2012 .compatible = "amd,pensando-elba-qspi",
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| /kernel/linux/linux-6.6/drivers/mmc/host/ |
| D | sdhci-cadence.c | 328 /* Elba control register bits [6:3] are byte-lane enables */
332 * The Pensando Elba SoC explicitly controls byte-lane enabling on writes
595 .compatible = "amd,pensando-elba-sd4hc",
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | syscon.yaml | 41 - amd,pensando-elba-syscon
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