Searched full:gicr (Results 1 – 25 of 107) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic-v3.yaml | 76 - GIC Redistributors (GICR), one range per redistributor region 179 GICR registers when the GIC redistributors are powered off. 250 <0x2f100000 0x200000>, // GICR 278 <0x2d000000 0x800000>, // GICR 1: CPUs 0-31 279 <0x2e000000 0x800000>, // GICR 2: CPUs 32-63
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic-v3.yaml | 76 - GIC Redistributors (GICR), one range per redistributor region 212 <0x2f100000 0x200000>, // GICR 239 <0x2d000000 0x800000>, // GICR 1: CPUs 0-31 240 <0x2e000000 0x800000>, // GICR 2: CPUs 32-63
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| /kernel/linux/linux-6.6/drivers/irqchip/ |
| D | irq-gic-v3.c | 1830 /* Find the chips based on GICR regions PHYS addr */ in gic_enable_quirk_nvidia_t241() 1887 .desc = "GICv3: Mediatek Chromebook GICR save problem", 2300 rdist_regs[i].redist_base = gic_of_iomap(node, 1 + i, "GICR", &res); in gic_of_init() 2371 pr_err("Couldn't map GICR region @%llx\n", redist->base_address); in gic_acpi_parse_madt_redist() 2374 gic_request_region(redist->base_address, redist->length, "GICR"); in gic_acpi_parse_madt_redist() 2397 gic_request_region(gicc->gicr_base_address, size, "GICR"); in gic_acpi_parse_madt_gicc() 2416 /* Collect redistributor base addresses in GICR entries */ in gic_acpi_collect_gicr_base() 2420 pr_info("No valid GICR entries exist\n"); in gic_acpi_collect_gicr_base() 2438 * If GICC is enabled and has valid gicr base address, then it means in gic_acpi_match_gicc() 2439 * GICR base is presented via GICC in gic_acpi_match_gicc() [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/intel/ |
| D | keembay-soc.dtsi | 58 <0x0 0x20580000 0x0 0x80000>; /* GICR */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/intel/ |
| D | keembay-soc.dtsi | 58 <0x0 0x20580000 0x0 0x80000>; /* GICR */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/ |
| D | armada-ap810-ap0.dtsi | 52 <0x3060000 0x100000>, /* GICR */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/marvell/ |
| D | armada-ap810-ap0.dtsi | 52 <0x3060000 0x100000>, /* GICR */
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| D | ac5-98dx25xx.dtsi | 315 <0x0 0x80660000 0x0 0x40000>; /* GICR */
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| /kernel/liteos_a/arch/arm/gic/ |
| D | gic_v3.c | 328 /* GICR init */ in HalIrqInitPercpu() 333 /* GICR: clear and mask sgi/ppi */ in HalIrqInitPercpu()
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/cavium/ |
| D | thunder2-99xx.dtsi | 67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
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| D | thunder-88xx.dtsi | 389 <0x8010 0x80000000 0x0 0x600000>; /* GICR */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/cavium/ |
| D | thunder2-99xx.dtsi | 67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-am62p-main.dtsi | 24 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
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| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-gic-v3.c | 1636 .desc = "GICv3: Mediatek Chromebook GICR save problem", 2070 pr_err("Couldn't map GICR region @%llx\n", redist->base_address); in gic_acpi_parse_madt_redist() 2113 /* Collect redistributor base addresses in GICR entries */ in gic_acpi_collect_gicr_base() 2117 pr_info("No valid GICR entries exist\n"); in gic_acpi_collect_gicr_base() 2135 * If GICC is enabled and has valid gicr base address, then it means in gic_acpi_match_gicc() 2136 * GICR base is presented via GICC in gic_acpi_match_gicc() 2159 * to mix redistributor description, GICR and GICC subtables have to be in gic_acpi_count_gicr_regions()
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| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| D | acpi.h | 64 #define CPUIDLE_GICR_CTXT BIT(2) /* GICR */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/ |
| D | tegra234.dtsi | 115 <0x0f440000 0x200000>; /* GICR */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx8dxl.dtsi | 88 <0x0 0x51b00000 0 0xc0000>; /* GICR (RD_base + SGI_base) */
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| D | imx8qxp.dtsi | 157 <0x0 0x51b00000 0 0xc0000>; /* GICR (RD_base + SGI_base) */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amazon/ |
| D | alpine-v2.dtsi | 119 <0x0 0xf0280000 0x0 0x200000>, /* GICR */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amazon/ |
| D | alpine-v2.dtsi | 119 <0x0 0xf0280000 0x0 0x200000>, /* GICR */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 115 <0x6 0x00340000 0xc0000>, /* GICR */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt6779.dtsi | 126 <0 0x0c040000 0 0x200000>; /* GICR */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/ |
| D | hip05.dtsi | 247 <0x0 0x8d100000 0 0x300000>, /* GICR */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/ |
| D | fvp-base-revc.dts | 123 <0x0 0x2f100000 0 0x200000>, // GICR
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hip05.dtsi | 239 <0x0 0x8d100000 0 0x300000>, /* GICR */
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