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/kernel/linux/linux-6.6/include/kvm/
Darm_vgic.h39 VGIC_V2, /* Good ol' GICv2 */
67 /* maximum number of VCPUs allowed (GICv2 limits us to 8) */
145 u8 targets; /* GICv2 target VCPUs mask */
148 u8 source; /* GICv2 SGIs only */
149 u8 active_source; /* GICv2 SGIs only */
229 /* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */
234 #define KVM_VGIC_IMP_REV_2 2 /* GICv2 restorable groups */
238 /* Userspace can write to GICv2 IGROUPR */
249 /* either a GICv2 CPU interface */
/kernel/linux/linux-6.6/Documentation/virt/kvm/devices/
Darm-vgic.rst17 guest GICv2 through this interface. For information on creating a guest GICv3
19 create both a GICv3 and GICv2 device on the same VM.
58 GICv2 specs. Getting or setting such a register has the same effect as
65 GICv2 is changed in a way directly observable by the guest or userspace.
92 defined in the GICv2 specs. Getting or setting such a register has the
96 fixed format for our implementation that fits with the model of a "GICv2
112 similar to GICv2's GICH_APR.
/kernel/linux/linux-5.10/Documentation/virt/kvm/devices/
Darm-vgic.rst17 guest GICv2 through this interface. For information on creating a guest GICv3
19 create both a GICv3 and GICv2 device on the same VM.
58 GICv2 specs. Getting or setting such a register has the same effect as
65 GICv2 is changed in a way directly observable by the guest or userspace.
92 defined in the GICv2 specs. Getting or setting such a register has the
96 fixed format for our implementation that fits with the model of a "GICv2
112 similar to GICv2's GICH_APR.
/kernel/linux/linux-5.10/include/kvm/
Darm_vgic.h37 VGIC_V2, /* Good ol' GICv2 */
65 /* maximum number of VCPUs allowed (GICv2 limits us to 8) */
120 u8 targets; /* GICv2 target VCPUs mask */
123 u8 source; /* GICv2 SGIs only */
124 u8 active_source; /* GICv2 SGIs only */
208 /* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */
214 /* Userspace can write to GICv2 IGROUPR */
225 /* either a GICv2 CPU interface */
/kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/
Dfoundation-v8-psci.dts4 * ARMv8 Foundation model DTS (GICv2+PSCI configuration)
8 #include "foundation-v8-gicv2.dtsi"
Dfoundation-v8.dts5 * ARMv8 Foundation model DTS (GICv2 configuration)
9 #include "foundation-v8-gicv2.dtsi"
Dfoundation-v8-gicv2.dtsi4 * ARMv8 Foundation model DTS (GICv2 configuration)
/kernel/linux/linux-6.6/arch/arm64/boot/dts/arm/
Dfoundation-v8-psci.dts4 * ARMv8 Foundation model DTS (GICv2+PSCI configuration)
8 #include "foundation-v8-gicv2.dtsi"
Dfoundation-v8.dts5 * ARMv8 Foundation model DTS (GICv2 configuration)
9 #include "foundation-v8-gicv2.dtsi"
Dfoundation-v8-gicv2.dtsi4 * ARMv8 Foundation model DTS (GICv2 configuration)
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dbrcm,stb-pcie.yaml153 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH
154 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH
155 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH
156 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
/kernel/liteos_a/arch/arm/gic/
Dgic_v2.c165 * gicv2 valid irq ranges from 0~1019, we use OS_HWI_MAX_NUM in HalIrqHandler()
188 case GICV2: in HalIrqVersion()
189 irqVerString = "GICv2"; in HalIrqVersion()
/kernel/linux/linux-5.10/arch/arm64/kvm/vgic/
Dvgic-mmio-v2.c20 * Revision 1: Report GICv2 interrupts as group 0 instead of group 1
359 /* GICv2 hardware systems support max. 32 groups */ in vgic_mmio_read_apr()
371 /* GICv3 only uses ICH_AP1Rn for memory mapped (GICv2) guests */ in vgic_mmio_read_apr()
385 /* GICv2 hardware systems support max. 32 groups */ in vgic_mmio_write_apr()
397 /* GICv3 only uses ICH_AP1Rn for memory mapped (GICv2) guests */ in vgic_mmio_write_apr()
Dvgic-init.c33 * structures. Can be executed lazily for GICv2.
81 * which had no chance yet to check the availability of the GICv2 in kvm_vgic_create()
147 * initialization when using a virtual GICv2. in kvm_vgic_dist_init()
390 * is a GICv2. A GICv3 must be explicitly initialized by the guest using the
401 * for the legacy case of a GICv2. Any other type must in vgic_lazy_init()
/kernel/linux/linux-6.6/arch/arm64/kvm/vgic/
Dvgic-mmio-v2.c20 * Revision 1: Report GICv2 interrupts as group 0 instead of group 1
370 /* GICv2 hardware systems support max. 32 groups */ in vgic_mmio_read_apr()
382 /* GICv3 only uses ICH_AP1Rn for memory mapped (GICv2) guests */ in vgic_mmio_read_apr()
396 /* GICv2 hardware systems support max. 32 groups */ in vgic_mmio_write_apr()
408 /* GICv3 only uses ICH_AP1Rn for memory mapped (GICv2) guests */ in vgic_mmio_write_apr()
Dvgic-init.c33 * structures. Can be executed lazily for GICv2.
79 * which had no chance yet to check the availability of the GICv2 in kvm_vgic_create()
156 * initialization when using a virtual GICv2. in kvm_vgic_dist_init()
419 * is a GICv2. A GICv3 must be explicitly initialized by userspace using the
430 * for the legacy case of a GICv2. Any other type must in vgic_lazy_init()
/kernel/linux/linux-6.6/drivers/irqchip/
Dirq-gic.c900 .name = "GICv2",
1302 * first page of a GICv2. in gic_check_eoimode()
1308 pr_warn("GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set\n"); in gic_check_eoimode()
1317 * The first page was that of a GICv2, and in gic_check_eoimode()
1319 * to be a GICv2, and update the mapping. in gic_check_eoimode()
1321 pr_warn("GIC: GICv2 at %pa, but range is too small (broken DT?), assuming 8kB\n", in gic_check_eoimode()
1329 * We detected *two* initial GICv2 pages in a in gic_check_eoimode()
1330 * row. Could be a GICv2 aliased over two 64kB in gic_check_eoimode()
1338 pr_warn("GIC: Aliased GICv2 at %pa, trying to find the canonical range over 128kB\n", in gic_check_eoimode()
1346 * Verify that we have the first 4kB of a GICv2 in gic_check_eoimode()
[all …]
/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-gic.c1285 name = kasprintf(GFP_KERNEL, "GICv2"); in __gic_init_bases()
1351 * first page of a GICv2. in gic_check_eoimode()
1357 pr_warn("GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set\n"); in gic_check_eoimode()
1366 * The first page was that of a GICv2, and in gic_check_eoimode()
1368 * to be a GICv2, and update the mapping. in gic_check_eoimode()
1370 pr_warn("GIC: GICv2 at %pa, but range is too small (broken DT?), assuming 8kB\n", in gic_check_eoimode()
1378 * We detected *two* initial GICv2 pages in a in gic_check_eoimode()
1379 * row. Could be a GICv2 aliased over two 64kB in gic_check_eoimode()
1387 pr_warn("GIC: Aliased GICv2 at %pa, trying to find the canonical range over 128kB\n", in gic_check_eoimode()
1395 * Verify that we have the first 4kB of a GICv2 in gic_check_eoimode()
[all …]
/kernel/liteos_a/arch/arm/include/
Dgic_common.h42 GICV2, enumerator
68 #define GICD_ISACTIVER(n) (GICD_OFFSET + 0x300 + (n) * 4) /* GICv2 Interrupt Set-Acti…
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dbcm2711.dtsi13 interrupt-parent = <&gicv2>;
56 gicv2: interrupt-controller@40041000 { label
538 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
540 <0 0 0 2 &gicv2 GIC_SPI 144
542 <0 0 0 3 &gicv2 GIC_SPI 145
544 <0 0 0 4 &gicv2 GIC_SPI 146
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml93 For GICv2 with virtualization extensions, additional regions are
194 // GICv2
/kernel/linux/linux-6.6/include/linux/irqchip/
Darm-vgic-info.h14 /* Full GICv2 */
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/aarch64/
Dvgic_init.c138 * ARM_VGIC (GICv2 or GICv3) device gets created with an overlapping
139 * DIST/REDIST (or DIST/CPUIF for GICv2). Assumption is 4 vcpus are going to be
141 * and a DIST region is set @0x70000. The GICv2 case sets a CPUIF @0x0 and a
148 struct vgic_region_attr rdist; /* CPU interface in GICv2*/ in subtest_dist_rdist()
762 print_skip("No GICv2 nor GICv3 support"); in main()
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml101 For GICv2 with virtualization extensions, additional regions are
202 // GICv2
/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm2711.dtsi13 interrupt-parent = <&gicv2>;
56 gicv2: interrupt-controller@40041000 { label
564 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
566 <0 0 0 2 &gicv2 GIC_SPI 144
568 <0 0 0 3 &gicv2 GIC_SPI 145
570 <0 0 0 4 &gicv2 GIC_SPI 146

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